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sw_apps:zynqmp_fsbl: Added tcl procedures to validate processor and os

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tcl procedures are added to facilitate validating the FSBL supported processor(s)
and os platform.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This commit is contained in:
Sarat Chand Savitala 2015-10-06 23:04:43 +05:30 • committed by Nava kishore Manne
parent b18bcbdb00
commit b5d70fa084
1 changed files with 10 additions and 2 deletions
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12
lib/sw_apps/zynqmp_fsbl/data/zynqmp_fsbl.tcl
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@ -35,12 +35,20 @@ proc swapp_get_name {} {
}
proc swapp_get_description {} {
return "First Stage Bootloader (FSBL) for Zynq MP. The FSBL configures the FPGA with HW bit stream (if it exists) \
return "First Stage Bootloader (FSBL) for Zynq Ultrascale+ MPSoC. The FSBL configures the FPGA with HW bit stream (if it exists) \
and loads the Operating System (OS) Image or Standalone (SA) Image or 2nd Stage Boot Loader image from the \
non-volatile memory (NAND/SD/QSPI) to RAM (DDR) and takes A5x/R5 out of reset. It supports multiple partitions, \
non-volatile memory (NAND/SD/QSPI) to RAM (DDR) and takes A53/R5 out of reset. It supports multiple partitions, \
and each partition can be a code image or a bit stream.";
}
proc swapp_get_supported_processors {} {
return "psu_cortexa53 psu_cortexr5";
}
proc swapp_get_supported_os {} {
return "standalone";
}
proc check_standalone_os {} {
set oslist [hsi::get_os];