dmaps: Create new minor version and deprecate the older one
Created new version v2_1 and deprecated the version v2_0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This commit is contained in:
parent
bcf4cc059b
commit
b5e3f579a7
14 changed files with 3761 additions and 0 deletions
42
XilinxProcessorIPLib/drivers/dmaps/data/dmaps.mdd
Executable file
42
XilinxProcessorIPLib/drivers/dmaps/data/dmaps.mdd
Executable file
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@ -0,0 +1,42 @@
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###############################################################################
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#
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# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
|
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#
|
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# Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
# of this software and associated documentation files (the "Software"), to deal
|
||||
# in the Software without restriction, including without limitation the rights
|
||||
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
# copies of the Software, and to permit persons to whom the Software is
|
||||
# furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# Use of the Software is limited solely to applications:
|
||||
# (a) running on a Xilinx device, or
|
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# (b) that interact with a Xilinx device through a bus or interconnect.
|
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#
|
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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# SOFTWARE.
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#
|
||||
# Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
# in advertising or otherwise to promote the sale, use or other dealings in
|
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# this Software without prior written authorization from Xilinx.
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#
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###############################################################################
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OPTION psf_version = 2.1;
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BEGIN driver dmaps
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OPTION supported_peripherals = (ps7_dma);
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OPTION driver_state = ACTIVE;
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OPTION copyfiles = all;
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OPTION VERSION = 2.1;
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OPTION NAME = dmaps;
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END driver
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54
XilinxProcessorIPLib/drivers/dmaps/data/dmaps.tcl
Executable file
54
XilinxProcessorIPLib/drivers/dmaps/data/dmaps.tcl
Executable file
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@ -0,0 +1,54 @@
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###############################################################################
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#
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# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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#
|
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# Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
# of this software and associated documentation files (the "Software"), to deal
|
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# in the Software without restriction, including without limitation the rights
|
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
# copies of the Software, and to permit persons to whom the Software is
|
||||
# furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# Use of the Software is limited solely to applications:
|
||||
# (a) running on a Xilinx device, or
|
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# (b) that interact with a Xilinx device through a bus or interconnect.
|
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#
|
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
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# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
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# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
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# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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# SOFTWARE.
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#
|
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# Except as contained in this notice, the name of the Xilinx shall not be used
|
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# in advertising or otherwise to promote the sale, use or other dealings in
|
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# this Software without prior written authorization from Xilinx.
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#
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###############################################################################
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##############################################################################
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#
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# Modification History
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#
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# Ver Who Date Changes
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# ----- ---- -------- -----------------------------------------------
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# 1.00a sdm 11/22/11 Created
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# 2.0 adk 10/12/13 Updated as per the New Tcl API's
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#
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##############################################################################
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#uses "xillib.tcl"
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proc generate {drv_handle} {
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xdefine_zynq_include_file $drv_handle "xparameters.h" "XDmaPs" "NUM_INSTANCES" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_S_AXI_HIGHADDR"
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xdefine_zynq_config_file $drv_handle "xdmaps_g.c" "XDmaPs" "DEVICE_ID" "C_S_AXI_BASEADDR"
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xdefine_zynq_canonical_xpars $drv_handle "xparameters.h" "XDmaPs" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_S_AXI_HIGHADDR"
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}
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42
XilinxProcessorIPLib/drivers/dmaps/data/dmaps_header.h
Executable file
42
XilinxProcessorIPLib/drivers/dmaps/data/dmaps_header.h
Executable file
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/* $Id: tmrctr_header.h,v 1.1.2.1 2010/12/01 07:53:56 svemula Exp $ */
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/******************************************************************************
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*
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* Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
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* of this software and associated documentation files (the "Software"), to deal
|
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* in the Software without restriction, including without limitation the rights
|
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
|
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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#ifndef DMAPS_HEADER_H /* prevent circular inclusions */
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#define DMAPS_HEADER_H /* by using protection macros */
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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int XDmaPs_Example_W_Intr(XScuGic *GicPtr,u16 DeviceId);
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#endif
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151
XilinxProcessorIPLib/drivers/dmaps/data/dmaps_tapp.tcl
Executable file
151
XilinxProcessorIPLib/drivers/dmaps/data/dmaps_tapp.tcl
Executable file
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@ -0,0 +1,151 @@
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###############################################################################
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#
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# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
# of this software and associated documentation files (the "Software"), to deal
|
||||
# in the Software without restriction, including without limitation the rights
|
||||
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
# copies of the Software, and to permit persons to whom the Software is
|
||||
# furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# Use of the Software is limited solely to applications:
|
||||
# (a) running on a Xilinx device, or
|
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# (b) that interact with a Xilinx device through a bus or interconnect.
|
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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# SOFTWARE.
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#
|
||||
# Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
# in advertising or otherwise to promote the sale, use or other dealings in
|
||||
# this Software without prior written authorization from Xilinx.
|
||||
#
|
||||
###############################################################################
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##############################################################################
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#
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# Modification History
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#
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# Ver Who Date Changes
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# ----- ---- -------- -----------------------------------------------
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# 2.0 adk 10/12/13 Updated as per the New Tcl API's
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##############################################################################
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# Uses $XILINX_EDK/bin/lib/xillib_sw.tcl
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# -----------------------------------------------------------------
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# Software Project Types (swproj):
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# 0 : MemoryTest - Calls basic memorytest routines from common driver dir
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# 1 : PeripheralTest - Calls any existing polled_example and/or selftest
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# -----------------------------------------------------------------
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# -----------------------------------------------------------------
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# TCL Procedures:
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# -----------------------------------------------------------------
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proc gen_include_files {swproj mhsinst} {
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if {$swproj == 0} {
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return ""
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}
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if {$swproj == 1} {
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set inc_file_lines {xdmaps.h dmaps_header.h}
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}
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return $inc_file_lines
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}
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proc gen_src_files {swproj mhsinst} {
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if {$swproj == 0} {
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return ""
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}
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if {$swproj == 1} {
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set inc_file_lines {examples/xdmaps_example_w_intr.c data/dmaps_header.h}
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return $inc_file_lines
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}
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}
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proc gen_testfunc_def {swproj mhsinst} {
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return ""
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}
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proc gen_init_code {swproj mhsinst} {
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if {$swproj == 0} {
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return ""
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}
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if {$swproj == 1} {
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return ""
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}
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}
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proc gen_testfunc_call {swproj mhsinst} {
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if {$swproj == 0} {
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return ""
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}
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set ipname [get_property NAME $mhsinst]
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if {"ps7_dma_ns" == $ipname} {
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return ""
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}
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set deviceid [::hsm::utils::get_ip_param_name $mhsinst "DEVICE_ID"]
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set stdout [get_property CONFIG.STDOUT [get_os]]
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if { $stdout == "" || $stdout == "none" } {
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set hasStdout 0
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} else {
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set hasStdout 1
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}
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set isintr [::hsm::utils::is_ip_interrupting_current_proc $mhsinst]
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set intcvar intc
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set testfunc_call ""
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if {${hasStdout} == 0} {
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if {$isintr == 1} {
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append testfunc_call "
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{
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int Status;
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Status = XDmaPs_Example_W_Intr(&${intcvar},${deviceid});
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}"
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}
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} else {
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if {$isintr == 1} {
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append testfunc_call "
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{
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int Status;
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print(\"\\r\\n Running XDmaPs_Example_W_Intr() for ${ipname}...\\r\\n\");
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Status = XDmaPs_Example_W_Intr(&${intcvar},${deviceid});
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if (Status == 0) {
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print(\"XDmaPs_Example_W_Intr PASSED\\r\\n\");
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}
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else {
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print(\"XDmaPs_Example_W_Intr FAILED\\r\\n\");
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}
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}"
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}
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}
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return $testfunc_call
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}
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17
XilinxProcessorIPLib/drivers/dmaps/examples/index.html
Executable file
17
XilinxProcessorIPLib/drivers/dmaps/examples/index.html
Executable file
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
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<html>
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<head>
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<meta http-equiv="Content-Language" content="en-us">
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<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
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<title>Driver example applications</title>
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<link rel="stylesheet" type="text/css" href="../help.css">
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</head>
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<body bgcolor="#FFFFFF">
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<h1> Example Applications for the driver dmaps_v2_0 </h1>
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<HR>
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<ul>
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<li>xdmaps_example_w_intr.c <a href="xdmaps_example_w_intr.c">(source)</a> </li>
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</ul>
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<p><font face="Times New Roman" color="#800000">Copyright <20> 1995-2014 Xilinx, Inc. All rights reserved.</font></p>
|
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</body>
|
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</html>
|
430
XilinxProcessorIPLib/drivers/dmaps/examples/xdmaps_example_w_intr.c
Executable file
430
XilinxProcessorIPLib/drivers/dmaps/examples/xdmaps_example_w_intr.c
Executable file
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/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps_example_w_intr.c
|
||||
*
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ------ -------- ----------------------------------------------
|
||||
* 1.00 hbm 08/19/2010 First Release
|
||||
* 1.01a nm 03/05/2012 Initializing DmaCmd structure compatible to armcc.
|
||||
* Modified base address to secure register base
|
||||
* address.
|
||||
* 1.02a sg 05/16/2012 Some code cleanup and reorganisation of the
|
||||
* functions within the example.
|
||||
* 1.06a kpc 04/24/2012 Modified the APIs to make this file compatible with
|
||||
* peripheral test suite.
|
||||
* </pre>
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include "sleep.h"
|
||||
#include "xparameters.h"
|
||||
#include "xil_types.h"
|
||||
#include "xil_assert.h"
|
||||
#include "xil_io.h"
|
||||
#include "xil_exception.h"
|
||||
#include "xil_cache.h"
|
||||
#include "xil_printf.h"
|
||||
#include "xscugic.h"
|
||||
#include "xdmaps.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
/*
|
||||
* The following constants map to the XPAR parameters created in the
|
||||
* xparameters.h file. They are defined here such that a user can easily
|
||||
* change all the needed parameters in one place.
|
||||
*/
|
||||
#define DMA_DEVICE_ID XPAR_XDMAPS_1_DEVICE_ID
|
||||
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
|
||||
|
||||
#define DMA_DONE_INTR_0 XPAR_XDMAPS_0_DONE_INTR_0
|
||||
#define DMA_DONE_INTR_1 XPAR_XDMAPS_0_DONE_INTR_1
|
||||
#define DMA_DONE_INTR_2 XPAR_XDMAPS_0_DONE_INTR_2
|
||||
#define DMA_DONE_INTR_3 XPAR_XDMAPS_0_DONE_INTR_3
|
||||
#define DMA_DONE_INTR_4 XPAR_XDMAPS_0_DONE_INTR_4
|
||||
#define DMA_DONE_INTR_5 XPAR_XDMAPS_0_DONE_INTR_5
|
||||
#define DMA_DONE_INTR_6 XPAR_XDMAPS_0_DONE_INTR_6
|
||||
#define DMA_DONE_INTR_7 XPAR_XDMAPS_0_DONE_INTR_7
|
||||
#define DMA_FAULT_INTR XPAR_XDMAPS_0_FAULT_INTR
|
||||
|
||||
|
||||
|
||||
#define TEST_ROUNDS 1 /* Number of loops that the Dma transfers run.*/
|
||||
#define DMA_LENGTH 1024 /* Length of the Dma Transfers */
|
||||
#define TIMEOUT_LIMIT 0x2000 /* Loop count for timeout */
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
int XDmaPs_Example_W_Intr(XScuGic *GicPtr, u16 DeviceId);
|
||||
int SetupInterruptSystem(XScuGic *GicPtr, XDmaPs *DmaPtr);
|
||||
void DmaDoneHandler(unsigned int Channel, XDmaPs_Cmd *DmaCmd,
|
||||
void *CallbackRef);
|
||||
|
||||
/************************** Macro Definitions *****************************/
|
||||
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
static int Src[DMA_LENGTH] __attribute__ ((aligned (32)));
|
||||
static int Dst[DMA_LENGTH] __attribute__ ((aligned (32)));
|
||||
|
||||
XDmaPs DmaInstance;
|
||||
#ifndef TESTAPP_GEN
|
||||
XScuGic GicInstance;
|
||||
#endif
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This is the main function for the DmaPs interrupt example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef TESTAPP_GEN
|
||||
int main(void)
|
||||
{
|
||||
int Status;
|
||||
|
||||
Status = XDmaPs_Example_W_Intr(&GicInstance,DMA_DEVICE_ID);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("Error: XDMaPs_Example_W_Intr failed\r\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
xil_printf("XDMaPs_Example_W_Intr passed\r\n");
|
||||
return XST_SUCCESS;
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Interrupt Example to test the DMA.
|
||||
*
|
||||
* @param DeviceId is the Device ID of the DMA controller.
|
||||
*
|
||||
* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
****************************************************************************/
|
||||
int XDmaPs_Example_W_Intr(XScuGic *GicPtr, u16 DeviceId)
|
||||
{
|
||||
int Index;
|
||||
unsigned int Channel = 0;
|
||||
int Status;
|
||||
int TestStatus;
|
||||
int TestRound;
|
||||
int TimeOutCnt;
|
||||
volatile int Checked[XDMAPS_CHANNELS_PER_DEV];
|
||||
XDmaPs_Config *DmaCfg;
|
||||
XDmaPs *DmaInst = &DmaInstance;
|
||||
XDmaPs_Cmd DmaCmd;
|
||||
|
||||
memset(&DmaCmd, 0, sizeof(XDmaPs_Cmd));
|
||||
|
||||
DmaCmd.ChanCtrl.SrcBurstSize = 4;
|
||||
DmaCmd.ChanCtrl.SrcBurstLen = 4;
|
||||
DmaCmd.ChanCtrl.SrcInc = 1;
|
||||
DmaCmd.ChanCtrl.DstBurstSize = 4;
|
||||
DmaCmd.ChanCtrl.DstBurstLen = 4;
|
||||
DmaCmd.ChanCtrl.DstInc = 1;
|
||||
DmaCmd.BD.SrcAddr = (u32) Src;
|
||||
DmaCmd.BD.DstAddr = (u32) Dst;
|
||||
DmaCmd.BD.Length = DMA_LENGTH * sizeof(int);
|
||||
|
||||
|
||||
/*
|
||||
* Initialize the DMA Driver
|
||||
*/
|
||||
DmaCfg = XDmaPs_LookupConfig(DeviceId);
|
||||
if (DmaCfg == NULL) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
Status = XDmaPs_CfgInitialize(DmaInst,
|
||||
DmaCfg,
|
||||
DmaCfg->BaseAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Setup the interrupt system.
|
||||
*/
|
||||
Status = SetupInterruptSystem(GicPtr, DmaInst);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
|
||||
TestStatus = XST_SUCCESS;
|
||||
|
||||
for (TestRound = 0; TestRound < TEST_ROUNDS; TestRound++) {
|
||||
xil_printf("Test round %d\r\n", TestRound);
|
||||
for (Channel = 0;
|
||||
Channel < XDMAPS_CHANNELS_PER_DEV;
|
||||
Channel++) {
|
||||
|
||||
|
||||
/* Initialize source */
|
||||
for (Index = 0; Index < DMA_LENGTH; Index++)
|
||||
Src[Index] = DMA_LENGTH - Index;
|
||||
|
||||
/* Clear destination */
|
||||
for (Index = 0; Index < DMA_LENGTH; Index++)
|
||||
Dst[Index] = 0;
|
||||
|
||||
Checked[Channel] = 0;
|
||||
|
||||
/* Set the Done interrupt handler */
|
||||
XDmaPs_SetDoneHandler(DmaInst,
|
||||
Channel,
|
||||
DmaDoneHandler,
|
||||
(void *)Checked);
|
||||
|
||||
|
||||
Status = XDmaPs_Start(DmaInst, Channel, &DmaCmd, 0);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
TimeOutCnt = 0;
|
||||
|
||||
/* Now the DMA is done */
|
||||
while (!Checked[Channel]
|
||||
&& TimeOutCnt < TIMEOUT_LIMIT) {
|
||||
TimeOutCnt++;
|
||||
}
|
||||
|
||||
if (TimeOutCnt >= TIMEOUT_LIMIT) {
|
||||
TestStatus = XST_FAILURE;
|
||||
}
|
||||
|
||||
if (Checked[Channel] < 0) {
|
||||
/* DMA controller failed */
|
||||
TestStatus = XST_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return TestStatus;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function connects the interrupt handler of the interrupt controller to
|
||||
* the processor. This function is seperate to allow it to be customized for
|
||||
* each application. Each processor or RTOS may require unique processing to
|
||||
* connect the interrupt handler.
|
||||
*
|
||||
* @param GicPtr is the GIC instance pointer.
|
||||
* @param DmaPtr is the DMA instance pointer.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
****************************************************************************/
|
||||
int SetupInterruptSystem(XScuGic *GicPtr, XDmaPs *DmaPtr)
|
||||
{
|
||||
int Status;
|
||||
#ifndef TESTAPP_GEN
|
||||
XScuGic_Config *GicConfig;
|
||||
|
||||
|
||||
Xil_ExceptionInit();
|
||||
|
||||
/*
|
||||
* Initialize the interrupt controller driver so that it is ready to
|
||||
* use.
|
||||
*/
|
||||
GicConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
|
||||
if (NULL == GicConfig) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
Status = XScuGic_CfgInitialize(GicPtr, GicConfig,
|
||||
GicConfig->CpuBaseAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Connect the interrupt controller interrupt handler to the hardware
|
||||
* interrupt handling logic in the processor.
|
||||
*/
|
||||
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
|
||||
(Xil_ExceptionHandler)XScuGic_InterruptHandler,
|
||||
GicPtr);
|
||||
#endif
|
||||
/*
|
||||
* Connect the device driver handlers that will be called when an interrupt
|
||||
* for the device occurs, the device driver handler performs the specific
|
||||
* interrupt processing for the device
|
||||
*/
|
||||
|
||||
/*
|
||||
* Connect the Fault ISR
|
||||
*/
|
||||
Status = XScuGic_Connect(GicPtr,
|
||||
DMA_FAULT_INTR,
|
||||
(Xil_InterruptHandler)XDmaPs_FaultISR,
|
||||
(void *)DmaPtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Connect the Done ISR for all 8 channels of DMA 0
|
||||
*/
|
||||
Status = XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_0,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_0,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_1,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_1,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_2,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_2,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_3,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_3,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_4,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_4,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_5,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_5,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_6,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_6,
|
||||
(void *)DmaPtr);
|
||||
Status |= XScuGic_Connect(GicPtr,
|
||||
DMA_DONE_INTR_7,
|
||||
(Xil_InterruptHandler)XDmaPs_DoneISR_7,
|
||||
(void *)DmaPtr);
|
||||
|
||||
if (Status != XST_SUCCESS)
|
||||
return XST_FAILURE;
|
||||
|
||||
/*
|
||||
* Enable the interrupts for the device
|
||||
*/
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_0);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_1);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_2);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_3);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_4);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_5);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_6);
|
||||
XScuGic_Enable(GicPtr, DMA_DONE_INTR_7);
|
||||
XScuGic_Enable(GicPtr, DMA_FAULT_INTR);
|
||||
|
||||
Xil_ExceptionEnable();
|
||||
|
||||
return XST_SUCCESS;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* DmaDoneHandler.
|
||||
*
|
||||
* @param Channel is the Channel number.
|
||||
* @param DmaCmd is the Dma Command.
|
||||
* @param CallbackRef is the callback reference data.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
******************************************************************************/
|
||||
void DmaDoneHandler(unsigned int Channel, XDmaPs_Cmd *DmaCmd, void *CallbackRef)
|
||||
{
|
||||
|
||||
/* done handler */
|
||||
volatile int *Checked = (volatile int *)CallbackRef;
|
||||
int Index;
|
||||
int Status = 1;
|
||||
int *Src;
|
||||
int *Dst;
|
||||
|
||||
Src = (int *)DmaCmd->BD.SrcAddr;
|
||||
Dst = (int *)DmaCmd->BD.DstAddr;
|
||||
|
||||
/* DMA successful */
|
||||
/* compare the src and dst buffer */
|
||||
for (Index = 0; Index < DMA_LENGTH; Index++) {
|
||||
if ((Src[Index] != Dst[Index]) ||
|
||||
(Dst[Index] != DMA_LENGTH - Index)) {
|
||||
Status = -XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Checked[Channel] = Status;
|
||||
}
|
||||
|
||||
|
41
XilinxProcessorIPLib/drivers/dmaps/src/Makefile
Executable file
41
XilinxProcessorIPLib/drivers/dmaps/src/Makefile
Executable file
|
@ -0,0 +1,41 @@
|
|||
COMPILER=
|
||||
ARCHIVER=
|
||||
CP=cp
|
||||
COMPILER_FLAGS=
|
||||
EXTRA_COMPILER_FLAGS=
|
||||
LIB=libxil.a
|
||||
|
||||
CC_FLAGS = $(COMPILER_FLAGS)
|
||||
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
|
||||
|
||||
RELEASEDIR=../../../lib
|
||||
INCLUDEDIR=../../../include
|
||||
INCLUDES=-I./. -I${INCLUDEDIR}
|
||||
|
||||
OUTS = *.o
|
||||
|
||||
LIBSOURCES:=*.c
|
||||
INCLUDEFILES:=*.h
|
||||
|
||||
OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
|
||||
|
||||
libs: banner xdmaps_libs clean
|
||||
|
||||
%.o: %.c
|
||||
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
|
||||
|
||||
banner:
|
||||
echo "Compiling dmaps"
|
||||
|
||||
xdmaps_libs: ${OBJECTS}
|
||||
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
|
||||
|
||||
.PHONY: include
|
||||
include: xdmaps_includes
|
||||
|
||||
xdmaps_includes:
|
||||
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
|
||||
|
||||
clean:
|
||||
rm -rf ${OBJECTS}
|
||||
|
1980
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps.c
Executable file
1980
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps.c
Executable file
File diff suppressed because it is too large
Load diff
316
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps.h
Executable file
316
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps.h
Executable file
|
@ -0,0 +1,316 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps.h
|
||||
*
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ------ -------- ----------------------------------------------
|
||||
* 1.00 hbm 08/19/10 First Release
|
||||
* 1.01a nm 12/20/12 Added definition XDMAPS_CHANNELS_PER_DEV which specifies
|
||||
* the maximum number of channels.
|
||||
* Replaced the usage of XPAR_XDMAPS_CHANNELS_PER_DEV
|
||||
* with XDMAPS_CHANNELS_PER_DEV defined in xdmaps_hw.h.
|
||||
* Added the tcl file to automatically generate the
|
||||
* xparameters.h
|
||||
* 1.02a sg 05/16/12 Made changes for doxygen and moved some function
|
||||
* header from the xdmaps.h file to xdmaps.c file
|
||||
* Other cleanup for coding guidelines and CR 657109
|
||||
* and CR 657898
|
||||
* The xdmaps_example_no_intr.c example is removed
|
||||
* as it is using interrupts and is similar to
|
||||
* the interrupt example - CR 652477
|
||||
* 1.03a sg 07/16/2012 changed inline to __inline for CR665681
|
||||
* 1.04a nm 10/22/2012 Fixed CR# 681671.
|
||||
* 1.05a nm 04/15/2013 Fixed CR# 704396. Removed warnings when compiled
|
||||
* with -Wall and -Wextra option in bsp.
|
||||
* 05/01/2013 Fixed CR# 700189. Changed XDmaPs_BuildDmaProg()
|
||||
* function description.
|
||||
* Fixed CR# 704396. Removed unused variables
|
||||
* UseM2MByte & MemBurstLen from XDmaPs_BuildDmaProg()
|
||||
* function.
|
||||
* 1.07a asa 11/02/13. Made changes to fix compilation issues for iarcc.
|
||||
* Removed the PDBG prints. By default they were always
|
||||
* defined out and never used. The PDBG is non-standard for
|
||||
* Xilinx drivers and no other driver does something similar.
|
||||
* Since there is no easy way to fix compilation issues with
|
||||
* the IARCC compiler around PDBG, it is better to remove it.
|
||||
* Users can always use xil_printfs if they want to debug.
|
||||
* 2.0 adk 10/12/13 Updated as per the New Tcl API's
|
||||
* </pre>
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef XDMAPS_H /* prevent circular inclusions */
|
||||
#define XDMAPS_H /* by using protection macros */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************** Include Files ********************************/
|
||||
|
||||
#include "xparameters.h"
|
||||
#include "xil_types.h"
|
||||
#include "xil_assert.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
#include "xdmaps_hw.h"
|
||||
|
||||
/************************** Constant Definitions ****************************/
|
||||
|
||||
/**************************** Type Definitions ******************************/
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information for the device.
|
||||
*/
|
||||
typedef struct {
|
||||
u16 DeviceId; /**< Unique ID of device */
|
||||
u32 BaseAddress; /**< Base address of device (IPIF) */
|
||||
} XDmaPs_Config;
|
||||
|
||||
|
||||
/** DMA channle control structure. It's for AXI bus transaction.
|
||||
* This struct will be translated into a 32-bit channel control register value.
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned int EndianSwapSize; /**< Endian swap size. */
|
||||
unsigned int DstCacheCtrl; /**< Destination cache control */
|
||||
unsigned int DstProtCtrl; /**< Destination protection control */
|
||||
unsigned int DstBurstLen; /**< Destination burst length */
|
||||
unsigned int DstBurstSize; /**< Destination burst size */
|
||||
unsigned int DstInc; /**< Destination incrementing or fixed
|
||||
* address */
|
||||
unsigned int SrcCacheCtrl; /**< Source cache control */
|
||||
unsigned int SrcProtCtrl; /**< Source protection control */
|
||||
unsigned int SrcBurstLen; /**< Source burst length */
|
||||
unsigned int SrcBurstSize; /**< Source burst size */
|
||||
unsigned int SrcInc; /**< Source incrementing or fixed
|
||||
* address */
|
||||
} XDmaPs_ChanCtrl;
|
||||
|
||||
/** DMA block descriptor stucture.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 SrcAddr; /**< Source starting address */
|
||||
u32 DstAddr; /**< Destination starting address */
|
||||
unsigned int Length; /**< Number of bytes for the block */
|
||||
} XDmaPs_BD;
|
||||
|
||||
/**
|
||||
* A DMA command consisits of a channel control struct, a block descriptor,
|
||||
* a user defined program, a pointer pointing to generated DMA program, and
|
||||
* execution result.
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
XDmaPs_ChanCtrl ChanCtrl; /**< Channel Control Struct */
|
||||
XDmaPs_BD BD; /**< Together with SgLength field,
|
||||
* it's a scatter-gather list.
|
||||
*/
|
||||
void *UserDmaProg; /**< If user wants the driver to
|
||||
* execute their own DMA program,
|
||||
* this field points to the DMA
|
||||
* program.
|
||||
*/
|
||||
int UserDmaProgLength; /**< The length of user defined
|
||||
* DMA program.
|
||||
*/
|
||||
|
||||
void *GeneratedDmaProg; /**< The DMA program genreated
|
||||
* by the driver. This field will be
|
||||
* set if a user invokes the DMA
|
||||
* program generation function. Or
|
||||
* the DMA command is finished and
|
||||
* a user informs the driver not to
|
||||
* release the program buffer.
|
||||
* This field has two purposes, one
|
||||
* is to ask the driver to generate
|
||||
* a DMA program while the DMAC is
|
||||
* performaning DMA transactions. The
|
||||
* other purpose is to debug the
|
||||
* driver.
|
||||
*/
|
||||
int GeneratedDmaProgLength; /**< The length of the DMA program
|
||||
* generated by the driver
|
||||
*/
|
||||
int DmaStatus; /**< 0 on success, otherwise error code
|
||||
*/
|
||||
u32 ChanFaultType; /**< Channel fault type in case of fault
|
||||
*/
|
||||
u32 ChanFaultPCAddr; /**< Channel fault PC address
|
||||
*/
|
||||
} XDmaPs_Cmd;
|
||||
|
||||
/**
|
||||
* It's the done handler a user can set for a channel
|
||||
*/
|
||||
typedef void (*XDmaPsDoneHandler) (unsigned int Channel,
|
||||
XDmaPs_Cmd *DmaCmd,
|
||||
void *CallbackRef);
|
||||
|
||||
/**
|
||||
* It's the fault handler a user can set for a channel
|
||||
*/
|
||||
typedef void (*XDmaPsFaultHandler) (unsigned int Channel,
|
||||
XDmaPs_Cmd *DmaCmd,
|
||||
void *CallbackRef);
|
||||
|
||||
#define XDMAPS_MAX_CHAN_BUFS 2
|
||||
#define XDMAPS_CHAN_BUF_LEN 128
|
||||
|
||||
/**
|
||||
* The XDmaPs_ProgBuf is the struct for a DMA program buffer.
|
||||
*/
|
||||
typedef struct {
|
||||
char Buf[XDMAPS_CHAN_BUF_LEN]; /**< The actual buffer the holds the
|
||||
* content */
|
||||
unsigned Len; /**< The actual length of the DMA
|
||||
* program in bytes. */
|
||||
int Allocated; /**< A tag indicating whether the
|
||||
* buffer is allocated or not */
|
||||
} XDmaPs_ProgBuf;
|
||||
|
||||
/**
|
||||
* The XDmaPs_ChannelData is a struct to book keep individual channel of
|
||||
* the DMAC.
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned DevId; /**< Device id indicating which DMAC */
|
||||
unsigned ChanId; /**< Channel number of the DMAC */
|
||||
XDmaPs_ProgBuf ProgBufPool[XDMAPS_MAX_CHAN_BUFS]; /**< A pool of
|
||||
program buffers*/
|
||||
XDmaPsDoneHandler DoneHandler; /**< Done interrupt handler */
|
||||
void *DoneRef; /**< Done interrupt callback data */
|
||||
XDmaPs_Cmd *DmaCmdToHw; /**< DMA command being executed */
|
||||
XDmaPs_Cmd *DmaCmdFromHw; /**< DMA command that is finished.
|
||||
* This field is for debugging purpose
|
||||
*/
|
||||
int HoldDmaProg; /**< A tag indicating whether to hold the
|
||||
* DMA program after the DMA is done.
|
||||
*/
|
||||
|
||||
} XDmaPs_ChannelData;
|
||||
|
||||
/**
|
||||
* The XDmaPs driver instance data structure. A pointer to an instance data
|
||||
* structure is passed around by functions to refer to a specific driver
|
||||
* instance.
|
||||
*/
|
||||
typedef struct {
|
||||
XDmaPs_Config Config; /**< Configuration data structure */
|
||||
int IsReady; /**< Device is Ready */
|
||||
int CacheLength; /**< icache length */
|
||||
XDmaPsFaultHandler FaultHandler; /**< fault interrupt handler */
|
||||
void *FaultRef; /**< fault call back data */
|
||||
XDmaPs_ChannelData Chans[XDMAPS_CHANNELS_PER_DEV];
|
||||
/**<
|
||||
* channel data
|
||||
*/
|
||||
} XDmaPs;
|
||||
|
||||
/*
|
||||
* Functions implemented in xdmaps.c
|
||||
*/
|
||||
int XDmaPs_CfgInitialize(XDmaPs *InstPtr,
|
||||
XDmaPs_Config *Config,
|
||||
u32 EffectiveAddr);
|
||||
|
||||
int XDmaPs_Start(XDmaPs *InstPtr, unsigned int Channel,
|
||||
XDmaPs_Cmd *Cmd,
|
||||
int HoldDmaProg);
|
||||
|
||||
int XDmaPs_IsActive(XDmaPs *InstPtr, unsigned int Channel);
|
||||
int XDmaPs_GenDmaProg(XDmaPs *InstPtr, unsigned int Channel,
|
||||
XDmaPs_Cmd *Cmd);
|
||||
int XDmaPs_FreeDmaProg(XDmaPs *InstPtr, unsigned int Channel,
|
||||
XDmaPs_Cmd *Cmd);
|
||||
void XDmaPs_Print_DmaProg(XDmaPs_Cmd *Cmd);
|
||||
|
||||
|
||||
int XDmaPs_ResetManager(XDmaPs *InstPtr);
|
||||
int XDmaPs_ResetChannel(XDmaPs *InstPtr, unsigned int Channel);
|
||||
|
||||
|
||||
int XDmaPs_SetDoneHandler(XDmaPs *InstPtr,
|
||||
unsigned Channel,
|
||||
XDmaPsDoneHandler DoneHandler,
|
||||
void *CallbackRef);
|
||||
|
||||
int XDmaPs_SetFaultHandler(XDmaPs *InstPtr,
|
||||
XDmaPsFaultHandler FaultHandler,
|
||||
void *CallbackRef);
|
||||
|
||||
void XDmaPs_Print_DmaProg(XDmaPs_Cmd *Cmd);
|
||||
|
||||
/**
|
||||
* Driver done interrupt service routines for the channels.
|
||||
* We need this done ISR mainly because the driver needs to release the
|
||||
* DMA program buffer. This is the one that connects the GIC
|
||||
*/
|
||||
void XDmaPs_DoneISR_0(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_1(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_2(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_3(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_4(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_5(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_6(XDmaPs *InstPtr);
|
||||
void XDmaPs_DoneISR_7(XDmaPs *InstPtr);
|
||||
|
||||
/**
|
||||
* Driver fault interrupt service routine
|
||||
*/
|
||||
void XDmaPs_FaultISR(XDmaPs *InstPtr);
|
||||
|
||||
|
||||
/*
|
||||
* Static loopup function implemented in xdmaps_sinit.c
|
||||
*/
|
||||
XDmaPs_Config *XDmaPs_LookupConfig(u16 DeviceId);
|
||||
|
||||
|
||||
/*
|
||||
* self-test functions in xdmaps_selftest.c
|
||||
*/
|
||||
int XDmaPs_SelfTest(XDmaPs *InstPtr);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
77
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_g.c
Executable file
77
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_g.c
Executable file
|
@ -0,0 +1,77 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps_g.c
|
||||
*
|
||||
* This file contains a configuration table where each entry is a configuration
|
||||
* structure for an XDmaPs device in the system.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ------ -------- -----------------------------------------------
|
||||
* 1.00 hbm 08/19/2010 First Release
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xparameters.h"
|
||||
#include "xdmaps.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
|
||||
/************************** Variable Prototypes ******************************/
|
||||
|
||||
/**
|
||||
* Each XDmaPs device in the system has an entry in this table.
|
||||
*/
|
||||
XDmaPs_Config XDmaPs_ConfigTable[] = {
|
||||
{
|
||||
XPAR_XDMAPS_0_DEVICE_ID,
|
||||
XPAR_XDMAPS_0_BASEADDR,
|
||||
},
|
||||
};
|
113
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_hw.c
Executable file
113
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_hw.c
Executable file
|
@ -0,0 +1,113 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps_hw.c
|
||||
*
|
||||
* This file contains the implementation of the interface reset functionality
|
||||
* for XDmaPs driver.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ------ -------- ----------------------------------------------
|
||||
* 1.06a kpc 10/07/13 First release
|
||||
* </pre>
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/***************************** Include Files ********************************/
|
||||
#include "xdmaps_hw.h"
|
||||
|
||||
/************************** Constant Definitions ****************************/
|
||||
|
||||
/**************************** Type Definitions ******************************/
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions ********************/
|
||||
#ifndef XDMAPS_MAX_WAIT
|
||||
#define XDMAPS_MAX_WAIT 4000
|
||||
#endif
|
||||
/************************** Function Prototypes *****************************/
|
||||
|
||||
/************************** Variable Definitions ****************************/
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* This function perform the reset sequence to the given dmaps interface by
|
||||
* configuring the appropriate control bits in the dmaps specifc registers
|
||||
* the dmaps reset squence involves the following steps
|
||||
* Disable all the interuupts
|
||||
* Clear the pending interrupts
|
||||
* Kill all the active channel threads
|
||||
* Kill the manager thread
|
||||
*
|
||||
* @param BaseAddress of the interface
|
||||
*
|
||||
* @return N/A
|
||||
*
|
||||
* @note
|
||||
* This function will not modify the slcr registers that are relavant for
|
||||
* dmaps controller
|
||||
******************************************************************************/
|
||||
void XDmaPs_ResetHw(u32 BaseAddress)
|
||||
{
|
||||
u32 DbgInst;
|
||||
u32 WaitCount = 0;
|
||||
u32 ChanIndex;
|
||||
|
||||
/* Disable all the interrupts */
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_INTEN_OFFSET, 0x00);
|
||||
/* Clear the interrupts */
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_INTCLR_OFFSET, XDMAPS_INTCLR_ALL_MASK);
|
||||
/* Kill the dma channel threads */
|
||||
for (ChanIndex=0; ChanIndex < XDMAPS_CHANNELS_PER_DEV; ChanIndex++) {
|
||||
while ((XDmaPs_ReadReg(BaseAddress, XDMAPS_DBGSTATUS_OFFSET)
|
||||
& XDMAPS_DBGSTATUS_BUSY)
|
||||
&& (WaitCount < XDMAPS_MAX_WAIT))
|
||||
WaitCount++;
|
||||
|
||||
DbgInst = XDmaPs_DBGINST0(0, 0x01, ChanIndex, 1);
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST0_OFFSET, DbgInst);
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST1_OFFSET, 0x0);
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGCMD_OFFSET, 0x0);
|
||||
}
|
||||
/* Kill the manager thread */
|
||||
DbgInst = XDmaPs_DBGINST0(0, 0x01, 0, 0);
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST0_OFFSET, DbgInst);
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGINST1_OFFSET, 0x0);
|
||||
XDmaPs_WriteReg(BaseAddress, XDMAPS_DBGCMD_OFFSET, 0x0);
|
||||
}
|
||||
|
||||
|
||||
|
290
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_hw.h
Executable file
290
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_hw.h
Executable file
|
@ -0,0 +1,290 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps_hw.h
|
||||
*
|
||||
* This header file contains the hardware interface of an XDmaPs device.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- ----------------------------------------------
|
||||
* 1.00a hbm 08/18/10 First Release
|
||||
* 1.01a nm 12/20/12 Added definition XDMAPS_CHANNELS_PER_DEV which specifies
|
||||
* the maximum number of channels.
|
||||
* Replaced the usage of XPAR_XDMAPS_CHANNELS_PER_DEV
|
||||
* with XDMAPS_CHANNELS_PER_DEV defined in xdmaps_hw.h
|
||||
* 1.02a sg 05/16/12 Made changes for doxygen
|
||||
* 1.06a kpc 07/10/13 Added function prototype
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef XDMAPS_HW_H /* prevent circular inclusions */
|
||||
#define XDMAPS_HW_H /* by using protection macros */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xil_types.h"
|
||||
#include "xil_assert.h"
|
||||
#include "xil_io.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
/** @name Register Map
|
||||
*
|
||||
* Register offsets for the DMAC.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define XDMAPS_DS_OFFSET 0x000 /* DMA Status Register */
|
||||
#define XDMAPS_DPC_OFFSET 0x004 /* DMA Program Counter Rregister */
|
||||
#define XDMAPS_INTEN_OFFSET 0X020 /* DMA Interrupt Enable Register */
|
||||
#define XDMAPS_ES_OFFSET 0x024 /* DMA Event Status Register */
|
||||
#define XDMAPS_INTSTATUS_OFFSET 0x028 /* DMA Interrupt Status Register
|
||||
*/
|
||||
#define XDMAPS_INTCLR_OFFSET 0x02c /* DMA Interrupt Clear Register */
|
||||
#define XDMAPS_FSM_OFFSET 0x030 /* DMA Fault Status DMA Manager
|
||||
* Register
|
||||
*/
|
||||
#define XDMAPS_FSC_OFFSET 0x034 /* DMA Fault Status DMA Chanel Register
|
||||
*/
|
||||
#define XDMAPS_FTM_OFFSET 0x038 /* DMA Fault Type DMA Manager Register */
|
||||
|
||||
#define XDMAPS_FTC0_OFFSET 0x040 /* DMA Fault Type for DMA Channel 0 */
|
||||
/*
|
||||
* The offset for the rest of the FTC registers is calculated as
|
||||
* FTC0 + dev_chan_num * 4
|
||||
*/
|
||||
#define XDmaPs_FTCn_OFFSET(ch) (XDMAPS_FTC0_OFFSET + (ch) * 4)
|
||||
|
||||
#define XDMAPS_CS0_OFFSET 0x100 /* Channel Status for DMA Channel 0 */
|
||||
/*
|
||||
* The offset for the rest of the CS registers is calculated as
|
||||
* CS0 + * dev_chan_num * 0x08
|
||||
*/
|
||||
#define XDmaPs_CSn_OFFSET(ch) (XDMAPS_CS0_OFFSET + (ch) * 8)
|
||||
|
||||
#define XDMAPS_CPC0_OFFSET 0x104 /* Channel Program Counter for DMA
|
||||
* Channel 0
|
||||
*/
|
||||
/*
|
||||
* The offset for the rest of the CPC registers is calculated as
|
||||
* CPC0 + dev_chan_num * 0x08
|
||||
*/
|
||||
#define XDmaPs_CPCn_OFFSET(ch) (XDMAPS_CPC0_OFFSET + (ch) * 8)
|
||||
|
||||
#define XDMAPS_SA_0_OFFSET 0x400 /* Source Address Register for DMA
|
||||
* Channel 0
|
||||
*/
|
||||
/* The offset for the rest of the SA registers is calculated as
|
||||
* SA_0 + dev_chan_num * 0x20
|
||||
*/
|
||||
#define XDmaPs_SA_n_OFFSET(ch) (XDMAPS_SA_0_OFFSET + (ch) * 0x20)
|
||||
|
||||
#define XDMAPS_DA_0_OFFSET 0x404 /* Destination Address Register for
|
||||
* DMA Channel 0
|
||||
*/
|
||||
/* The offset for the rest of the DA registers is calculated as
|
||||
* DA_0 + dev_chan_num * 0x20
|
||||
*/
|
||||
#define XDmaPs_DA_n_OFFSET(ch) (XDMAPS_DA_0_OFFSET + (ch) * 0x20)
|
||||
|
||||
#define XDMAPS_CC_0_OFFSET 0x408 /* Channel Control Register for
|
||||
* DMA Channel 0
|
||||
*/
|
||||
/*
|
||||
* The offset for the rest of the CC registers is calculated as
|
||||
* CC_0 + dev_chan_num * 0x20
|
||||
*/
|
||||
#define XDmaPs_CC_n_OFFSET(ch) (XDMAPS_CC_0_OFFSET + (ch) * 0x20)
|
||||
|
||||
#define XDMAPS_LC0_0_OFFSET 0x40C /* Loop Counter 0 for DMA Channel 0 */
|
||||
/*
|
||||
* The offset for the rest of the LC0 registers is calculated as
|
||||
* LC_0 + dev_chan_num * 0x20
|
||||
*/
|
||||
#define XDmaPs_LC0_n_OFFSET(ch) (XDMAPS_LC0_0_OFFSET + (ch) * 0x20)
|
||||
#define XDMAPS_LC1_0_OFFSET 0x410 /* Loop Counter 1 for DMA Channel 0 */
|
||||
/*
|
||||
* The offset for the rest of the LC1 registers is calculated as
|
||||
* LC_0 + dev_chan_num * 0x20
|
||||
*/
|
||||
#define XDmaPs_LC1_n_OFFSET(ch) (XDMAPS_LC1_0_OFFSET + (ch) * 0x20)
|
||||
|
||||
#define XDMAPS_DBGSTATUS_OFFSET 0xD00 /* Debug Status Register */
|
||||
#define XDMAPS_DBGCMD_OFFSET 0xD04 /* Debug Command Register */
|
||||
#define XDMAPS_DBGINST0_OFFSET 0xD08 /* Debug Instruction 0 Register */
|
||||
#define XDMAPS_DBGINST1_OFFSET 0xD0C /* Debug Instruction 1 Register */
|
||||
|
||||
#define XDMAPS_CR0_OFFSET 0xE00 /* Configuration Register 0 */
|
||||
#define XDMAPS_CR1_OFFSET 0xE04 /* Configuration Register 1 */
|
||||
#define XDMAPS_CR2_OFFSET 0xE08 /* Configuration Register 2 */
|
||||
#define XDMAPS_CR3_OFFSET 0xE0C /* Configuration Register 3 */
|
||||
#define XDMAPS_CR4_OFFSET 0xE10 /* Configuration Register 4 */
|
||||
#define XDMAPS_CRDN_OFFSET 0xE14 /* Configuration Register Dn */
|
||||
|
||||
#define XDMAPS_PERIPH_ID_0_OFFSET 0xFE0 /* Peripheral Identification
|
||||
* Register 0
|
||||
*/
|
||||
#define XDMAPS_PERIPH_ID_1_OFFSET 0xFE4 /* Peripheral Identification
|
||||
* Register 1
|
||||
*/
|
||||
#define XDMAPS_PERIPH_ID_2_OFFSET 0xFE8 /* Peripheral Identification
|
||||
* Register 2
|
||||
*/
|
||||
#define XDMAPS_PERIPH_ID_3_OFFSET 0xFEC /* Peripheral Identification
|
||||
* Register 3
|
||||
*/
|
||||
#define XDMAPS_PCELL_ID_0_OFFSET 0xFF0 /* PrimeCell Identification
|
||||
* Register 0
|
||||
*/
|
||||
#define XDMAPS_PCELL_ID_1_OFFSET 0xFF4 /* PrimeCell Identification
|
||||
* Register 1
|
||||
*/
|
||||
#define XDMAPS_PCELL_ID_2_OFFSET 0xFF8 /* PrimeCell Identification
|
||||
* Register 2
|
||||
*/
|
||||
#define XDMAPS_PCELL_ID_3_OFFSET 0xFFC /* PrimeCell Identification
|
||||
* Register 3
|
||||
*/
|
||||
|
||||
/*
|
||||
* Some useful register masks
|
||||
*/
|
||||
#define XDMAPS_DS_DMA_STATUS 0x0F /* DMA status mask */
|
||||
#define XDMAPS_DS_DMA_STATUS_STOPPED 0x00 /* debug status busy mask */
|
||||
|
||||
#define XDMAPS_DBGSTATUS_BUSY 0x01 /* debug status busy mask */
|
||||
|
||||
#define XDMAPS_CS_ACTIVE_MASK 0x07 /* channel status active mask,
|
||||
* llast 3 bits of CS register
|
||||
*/
|
||||
|
||||
#define XDMAPS_CR1_I_CACHE_LEN_MASK 0x07 /* i_cache_len mask */
|
||||
|
||||
|
||||
/*
|
||||
* XDMAPS_DBGINST0 - constructs the word for the Debug Instruction-0 Register.
|
||||
* @b1: Instruction byte 1
|
||||
* @b0: Instruction byte 0
|
||||
* @ch: Channel number
|
||||
* @dbg_th: Debug thread encoding: 0 = DMA manager thread, 1 = DMA channel
|
||||
*/
|
||||
#define XDmaPs_DBGINST0(b1, b0, ch, dbg_th) \
|
||||
(((b1) << 24) | ((b0) << 16) | (((ch) & 0x7) << 8) | ((dbg_th & 0x1)))
|
||||
|
||||
/* @} */
|
||||
|
||||
/** @name Control Register
|
||||
*
|
||||
* The Control register (CR) controls the major functions of the device.
|
||||
*
|
||||
* Control Register Bit Definition
|
||||
*/
|
||||
|
||||
/* @}*/
|
||||
|
||||
|
||||
#define XDMAPS_CHANNELS_PER_DEV 8
|
||||
|
||||
|
||||
/** @name Mode Register
|
||||
*
|
||||
* The mode register (MR) defines the mode of transfer as well as the data
|
||||
* format. If this register is modified during transmission or reception,
|
||||
* data validity cannot be guaranteed.
|
||||
*
|
||||
* Mode Register Bit Definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* @} */
|
||||
|
||||
|
||||
/** @name Interrupt Registers
|
||||
*
|
||||
* Interrupt control logic uses the interrupt enable register (IER) and the
|
||||
* interrupt disable register (IDR) to set the value of the bits in the
|
||||
* interrupt mask register (IMR). The IMR determines whether to pass an
|
||||
* interrupt to the interrupt status register (ISR).
|
||||
* Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an
|
||||
* interrupt. IMR and ISR are read only, and IER and IDR are write only.
|
||||
* Reading either IER or IDR returns 0x00.
|
||||
*
|
||||
* All four registers have the same bit definitions.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* @} */
|
||||
#define XDMAPS_INTCLR_ALL_MASK 0xFF
|
||||
|
||||
#define XDmaPs_ReadReg(BaseAddress, RegOffset) \
|
||||
Xil_In32((BaseAddress) + (RegOffset))
|
||||
|
||||
/***************************************************************************/
|
||||
/**
|
||||
* Write a DMAC register.
|
||||
*
|
||||
* @param BaseAddress contains the base address of the device.
|
||||
* @param RegOffset contains the offset from the base address of the device.
|
||||
* @param RegisterValue is the value to be written to the register.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note
|
||||
* C-Style signature:
|
||||
* void XDmaPs_WriteReg(u32 BaseAddress, int RegOffset,
|
||||
* u32 RegisterValue)
|
||||
******************************************************************************/
|
||||
#define XDmaPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
|
||||
Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
|
||||
/************************** Variable Definitions *****************************/
|
||||
|
||||
/************************** Function Prototypes *****************************/
|
||||
/*
|
||||
* Perform reset operation to the dmaps interface
|
||||
*/
|
||||
void XDmaPs_ResetHw(u32 BaseAddr);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
107
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_selftest.c
Executable file
107
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_selftest.c
Executable file
|
@ -0,0 +1,107 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps_selftest.c
|
||||
*
|
||||
* This file contains the self-test functions for the XDmaPs driver.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ------ -------- -----------------------------------------------
|
||||
* 1.00 hbm 03/29/2010 First Release
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xstatus.h"
|
||||
#include "xdmaps.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function runs a self-test on the driver and hardware device. This self
|
||||
* test performs a local loopback and verifies data can be sent and received.
|
||||
*
|
||||
* The time for this test is proportional to the baud rate that has been set
|
||||
* prior to calling this function.
|
||||
*
|
||||
* The mode and control registers are restored before return.
|
||||
*
|
||||
* @param InstPtr is a pointer to the XDmaPs instance
|
||||
*
|
||||
* @return
|
||||
*
|
||||
* - XST_SUCCESS if the test was successful
|
||||
* - XST_FAILURE if the test failed
|
||||
*
|
||||
* @note
|
||||
*
|
||||
* This function can hang if the hardware is not functioning properly.
|
||||
*
|
||||
******************************************************************************/
|
||||
int XDmaPs_SelfTest(XDmaPs *InstPtr)
|
||||
{
|
||||
u32 BaseAddr = InstPtr->Config.BaseAddress;
|
||||
int i;
|
||||
|
||||
if (XDmaPs_ReadReg(BaseAddr, XDMAPS_DBGSTATUS_OFFSET)
|
||||
& XDMAPS_DBGSTATUS_BUSY)
|
||||
return XST_FAILURE;
|
||||
|
||||
for (i = 0; i < XDMAPS_CHANNELS_PER_DEV; i++) {
|
||||
if (XDmaPs_ReadReg(BaseAddr,
|
||||
XDmaPs_CSn_OFFSET(i)))
|
||||
return XST_FAILURE;
|
||||
}
|
||||
return XST_SUCCESS;
|
||||
}
|
101
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_sinit.c
Executable file
101
XilinxProcessorIPLib/drivers/dmaps/src/xdmaps_sinit.c
Executable file
|
@ -0,0 +1,101 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdmaps_sinit.c
|
||||
*
|
||||
* The implementation of the XDmaPs driver's static initialzation
|
||||
* functionality.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.00 hbm 08/13/10 First Release
|
||||
* </pre>
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/***************************** Include Files ********************************/
|
||||
|
||||
#include "xstatus.h"
|
||||
#include "xparameters.h"
|
||||
#include "xdmaps.h"
|
||||
|
||||
/************************** Constant Definitions ****************************/
|
||||
|
||||
/**************************** Type Definitions ******************************/
|
||||
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions ********************/
|
||||
|
||||
|
||||
/************************** Variable Definitions ****************************/
|
||||
extern XDmaPs_Config XDmaPs_ConfigTable[];
|
||||
|
||||
/************************** Function Prototypes *****************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Looks up the device configuration based on the unique device ID. The table
|
||||
* contains the configuration info for each device in the system.
|
||||
*
|
||||
* @param DeviceId contains the ID of the device
|
||||
*
|
||||
* @return
|
||||
*
|
||||
* A pointer to the configuration structure or NULL if the specified device
|
||||
* is not in the system.
|
||||
*
|
||||
* @note
|
||||
*
|
||||
* None.
|
||||
*
|
||||
******************************************************************************/
|
||||
XDmaPs_Config *XDmaPs_LookupConfig(u16 DeviceId)
|
||||
{
|
||||
XDmaPs_Config *CfgPtr = NULL;
|
||||
|
||||
int i;
|
||||
|
||||
for (i = 0; i < XPAR_XDMAPS_NUM_INSTANCES; i++) {
|
||||
if (XDmaPs_ConfigTable[i].DeviceId == DeviceId) {
|
||||
CfgPtr = &XDmaPs_ConfigTable[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return CfgPtr;
|
||||
}
|
Loading…
Add table
Reference in a new issue