dp: rx: mst: Added an example for MST.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion
Nava kishore Manne
parent
7c48fa85e0
commit
b6e337a188
4 changed files with 984 additions and 1 deletions
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@ -1,5 +1,6 @@
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xdp_selftest_example.c=xdp_selftest_example.c
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xdp_rx_intr_timer_example.c=xdp_rx_intr_timer_example.c
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xdp_rx_mst_example.c=xdp_rx_mst_example.c
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xdp_tx_audio_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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xdp_tx_intr_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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xdp_tx_mst_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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@ -12,6 +12,7 @@
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<ul>
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<li>xdp_selftest_example.c <a href="xdptx_selftest_example.c">(source)</a> </li>
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<li>xdp_rx_intr_timer_example.c <a href="xdprx_intr_timer_example.c">(source)</a> </li>
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<li>xdp_rx_mst_example.c <a href="xdprx_mst_example.c">(source)</a> </li>
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<li>xdp_tx_audio_example.c <a href="xdptx_audio_example.c">(source)</a> </li>
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<li>xdp_tx_intr_example.c <a href="xdptx_intr_example.c">(source)</a> </li>
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<li>xdp_tx_mst_example.c <a href="xdptx_mst_example.c">(source)</a> </li>
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@ -1,4 +1,4 @@
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There is 1 DisplayPort RX example included in this directory:
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There are 2 DisplayPort RX examples included in this directory:
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1) xdp_rx_intr_timer_example.c : This interrupt with timer example shows how to
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set up both the interrupt system with interrupt handlers and how to override
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the default sleep/delay functionality for MicroBlaze. A timer needs to exist
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@ -8,6 +8,10 @@ There is 1 DisplayPort RX example included in this directory:
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accuracy. For ARM/Zynq SoC systems, the supplied callback function will be
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ignored - the usleep function will be called since the SoC has a timer
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built-in.
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2) xdp_rx_mst_example.c : This multi-stream transport (MST) example uses
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interrupts to detect events coming from the TX. The example sets up a
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topology that the RX will respond with, including LINK_ADDRESS reply and I2C
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and DPCD address spaces for the downstream ports.
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Note: All example functions start with Dprx_*, while all driver functions start
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with XDp_*.
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977
XilinxProcessorIPLib/drivers/dp/examples/xdp_rx_mst_example.c
Normal file
977
XilinxProcessorIPLib/drivers/dp/examples/xdp_rx_mst_example.c
Normal file
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@ -0,0 +1,977 @@
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/*******************************************************************************
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*
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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*******************************************************************************/
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/******************************************************************************/
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/**
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*
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* @file xdp_rx_mst_example.c
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*
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* Contains a design example using the XDp driver with multi-stream transport
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* (MST) functionality.
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*
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* @note This example requires an AXI timer in the system.
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* @note This example requires an interrupt controller in the system.
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* @note For this example to work, the user will need to implement
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* initialization of the system (Dprx_PlatformInit) as this is
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* system-specific.
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* @note For this example to display output, the user will need to
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* implement the Dprx_Vidpipe* functions which configure and
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* reset the video pipeline as required as this is system-specific.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 2.0 als 06/07/15 Initial creation.
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* </pre>
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*
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*******************************************************************************/
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/******************************* Include Files ********************************/
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#include "xdp.h"
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#include "xparameters.h"
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#ifdef XPAR_INTC_0_DEVICE_ID
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/* For MicroBlaze systems. */
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#include "xintc.h"
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#else
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/* For ARM/Zynq SoC systems. */
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#include "xscugic.h"
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#endif /* XPAR_INTC_0_DEVICE_ID */
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#include "xtmrctr.h"
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/**************************** Constant Definitions ****************************/
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/* The following constants map to the XPAR parameters created in the
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* xparameters.h file. */
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#define DPRX_DEVICE_ID XPAR_DISPLAYPORT_0_DEVICE_ID
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#ifdef XPAR_INTC_0_DEVICE_ID
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#define DP_INTERRUPT_ID \
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XPAR_PROCESSOR_SUBSYSTEM_INTERCONNECT_AXI_INTC_1_DISPLAYPORT_0_AXI_INT_INTR
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#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID
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#else
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#define DP_INTERRUPT_ID XPAR_FABRIC_DISPLAYPORT_0_AXI_INT_INTR
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#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
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#endif /* XPAR_INTC_0_DEVICE_ID */
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/****************************** Type Definitions ******************************/
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/* Depending on whether the system is a MicroBlaze or ARM/Zynq SoC system,
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* different drivers and associated types will be used. */
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#ifdef XPAR_INTC_0_DEVICE_ID
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#define INTC XIntc
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#define INTC_HANDLER XIntc_InterruptHandler
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#else
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#define INTC XScuGic
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#define INTC_HANDLER XScuGic_InterruptHandler
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#endif /* XPAR_INTC_0_DEVICE_ID */
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/**************************** Function Prototypes *****************************/
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u32 Dprx_MstExample(XDp *InstancePtr, u16 DeviceId, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId, XTmrCtr *TimerCounterPtr);
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static u32 Dprx_SetupExample(XDp *InstancePtr, u16 DeviceId);
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static u32 Dprx_SetupTimerHandler(XDp *InstancePtr, XTmrCtr *TimerCounterPtr);
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static u32 Dprx_SetupInterruptHandler(XDp *InstancePtr, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId);
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static void Dprx_SetupDownTopology(XDp *InstancePtr);
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static void Dprx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds);
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static void Dprx_ResetVideoOutput(XDp *InstancePtr);
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static void Dprx_DetectResolution(XDp *InstancePtr);
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static void Dprx_InterruptHandlerVmChange(void *InstancePtr);
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static void Dprx_InterruptHandlerPowerState(void *InstancePtr);
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static void Dprx_InterruptHandlerNoVideo(void *InstancePtr);
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static void Dprx_InterruptHandlerVBlank(void *InstancePtr);
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static void Dprx_InterruptHandlerTrainingLost(void *InstancePtr);
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static void Dprx_InterruptHandlerVideo(void *InstancePtr);
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static void Dprx_InterruptHandlerTrainingDone(void *InstancePtr);
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static void Dprx_InterruptHandlerBwChange(void *InstancePtr);
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static void Dprx_InterruptHandlerTp1(void *InstancePtr);
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static void Dprx_InterruptHandlerTp2(void *InstancePtr);
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static void Dprx_InterruptHandlerTp3(void *InstancePtr);
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static void Dprx_InterruptHandlerDownReq(void *InstancePtr);
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static void Dprx_InterruptHandlerDownReply(void *InstancePtr);
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static void Dprx_InterruptHandlerAudioOver(void *InstancePtr);
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static void Dprx_InterruptHandlerPayloadAlloc(void *InstancePtr);
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static void Dprx_InterruptHandlerActRx(void *InstancePtr);
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static void Dprx_InterruptHandlerCrcTest(void *InstancePtr);
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extern void Dprx_PlatformInit(XDp *InstancePtr);
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extern void Dprx_VidpipeConfig(XDp *InstancePtr);
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extern void Dprx_VidpipeReset(XDp *InstancePtr);
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/*************************** Variable Declarations ****************************/
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XDp DpInstance; /* The Dp instance. */
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INTC IntcInstance; /* The interrupt controller instance. */
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XTmrCtr TimerCounterInst; /* The timer counter instance. */
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/* Used by interrupt handlers. */
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u8 VBlankEnable;
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u8 VBlankCount;
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/* A generic EDID structure. */
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u8 GenEdid[128] = {
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0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
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0x61, 0x2c, 0x01, 0x00, 0x78, 0x56, 0x34, 0x12,
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0x01, 0x18, 0x01, 0x04, 0xa0, 0x2f, 0x1e, 0x78,
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0x00, 0xee, 0x95, 0xa3, 0x54, 0x4c, 0x99, 0x26,
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0x0f, 0x50, 0x54, 0x21, 0x08, 0x00, 0x71, 0x4f,
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0x81, 0x80, 0xb3, 0x00, 0xd1, 0xc0, 0x01, 0x01,
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0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
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0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
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0x45, 0x00, 0x40, 0x84, 0x63, 0x00, 0x00, 0x1e,
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0x00, 0x00, 0x00, 0xff, 0x00, 0x58, 0x49, 0x4c,
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0x44, 0x50, 0x53, 0x49, 0x4e, 0x4b, 0x0a, 0x20,
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0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x58,
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0x49, 0x4c, 0x20, 0x44, 0x50, 0x0a, 0x20, 0x20,
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0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfd,
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0x00, 0x38, 0x3c, 0x1e, 0x53, 0x10, 0x00, 0x0a,
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0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x39
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};
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/* A generic DPCD structure. */
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u8 GenDpcd[] = {
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0x12, 0x0a, 0x84, 0x01, 0x01, 0x00, 0x00, 0x00, 0x02
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};
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/**************************** Function Definitions ****************************/
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/******************************************************************************/
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/**
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* This function is the main function of the XDp (operating in RX mode)
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* interrupt with timer example. If the Dprx_MstExample function, which sets up
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* the system succeeds, this function will wait for interrupts.
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*
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* @param None.
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*
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* @return
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* - XST_FAILURE if the interrupt example was unsuccessful - system
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* setup failed.
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*
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* @note Unless setup failed, main will never return since
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* Dprx_MstExample is blocking.
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*
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*******************************************************************************/
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int main(void)
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{
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u32 Status;
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/* Run the XDp (in RX mode) interrupt with timer example. */
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Status = Dprx_MstExample(&DpInstance, DPRX_DEVICE_ID,
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&IntcInstance, INTC_DEVICE_ID, DP_INTERRUPT_ID,
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&TimerCounterInst);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* The main entry point for the interrupt with timer example using the XDp
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* driver. This function will set up the system, interrupt controller and
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* interrupt handlers, and the custom sleep handler.
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*
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* @param InstancePtr is a pointer to the XDp instance.
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* @param DeviceId is the unique device ID of the DisplayPort RX core
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* instance.
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* @param IntcPtr is a pointer to the interrupt instance.
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* @param IntrId is the unique device ID of the interrupt controller.
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* @param DpIntrId is the interrupt ID of the DisplayPort RX connection to
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* the interrupt controller.
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* @param TimerCounterPtr is a pointer to the timer instance.
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*
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* @return
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* - XST_SUCCESS if the system was set up correctly and link
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* training was successful.
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* - XST_FAILURE otherwise.
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*
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* @note None.
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*
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*******************************************************************************/
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u32 Dprx_MstExample(XDp *InstancePtr, u16 DeviceId, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId, XTmrCtr *TimerCounterPtr)
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{
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u32 Status;
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/* Do platform initialization here. This is hardware system specific -
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* it is up to the user to implement this function. */
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Dprx_PlatformInit(InstancePtr);
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/*******************/
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Status = Dprx_SetupExample(InstancePtr, DeviceId);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/* Set up a timer. */
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Dprx_SetupTimerHandler(InstancePtr, TimerCounterPtr);
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/* Set up interrupt handling in the system. */
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Status = Dprx_SetupInterruptHandler(InstancePtr, IntcPtr, IntrId,
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DpIntrId);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/* Do not return in order to allow interrupt handling to run. */
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while (1);
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function will setup and initialize the DisplayPort RX core. The core's
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* configuration parameters will be retrieved based on the configuration
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* to the DisplayPort RX core instance with the specified device ID.
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*
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* @param InstancePtr is a pointer to the XDp instance.
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* @param DeviceId is the unique device ID of the DisplayPort RX core
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* instance.
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*
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* @return
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* - XST_SUCCESS if the device configuration was found and obtained
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* and if the main link was successfully established.
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* - XST_FAILURE otherwise.
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*
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* @note None.
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*
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*******************************************************************************/
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static u32 Dprx_SetupExample(XDp *InstancePtr, u16 DeviceId)
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{
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XDp_Config *ConfigPtr;
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u32 Status;
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/* Obtain the device configuration for the DisplayPort RX core. */
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ConfigPtr = XDp_LookupConfig(DeviceId);
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if (!ConfigPtr) {
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return XST_FAILURE;
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}
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/* Copy the device configuration into the InstancePtr's Config
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* structure. */
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XDp_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
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XDp_RxSetLaneCount(InstancePtr, InstancePtr->Config.MaxLaneCount);
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XDp_RxSetLinkRate(InstancePtr, InstancePtr->Config.MaxLinkRate);
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/* Set up the downstream topology which the RX will respond to sideband
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* messages with. */
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Dprx_SetupDownTopology(InstancePtr);
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/* Initialize the DisplayPort RX core. */
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Status = XDp_Initialize(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function sets up a custom timer which the driver will use for MicroBlaze
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* systems.
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*
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* @param InstancePtr is a pointer to the XDp instance.
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* @param TimerCounterPtr is a pointer to the timer instance.
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*
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* @return
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* - XST_SUCCESS if a timer controller exists for use.
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* - XST_FAILURE otherwise.
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*
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* @note A timer controller must be present in the system.
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*
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*******************************************************************************/
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static u32 Dprx_SetupTimerHandler(XDp *InstancePtr, XTmrCtr *TimerCounterPtr)
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{
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u32 Status;
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Status = XTmrCtr_Initialize(&TimerCounterInst, 0);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/* Set a custom timer handler for improved delay accuracy on MicroBlaze
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* systems since the driver does not assume/have a dependency on the
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* system having a timer in the FPGA.
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* Note: This only has an affect for MicroBlaze systems since the Zynq
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* ARM SoC contains a timer, which is used when the driver calls the
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* delay function. */
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XDp_SetUserTimerHandler(InstancePtr, &Dprx_CustomWaitUs,
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TimerCounterPtr);
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XTmrCtr_SetResetValue(InstancePtr->UserTimerPtr, 0, 0);
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XTmrCtr_Reset(InstancePtr->UserTimerPtr, 0);
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function sets up the interrupt system such that interrupts caused by
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* Hot-Plug-Detect (HPD) events and pulses are handled. This function is
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* application-specific for systems that have an interrupt controller connected
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* to the processor. The user should modify this function to fit the
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* application.
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*
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* @param InstancePtr is a pointer to the XDp instance.
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* @param IntcPtr is a pointer to the interrupt instance.
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* @param IntrId is the unique device ID of the interrupt controller.
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* @param DpIntrId is the interrupt ID of the DisplayPort RX connection to
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* the interrupt controller.
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*
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* @return
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* - XST_SUCCESS if the interrupt system was successfully set up.
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* - XST_FAILURE otherwise.
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*
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* @note An interrupt controller must be present in the system, connected
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* to the processor and the DisplayPort RX core.
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*
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*******************************************************************************/
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static u32 Dprx_SetupInterruptHandler(XDp *InstancePtr, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId)
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{
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u32 Status;
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/* Set the HPD interrupt handlers. */
|
||||
XDp_RxSetIntrVmChangeHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerVmChange, InstancePtr);
|
||||
XDp_RxSetIntrPowerStateHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerPowerState, InstancePtr);
|
||||
XDp_RxSetIntrNoVideoHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerNoVideo, InstancePtr);
|
||||
XDp_RxSetIntrVBlankHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerVBlank, InstancePtr);
|
||||
XDp_RxSetIntrTrainingLostHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerTrainingLost, InstancePtr);
|
||||
XDp_RxSetIntrVideoHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerVideo, InstancePtr);
|
||||
XDp_RxSetIntrTrainingDoneHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerTrainingDone, InstancePtr);
|
||||
XDp_RxSetIntrBwChangeHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerBwChange, InstancePtr);
|
||||
XDp_RxSetIntrTp1Handler(InstancePtr,
|
||||
Dprx_InterruptHandlerTp1, InstancePtr);
|
||||
XDp_RxSetIntrTp2Handler(InstancePtr,
|
||||
Dprx_InterruptHandlerTp2, InstancePtr);
|
||||
XDp_RxSetIntrTp3Handler(InstancePtr,
|
||||
Dprx_InterruptHandlerTp3, InstancePtr);
|
||||
XDp_RxSetIntrDownReqHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerDownReq, InstancePtr);
|
||||
XDp_RxSetIntrDownReplyHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerDownReply, InstancePtr);
|
||||
XDp_RxSetIntrAudioOverHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerAudioOver, InstancePtr);
|
||||
XDp_RxSetIntrPayloadAllocHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerPayloadAlloc, InstancePtr);
|
||||
XDp_RxSetIntrActRxHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerActRx, InstancePtr);
|
||||
XDp_RxSetIntrCrcTestHandler(InstancePtr,
|
||||
Dprx_InterruptHandlerCrcTest, InstancePtr);
|
||||
|
||||
/* Initialize interrupt controller driver. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Initialize(IntcPtr, IntrId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
#else
|
||||
XScuGic_Config *IntcConfig;
|
||||
|
||||
IntcConfig = XScuGic_LookupConfig(IntrId);
|
||||
Status = XScuGic_CfgInitialize(IntcPtr, IntcConfig,
|
||||
IntcConfig->CpuBaseAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
XScuGic_SetPriorityTriggerType(IntcPtr, DpIntrId, 0xA0, 0x1);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/* Connect the device driver handler that will be called when an
|
||||
* interrupt for the device occurs, the handler defined above performs
|
||||
* the specific interrupt processing for the device. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Connect(IntcPtr, DpIntrId,
|
||||
(XInterruptHandler)XDp_InterruptHandler, InstancePtr);
|
||||
#else
|
||||
Status = XScuGic_Connect(IntcPtr, DpIntrId,
|
||||
(Xil_InterruptHandler)XDp_InterruptHandler, InstancePtr);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/* Start the interrupt controller. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Start(IntcPtr, XIN_REAL_MODE);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
XIntc_Enable(IntcPtr, DpIntrId);
|
||||
#else
|
||||
XScuGic_Enable(IntcPtr, DpIntrId);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/* Initialize the exception table. */
|
||||
Xil_ExceptionInit();
|
||||
|
||||
/* Register the interrupt controller handler with the exception
|
||||
* table. */
|
||||
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
|
||||
(Xil_ExceptionHandler)INTC_HANDLER, IntcPtr);
|
||||
|
||||
/* Enable exceptions. */
|
||||
Xil_ExceptionEnable();
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets up the downstream topology that will be used by the RX to
|
||||
* respond to down requests coming from the TX.
|
||||
* - 4 identical sinks (each with its own global unique identifier) are exposed
|
||||
* to LINK_ADDRESS sideband messages.
|
||||
* - The extended display identification data (EDID) will be set to a generic
|
||||
* EDID (GenEdid) for each of the 4 sinks. REMOTE_I2C_READ sideband messages
|
||||
* on address 0x50 will be replied to with the contents set by
|
||||
* XDp_RxSetIicMapEntry for 0x50.
|
||||
* - REMOTE_DPCD_READ sideband messages will be responded to with the contents
|
||||
* set for the sink using XDp_RxSetDpcdMap. All sinks are given the a generic
|
||||
* DPCD (GenDpcd).
|
||||
* - ENUM_PATH_RESOURCES sideband messages will be responded to with the value
|
||||
* set by XDp_RxMstSetPbn (or 0 if the sink already has a stream allocated to
|
||||
* it).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_SetupDownTopology(XDp *InstancePtr)
|
||||
{
|
||||
XDp_SbMsgLinkAddressReplyPortDetail Port;
|
||||
u8 PortIndex;
|
||||
u8 GuidIndex;
|
||||
|
||||
/* Ensure that all ports are not exposed in the link address. */
|
||||
for (PortIndex = 0; PortIndex < 16; PortIndex++) {
|
||||
XDp_RxMstExposePort(InstancePtr, PortIndex, 0);
|
||||
}
|
||||
|
||||
/* Configure the commonality between the downstream sink devices. */
|
||||
Port.InputPort = 0;
|
||||
Port.PeerDeviceType = 0x3;
|
||||
Port.MsgCapStatus = 0;
|
||||
Port.DpDevPlugStatus = 1;
|
||||
Port.LegacyDevPlugStatus = 0;
|
||||
Port.DpcdRev = 0x11;
|
||||
Port.NumSdpStreams = 0;
|
||||
Port.NumSdpStreamSinks = 0;
|
||||
|
||||
/* Configure the unique port number and GUID for all possible downstream
|
||||
* sinks. */
|
||||
for (PortIndex = 1; PortIndex < 16; PortIndex++) {
|
||||
/* Set the GUID to a repeating pattern of the port number. */
|
||||
for (GuidIndex = 0; GuidIndex < XDP_GUID_NBYTES; GuidIndex++) {
|
||||
Port.Guid[GuidIndex] = PortIndex;
|
||||
}
|
||||
XDp_RxMstSetPort(InstancePtr, PortIndex, &Port);
|
||||
/* Port.PortNum is set to the index. */
|
||||
}
|
||||
|
||||
/* Set I2C maps. */
|
||||
XDp_RxSetIicMapEntry(InstancePtr, 1, 0x50, 128, GenEdid);
|
||||
XDp_RxSetIicMapEntry(InstancePtr, 2, 0x50, 128, GenEdid);
|
||||
XDp_RxSetIicMapEntry(InstancePtr, 3, 0x50, 128, GenEdid);
|
||||
XDp_RxSetIicMapEntry(InstancePtr, 4, 0x50, 128, GenEdid);
|
||||
|
||||
/* Set DPCD maps. */
|
||||
XDp_RxSetDpcdMap(InstancePtr, 1, 0, sizeof(GenDpcd), GenDpcd);
|
||||
XDp_RxSetDpcdMap(InstancePtr, 2, 0, sizeof(GenDpcd), GenDpcd);
|
||||
XDp_RxSetDpcdMap(InstancePtr, 3, 0, sizeof(GenDpcd), GenDpcd);
|
||||
XDp_RxSetDpcdMap(InstancePtr, 4, 0, sizeof(GenDpcd), GenDpcd);
|
||||
|
||||
/* Set available PBN. */
|
||||
XDp_RxMstSetPbn(InstancePtr, 1, 2560);
|
||||
XDp_RxMstSetPbn(InstancePtr, 2, 2560);
|
||||
XDp_RxMstSetPbn(InstancePtr, 3, 2560);
|
||||
XDp_RxMstSetPbn(InstancePtr, 4, 2560);
|
||||
|
||||
/* Set up the input port and expose it. */
|
||||
XDp_RxMstSetInputPort(InstancePtr, 0, NULL);
|
||||
|
||||
/* Expose the ports configured above. Used when replying to a
|
||||
* LINK_ADDRESS request. */
|
||||
XDp_RxMstExposePort(InstancePtr, 1, 1);
|
||||
XDp_RxMstExposePort(InstancePtr, 2, 1);
|
||||
XDp_RxMstExposePort(InstancePtr, 3, 1);
|
||||
XDp_RxMstExposePort(InstancePtr, 4, 1);
|
||||
/* Make sure that the number of downstream ports matches the number
|
||||
* exposed, otherwise the LINK_ADDRESS reply will be incorrect. */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is used to override the driver's default sleep functionality.
|
||||
* For MicroBlaze systems, the XDp_WaitUs driver function's default behavior
|
||||
* is to use the MB_Sleep function from microblaze_sleep.h, which is implemented
|
||||
* in software and only has millisecond accuracy. For this reason, using a
|
||||
* hardware timer is preferrable. For ARM/Zynq SoC systems, the SoC's timer is
|
||||
* used - XDp_WaitUs will ignore this custom timer handler.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDp_SetUserTimerHandler driver function to set this
|
||||
* function as the handler for when the XDp_WaitUs driver
|
||||
* function is called.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds)
|
||||
{
|
||||
XDp *XDp_InstancePtr = (XDp *)InstancePtr;
|
||||
u32 TimerVal;
|
||||
|
||||
XTmrCtr_Start(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
|
||||
/* Wait specified number of useconds. */
|
||||
do {
|
||||
TimerVal = XTmrCtr_GetValue(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
while (TimerVal < (MicroSeconds *
|
||||
(XDp_InstancePtr->Config.SAxiClkHz / 1000000)));
|
||||
|
||||
XTmrCtr_Stop(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is used to reset video output for this example.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_ResetVideoOutput(XDp *InstancePtr)
|
||||
{
|
||||
xil_printf("\tDisabling the display timing generator.\n");
|
||||
XDp_RxDtgDis(InstancePtr);
|
||||
|
||||
xil_printf("\tResetting the video output pipeline.\n");
|
||||
/* This is hardware system specific - it is up to the user to implement
|
||||
* this function if needed. */
|
||||
Dprx_VidpipeReset(InstancePtr);
|
||||
/*******************/
|
||||
|
||||
xil_printf("\tConfiguring the video output pipeline.\n");
|
||||
/* This is hardware system specific - it is up to the user to implement
|
||||
* this function if needed. */
|
||||
Dprx_VidpipeConfig(InstancePtr);
|
||||
/*******************/
|
||||
|
||||
xil_printf("\tRe-enabling the display timing generator.\n");
|
||||
XDp_RxDtgEn(InstancePtr);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will present the resolution of the incoming video stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The resolution will be rounded up to the nearest resolution
|
||||
* present in the XVidC_VideoTimingModes table.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_DetectResolution(XDp *InstancePtr)
|
||||
{
|
||||
u32 DpHres, DpVres;
|
||||
u32 GetResCount = 0;
|
||||
|
||||
do {
|
||||
DpHres = (XDp_ReadReg(((XDp *)InstancePtr)->Config.BaseAddr,
|
||||
XDP_RX_MSA_HRES));
|
||||
DpVres = (XDp_ReadReg(((XDp *)InstancePtr)->Config.BaseAddr,
|
||||
XDP_RX_MSA_VHEIGHT));
|
||||
GetResCount++;
|
||||
XDp_WaitUs(InstancePtr, 1000);
|
||||
} while (((DpHres == 0) || (DpVres == 0)) && (GetResCount < 2000));
|
||||
|
||||
xil_printf("\n*** Detected resolution: %d x %d ***\n", DpHres, DpVres);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a video mode chang interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerVmChange(void *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
xil_printf("> Interrupt: video mode change.\n");
|
||||
|
||||
Status = XDp_RxCheckLinkStatus(InstancePtr);
|
||||
if ((Status == XST_SUCCESS) && (VBlankCount >= 20)) {
|
||||
Dprx_ResetVideoOutput(InstancePtr);
|
||||
Dprx_DetectResolution(InstancePtr);
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when the power state interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerPowerState(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: power state change request.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a no video interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerNoVideo(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: no-video flags in the VBID field after active "
|
||||
"video has been received.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a vertical blanking interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerVBlank(void *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
if (VBlankEnable) {
|
||||
VBlankCount++;
|
||||
|
||||
xil_printf("> Interrupt: vertical blanking (frame %d).\n",
|
||||
VBlankCount);
|
||||
|
||||
/* Wait until 20 frames have been received before forwarding or
|
||||
* outputting any video stream. */
|
||||
if (VBlankCount >= 20) {
|
||||
VBlankEnable = 0;
|
||||
VBlankCount = 0;
|
||||
XDp_RxInterruptDisable(InstancePtr,
|
||||
XDP_RX_INTERRUPT_MASK_VBLANK_MASK);
|
||||
|
||||
Status = XDp_RxCheckLinkStatus(InstancePtr);
|
||||
if (Status == XST_SUCCESS) {
|
||||
Dprx_ResetVideoOutput(InstancePtr);
|
||||
Dprx_DetectResolution(InstancePtr);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a training lost interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerTrainingLost(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: training lost.\n");
|
||||
|
||||
/* Re-enable vertical blanking interrupt and counter. */
|
||||
VBlankEnable = 1;
|
||||
VBlankCount = 0;
|
||||
XDp_RxInterruptEnable(InstancePtr, XDP_RX_INTERRUPT_MASK_VBLANK_MASK);
|
||||
|
||||
xil_printf("\tDisabling the display timing generator.\n");
|
||||
XDp_RxDtgDis(InstancePtr);
|
||||
xil_printf("\tResetting the video output pipeline.\n");
|
||||
/* This is hardware system specific - it is up to the user to implement
|
||||
* this function if needed. */
|
||||
Dprx_VidpipeReset(InstancePtr);
|
||||
/*******************/
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a valid video interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerVideo(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: a valid video frame is detected on main "
|
||||
"link.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a training done interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerTrainingDone(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: training done.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a bandwidth change interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerBwChange(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: bandwidth change.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a training pattern 1
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerTp1(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: training pattern 1.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a training pattern 2
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerTp2(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: training pattern 2.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a training pattern 3
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerTp3(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: training pattern 3.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a down request interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerDownReq(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: down request.\n");
|
||||
|
||||
XDp_RxHandleDownReq(InstancePtr);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a down reply interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerDownReply(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: down reply.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when an audio packet overflow
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerAudioOver(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: audio packet overflow.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a payload allocation
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerPayloadAlloc(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: payload allocation.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when an ACT sequence interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerActRx(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: ACT sequence received.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the callback function for when a CRC test start interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_InterruptHandlerCrcTest(void *InstancePtr)
|
||||
{
|
||||
xil_printf("> Interrupt: CRC test started.\n");
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue