PMUFW: Events: Add REQ_PWRUP and REQ_PWRDN events

Add new events and supporting functions to handle legacy
ROM power up and power down requests that are initiated
using PMU GLOBAL registers.

Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
This commit is contained in:
Jyotheeswar Reddy 2015-08-06 11:02:17 -07:00 committed by Nava kishore Manne
parent 6fe99fac43
commit bc66b745b7
4 changed files with 45 additions and 11 deletions

View file

@ -111,7 +111,9 @@ static struct XPfw_Event_t EventTable[] = {
[XPFW_EV_PL_GPI_1] = { .Type = XPFW_EV_TYPE_GPI3, .RegMask = PMU_IOMODULE_GPI3_PL_GPI_1_MASK, .ModMask = MASK32_ALL_LOW },
[XPFW_EV_PL_GPI_0] = { .Type = XPFW_EV_TYPE_GPI3, .RegMask = PMU_IOMODULE_GPI3_PL_GPI_0_MASK, .ModMask = MASK32_ALL_LOW },
[XPFW_EV_RTC_SECONDS] = { .Type = XPFW_EV_TYPE_RTC, .RegMask = PMU_IOMODULE_IRQ_PENDING_RTC_EVERY_SECOND_MASK, .ModMask = MASK32_ALL_LOW },
[XPFW_EV_RTC_ALARM] = { .Type = XPFW_EV_TYPE_RTC, .RegMask = PMU_IOMODULE_IRQ_PENDING_RTC_ALARM_MASK, .ModMask = MASK32_ALL_LOW }
[XPFW_EV_RTC_ALARM] = { .Type = XPFW_EV_TYPE_RTC, .RegMask = PMU_IOMODULE_IRQ_PENDING_RTC_ALARM_MASK, .ModMask = MASK32_ALL_LOW },
[XPFW_EV_REQ_PWRUP] = { .Type = XPFW_EV_TYPE_GEN, .RegMask = PMU_IOMODULE_IRQ_PENDING_PWR_UP_REQ_MASK, .ModMask = MASK32_ALL_LOW },
[XPFW_EV_REQ_PWRDN] = { .Type = XPFW_EV_TYPE_GEN, .RegMask = PMU_IOMODULE_IRQ_PENDING_PWR_DN_REQ_MASK, .ModMask = MASK32_ALL_LOW }
};
u32 XPfw_EventGetModMask(u32 EventId)
@ -145,6 +147,12 @@ static XStatus XPfw_EventEnable(u32 EventId)
XStatus Status;
switch (EventTable[EventId].Type) {
case XPFW_EV_TYPE_GEN:
/* Enable REQ_PWRUP /PWR_DN bit in IRQ_ENABLE */
XPfw_InterruptEnable(EventTable[EventId].RegMask);
Status = XST_SUCCESS;
break;
case XPFW_EV_TYPE_GPI0:
/* Nothing to do for GPI0. These are enabled by default */
/* Enable GPI0 bit in IRQ_ENABLE */
@ -194,6 +202,12 @@ static XStatus XPfw_EventDisable(u32 EventId)
XStatus Status;
switch (EventTable[EventId].Type) {
case XPFW_EV_TYPE_GEN:
/* Enable REQ_PWRUP /PWR_DN bit in IRQ_ENABLE */
XPfw_InterruptDisable(EventTable[EventId].RegMask);
Status = XST_SUCCESS;
break;
case XPFW_EV_TYPE_GPI0:
/* Nothing to do for GPI0. These are enabled by default */
/* Disable GPI0 bit in IRQ_ENABLE */

View file

@ -112,6 +112,10 @@
#define XPFW_EV_PL_GPI_0 77U
#define XPFW_EV_RTC_SECONDS 78U
#define XPFW_EV_RTC_ALARM 79U
#define XPFW_EV_REQ_PWRUP 80U
#define XPFW_EV_REQ_PWRDN 81U
#define XPFW_EV_MAX 82U
#define XPFW_EV_GROUP_GPI0
#define XPFW_EV_GROUP_GPI1
@ -125,16 +129,13 @@
#define XPFW_EV_GROUP_PWR_DISCONNECT
#define XPFW_EV_GROUP_SYS_ERROR
#define XPFW_EV_MAX 80U
#define XPFW_EV_TYPE_INVALID 0xffffffffU
#define XPFW_EV_TYPE_GPI0 0U
#define XPFW_EV_TYPE_GPI1 1U
#define XPFW_EV_TYPE_GPI2 2U
#define XPFW_EV_TYPE_GPI3 3U
#define XPFW_EV_TYPE_RTC 4U
#define XPFW_EV_TYPE_GEN 5U
struct XPfw_Event_t {
const u8 Type;
@ -142,9 +143,6 @@ struct XPfw_Event_t {
u32 ModMask;
};
u32 XPfw_EventGetModMask(u32 EventId);
u32 XPfw_EventGetRegMask(u32 EventId);

View file

@ -137,6 +137,28 @@ static void XPfw_NullHandler(void)
fw_printf("Error: NullHandler Triggered!\r\n");
}
static void XPfw_InterruptPwrUpHandler(void)
{
XStatus Status = XPfw_CoreDispatchEvent(XPFW_EV_REQ_PWRUP);
if (XST_SUCCESS != Status) {
fw_printf("Warning: Failed to dispatch Event ID: %d\r\n",
XPFW_EV_MB_FAULT);
}
}
static void XPfw_InterruptPwrDnHandler(void)
{
XStatus Status = XPfw_CoreDispatchEvent(XPFW_EV_REQ_PWRDN);
if (XST_SUCCESS != Status) {
fw_printf("Warning: Failed to dispatch Event ID: %d\r\n",
XPFW_EV_MB_FAULT);
}
}
static void XPfw_InterruptGpi0Handler(void)
{
XStatus Status = XPfw_CoreDispatchEvent(XPFW_EV_MB_FAULT);
@ -280,8 +302,8 @@ static struct HandlerTable g_TopLevelInterruptTable[] = {
{PMU_IOMODULE_IRQ_PENDING_IPI2_MASK, XPfw_Ipi2Handler},
{PMU_IOMODULE_IRQ_PENDING_IPI1_MASK, XPfw_Ipi1Handler},
{PMU_IOMODULE_IRQ_PENDING_IPI0_MASK, XPfw_Ipi0Handler},
{PMU_IOMODULE_IRQ_PENDING_PWR_UP_REQ_MASK, XPfw_NullHandler},
{PMU_IOMODULE_IRQ_PENDING_PWR_DN_REQ_MASK, XPfw_NullHandler},
{PMU_IOMODULE_IRQ_PENDING_PWR_UP_REQ_MASK, XPfw_InterruptPwrUpHandler},
{PMU_IOMODULE_IRQ_PENDING_PWR_DN_REQ_MASK, XPfw_InterruptPwrDnHandler},
{PMU_IOMODULE_IRQ_PENDING_ISO_REQ_MASK, XPfw_NullHandler},
{PMU_IOMODULE_IRQ_PENDING_SW_RST_REQ_MASK, XPfw_NullHandler},
{PMU_IOMODULE_IRQ_PENDING_HW_RST_REQ_MASK, XPfw_NullHandler},

View file

@ -1,4 +1,4 @@
#ifndef ZYNQMP_XPFW_VERSION__H_
#define ZYNQMP_XPFW_VERSION__H_
#define ZYNQMP_XPFW_VERSION "2015.3-rc1-4-gc5f26e664fa0"
#define ZYNQMP_XPFW_VERSION "2015.3-rc1-5-gf87012a6ce99"
#endif