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axicdma: Handle cache flush/invalidate api's properly for a53

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In a53 processor the Cache flush api does both fulsh and invalidate
of the memory once the dma transfer is done before checking the
data we shouldn't invalidate the memory unlike the a9/microblaze case
this patch updates the axicdma examples for the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This commit is contained in:
Kedareswara rao Appana 2015-08-21 11:10:55 +05:30 • committed by Nava kishore Manne
parent f0cdd32e75
commit c6b7045164
2 changed files with 18 additions and 3 deletions
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18
XilinxProcessorIPLib/drivers/axicdma/examples/xaxicdma_example_simple_intr.c
View file

@ -79,11 +79,18 @@
#include "xscugic.h"
#endif
#ifndef __MICROBLAZE__
#ifdef __MICROBLAZE__
#include "xpseudo_asm_gcc.h"
#endif
#ifdef __arm__
#include "xreg_cortexa9.h"
#endif
#ifdef __aarch64__
#include "xreg_cortexa53.h"
#endif
/******************** Constant Definitions **********************************/
@ -320,7 +327,10 @@ static int DoSimpleTransfer(XAxiCdma *InstancePtr, int Length, int Retries)
/* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
* is enabled
*/
Xil_DCacheFlushRange((u32)&SrcBuffer, Length);
Xil_DCacheFlushRange((UINTPTR)&SrcBuffer, Length);
#ifdef __aarch64__
Xil_DCacheFlushRange((UINTPTR)&DestBuffer, Length);
#endif
/* Try to start the DMA transfer
*/
@ -353,7 +363,9 @@ static int DoSimpleTransfer(XAxiCdma *InstancePtr, int Length, int Retries)
/* Invalidate the DestBuffer before receiving the data, in case the
* Data Cache is enabled
*/
Xil_DCacheInvalidateRange((u32)&DestBuffer, Length);
#ifndef __aarch64__
Xil_DCacheInvalidateRange((UINTPTR)&DestBuffer,, Length);
#endif
/* Transfer completes successfully, check data
*

3
XilinxProcessorIPLib/drivers/axicdma/examples/xaxicdma_example_simple_poll.c
View file

@ -259,6 +259,9 @@ static int DoSimplePollTransfer(XAxiCdma *InstancePtr, int Length, int Retries)
* is enabled
*/
Xil_DCacheFlushRange((UINTPTR)&SrcBuffer, Length);
#ifdef __aarch64__
Xil_DCacheFlushRange((UINTPTR)&DestBuffer, Length);
#endif
/* Try to start the DMA transfer
*/