bsp: a53: modified bsp for ddrless system

This patch modifies translation table for a53 bsp 32bit and 64bit
to mark memory reserved in case of ddrless system

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>

lib/bsp/standalone/data/standalone.tcl

@@ -189,7 +189,7 @@ proc generate {os_handle} {
     } elseif { $proctype == "psu_cortexr5" } {
 	puts $makeconfig "LIBSOURCES = *.c *.S"
     } elseif { $proctype == "psu_cortexa53" }  {
-            puts $makeconfig "LIBSOURCES = *.c *.s *.S"
+            puts $makeconfig "LIBSOURCES = *.c *.S"
     } elseif { $proctype == "ps7_cortexa9" } {
         if {[string compare -nocase $compiler "armcc"] == 0} {
             puts $makeconfig "LIBSOURCES = *.c *.s"

lib/bsp/standalone/src/cortexa53/32bit/gcc/translation_table.S

@@ -49,6 +49,7 @@
 * None.
 *
 ******************************************************************************/
+#include "xparameters.h"
 	.globl  MMUTable
 
 	.section .mmu_tbl,"a"
@@ -61,11 +62,27 @@ MMUTable:
 
 .set SECT, 0
 
-.rept	0x0800			/* 0x00000000 - 0x7fffffff (DDR Cacheable) */
+#ifdef XPAR_PSU_DDR_0_S_AXI_BASEADDR
+.set DDR_START, XPAR_PSU_DDR_0_S_AXI_BASEADDR
+.set DDR_END, XPAR_PSU_DDR_0_S_AXI_HIGHADDR
+.set DDR_SIZE, (DDR_END - DDR_START)+1
+.set DDR_REG, DDR_SIZE/0x100000
+#else
+.set DDR_REG, 0
+#endif
+.set UNDEF_REG, 0x800 - DDR_REG
+
+.rept	DDR_REG			/* DDR Cacheable */
 .word	SECT + 0x15de6		/* S=b1 TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1 */
 .set	SECT, SECT+0x100000
 .endr
 
+.rept	UNDEF_REG		/* unassigned/reserved */
+				/* Generates a translation fault if accessed */
+.word	SECT + 0x0		/* S=b0 TEX=b000 AP=b00, Domain=b0, C=b0, B=b0 */
+.set	SECT, SECT+0x100000
+.endr
+
 .rept	0x0200			/* 0x80000000 - 0x9fffffff (FPGA slave0) */
 .word	SECT + 0xc02		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
 .set	SECT, SECT+0x100000

lib/bsp/standalone/src/cortexa53/64bit/gcc/translation_table.S

@@ -49,6 +49,8 @@
 * None.
 *
 ******************************************************************************/
+#include "xparameters.h"
+
 	.globl  MMUTableL0
 	.globl  MMUTableL1
 	.globl  MMUTableL2
@@ -120,11 +122,27 @@ MMUTableL2:
 
 .set SECT, 0
 
-.rept	0x0400			/*2GB DDR */
+#ifdef XPAR_PSU_DDR_0_S_AXI_BASEADDR
+.set DDR_START, XPAR_PSU_DDR_0_S_AXI_BASEADDR
+.set DDR_END, XPAR_PSU_DDR_0_S_AXI_HIGHADDR
+.set DDR_SIZE, (DDR_END - DDR_START)+1
+.set DDR_REG, DDR_SIZE/0x200000
+#else
+.set DDR_REG, 0
+#endif
+
+.set UNDEF_REG, 0x400 - DDR_REG
+
+.rept	DDR_REG			/* DDR based on size in hdf*/
 .8byte	SECT + Memory
 .set	SECT, SECT+0x200000
 .endr
 
+.rept	UNDEF_REG		/* reserved for region where ddr is absent */
+.8byte	SECT + reserved
+.set	SECT, SECT+0x200000
+.endr
+
 .rept	0x0200			/*1GB lower PL*/
 .8byte	SECT + Device
 .set	SECT, SECT+0x200000