xilskey_v2_1 : Modified xilskey files to fix warnings.
This patch modifies files to fix warnings that got generated when -Wextra flag was used. Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
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22b5585a09
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ca82675069
4 changed files with 17 additions and 11 deletions
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@ -21,5 +21,6 @@
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* Changed PS efuse error codes for voltage out of range
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* 2.00 hk 02/12/14 Changed makefile to remove '-p' option with mkdir.
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* CR#773090
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* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
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*
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********************************************************************************/
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@ -46,6 +46,7 @@
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* 1.02a hk 10/28/13 Added API's to read status bits and key.PR# 735957
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* 2.00 hk 22/01/14 Corrected PL voltage checks to VCCINT and VCCAUX.
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* CR#768077
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* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
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*
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*
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****************************************************************************/
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@ -498,8 +499,7 @@ u8 XilSKey_EfusePl_ProgramBit(u8 Row, u8 Bit)
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/**
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* Check if the bit position is valid.
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*/
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if((Bit < XSK_EFUSEPL_ARRAY_FUSE_CNTRL_START_BIT) ||
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(Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW)) {
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if (Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW) {
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ErrorCode = XSK_EFUSEPL_ERROR_WRITE_BIT_OUT_OF_RANGE;
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return XST_FAILURE;
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}
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@ -773,8 +773,7 @@ u8 XilSKey_EfusePl_ReadBit(u8 Row, u8 Bit, u8 MarginOption, u8 *BitData)
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*Check if the bit position is valid.
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*/
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if((Bit < XSK_EFUSEPL_ARRAY_FUSE_CNTRL_START_BIT) ||
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(Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW)) {
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if (Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW) {
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ErrorCode = XSK_EFUSEPL_ERROR_READ_BIT_OUT_OF_RANGE;
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return XST_FAILURE;
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}
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@ -48,6 +48,7 @@
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* int Bbram_ProgramKey(XilSKey_Bbram *InstancePtr)
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* int Bbram_VerifyKey(XilSKey_Bbram *InstancePtr)
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* void Bbram_DeInit(void)
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* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
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*
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* </pre>
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*
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@ -1101,16 +1102,21 @@ int JtagValidateMioPins(void)
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/*
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* Make sure that each every MIO pin defined is valid
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*/
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if((g_mio_jtag_tdi < 0) || (g_mio_jtag_tdi > 53))
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if (g_mio_jtag_tdi > 53) {
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return 1;
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if((g_mio_jtag_tdo < 0) || (g_mio_jtag_tdo > 53))
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}
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if (g_mio_jtag_tdo > 53) {
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return 1;
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if((g_mio_jtag_tck < 0) || (g_mio_jtag_tck > 53))
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}
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if (g_mio_jtag_tck > 53) {
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return 1;
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if((g_mio_jtag_tms < 0) || (g_mio_jtag_tms > 53))
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}
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if (g_mio_jtag_tms > 53) {
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return 1;
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if((g_mio_jtag_mux_sel < 0) || (g_mio_jtag_mux_sel > 53))
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}
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if (g_mio_jtag_mux_sel > 53) {
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return 1;
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}
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/*
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* Make sure that MIO pins defined for JTAG operation are unique among themselves
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@ -44,7 +44,7 @@
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* 1.00a rpoolla 04/26/13 First release
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* 2.00 hk 22/01/14 Corrected PL voltage checks to VCCINT and VCCAUX.
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* CR#768077
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*
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* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
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*****************************************************************************/
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/***************************** Include Files ********************************/
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@ -713,7 +713,7 @@ void XilSKey_EfusePs_ConvertBytesToBits(const u8 * Bytes, u8 * Bits , u32 Len)
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****************************************************************************/
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u32 XilSKey_Efuse_ValidateKey(const char *Key, u32 Len)
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{
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int i;
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u32 i;
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/**
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* Make sure passed key is not NULL
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*/
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