xilskey_v2_1 : Modified xilskey files to fix warnings.

This patch modifies files to fix warnings that got
generated when -Wextra flag was used.

Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
This commit is contained in:
Venkata Naga Sai Krishna Kolapalli 2015-04-03 17:56:52 +05:30 committed by Nava kishore Manne
parent 22b5585a09
commit ca82675069
4 changed files with 17 additions and 11 deletions

View file

@ -21,5 +21,6 @@
* Changed PS efuse error codes for voltage out of range
* 2.00 hk 02/12/14 Changed makefile to remove '-p' option with mkdir.
* CR#773090
* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
*
********************************************************************************/

View file

@ -46,6 +46,7 @@
* 1.02a hk 10/28/13 Added API's to read status bits and key.PR# 735957
* 2.00 hk 22/01/14 Corrected PL voltage checks to VCCINT and VCCAUX.
* CR#768077
* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
*
*
****************************************************************************/
@ -498,8 +499,7 @@ u8 XilSKey_EfusePl_ProgramBit(u8 Row, u8 Bit)
/**
* Check if the bit position is valid.
*/
if((Bit < XSK_EFUSEPL_ARRAY_FUSE_CNTRL_START_BIT) ||
(Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW)) {
if (Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW) {
ErrorCode = XSK_EFUSEPL_ERROR_WRITE_BIT_OUT_OF_RANGE;
return XST_FAILURE;
}
@ -773,8 +773,7 @@ u8 XilSKey_EfusePl_ReadBit(u8 Row, u8 Bit, u8 MarginOption, u8 *BitData)
*Check if the bit position is valid.
*/
if((Bit < XSK_EFUSEPL_ARRAY_FUSE_CNTRL_START_BIT) ||
(Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW)) {
if (Bit > XSK_EFUSEPL_ARRAY_ECC_END_BIT_IN_A_ROW) {
ErrorCode = XSK_EFUSEPL_ERROR_READ_BIT_OUT_OF_RANGE;
return XST_FAILURE;
}

View file

@ -48,6 +48,7 @@
* int Bbram_ProgramKey(XilSKey_Bbram *InstancePtr)
* int Bbram_VerifyKey(XilSKey_Bbram *InstancePtr)
* void Bbram_DeInit(void)
* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
*
* </pre>
*
@ -1101,16 +1102,21 @@ int JtagValidateMioPins(void)
/*
* Make sure that each every MIO pin defined is valid
*/
if((g_mio_jtag_tdi < 0) || (g_mio_jtag_tdi > 53))
if (g_mio_jtag_tdi > 53) {
return 1;
if((g_mio_jtag_tdo < 0) || (g_mio_jtag_tdo > 53))
}
if (g_mio_jtag_tdo > 53) {
return 1;
if((g_mio_jtag_tck < 0) || (g_mio_jtag_tck > 53))
}
if (g_mio_jtag_tck > 53) {
return 1;
if((g_mio_jtag_tms < 0) || (g_mio_jtag_tms > 53))
}
if (g_mio_jtag_tms > 53) {
return 1;
if((g_mio_jtag_mux_sel < 0) || (g_mio_jtag_mux_sel > 53))
}
if (g_mio_jtag_mux_sel > 53) {
return 1;
}
/*
* Make sure that MIO pins defined for JTAG operation are unique among themselves

View file

@ -44,7 +44,7 @@
* 1.00a rpoolla 04/26/13 First release
* 2.00 hk 22/01/14 Corrected PL voltage checks to VCCINT and VCCAUX.
* CR#768077
*
* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
*****************************************************************************/
/***************************** Include Files ********************************/
@ -713,7 +713,7 @@ void XilSKey_EfusePs_ConvertBytesToBits(const u8 * Bytes, u8 * Bits , u32 Len)
****************************************************************************/
u32 XilSKey_Efuse_ValidateKey(const char *Key, u32 Len)
{
int i;
u32 i;
/**
* Make sure passed key is not NULL
*/