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vprocss: Update example tcl to accept command line parameter

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Vivado Example design tool flow change resulted in hdf file name
change of video processing subsystem example design. Update the
script to accept hdf file name from command line to avoid any
dependency on further name changes

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This commit is contained in:
Rohit Consul 2015-09-04 10:44:50 -07:00 • committed by Nava kishore Manne
parent ee6224443b
commit d0f4ed35bb
2 changed files with 35 additions and 22 deletions
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7
XilinxProcessorIPLib/drivers/vprocss/examples/readme.txt
View file

@ -3,11 +3,12 @@ vpss_example.tcl automates the process of generating the downloadable bit & elf
Example application design source files (contained within "examples/src" folder) are tightly coupled with the video processing subsystem example design available in Vivado Catalogue.
To run the provided tcl
1. Copy the exported example design hdf file in the "examples" directory of the driver
(a) Default hdf name is "design_1_v_proc_ss_0_0_design_synth_wrapper.hdf". If generated hdf name is different then vpss_example.tcl needs to be updated with the new name
2. Launch the xsct terminal
3. cd into the examples directory
4. run the tcl
4. source the tcl file
xsct%>source vpss_example.tcl
4. execute the script
xsct%>vpss_example <hdf_file_name.hdf>
Script will perform following operations
1. Create workspace
@ -20,6 +21,6 @@ After the process is complete required files will be available in
bit file -> vpss_example.sdk/vpss_example_hw_platform folder
elf file -> vpss_example.sdk/vpss_example_design/{Debug/Release} folder
When executed on the board the example application will determine the video processing subsystem topology set the input and output stream configuration accordingly. Test pattern generator IP is used to generated the input stream. Video Lock Monitor IP will then monitor the output of the subsystem (to vidout) to determine if lock is achieved and present the status on the terminal
When executed on the board the example application will determine the video processing subsystem topology and set the input and output stream configuration accordingly. Test pattern generator IP is used to generate the input stream. Video Lock Monitor IP will then monitor the output of the subsystem (to vidout) to determine if lock is achieved and present the status (Pass/Fail) on the terminal
Note: Serial terminal baud rate should be set to 9600

14
XilinxProcessorIPLib/drivers/vprocss/examples/vpss_example.tcl
View file

@ -1,10 +1,20 @@
proc vpss_example args {
if {[llength $args] != 1} {
puts "error: hdf file name missing from command line"
puts "Please specify hdf to process"
puts "Example Usage: vpss_example.tcl design1.hdf"
} else {
set hdf [lindex $args 0]
#set workspace
puts "Create Workspace"
sdk set_workspace vpss_example.sdk
#create hw project
puts "Create HW Project"
sdk create_hw_project -name vpss_example_hw_platform -hwspec ./design_1_v_proc_ss_0_0_design_synth_wrapper.hdf
sdk create_hw_project -name vpss_example_hw_platform -hwspec ./$hdf
#create bsp
puts "Create BSP"
@ -21,3 +31,5 @@ sdk import_sources -name vpss_example_design -path ./src
#build project
puts "Build Project"
sdk build_project -type all
}
}