Drivers: Doxygen changes for 2015.4
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
This commit is contained in:
Nava kishore Manne
parent
8d9ac8eacd
commit
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3057 changed files with 732203 additions and 0 deletions
1429
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/HTML_custom.css
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XilinxProcessorIPLib/drivers/axicdma/doc/html/api/HTML_custom.css
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XilinxProcessorIPLib/drivers/axicdma/doc/html/api/doc.png
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XilinxProcessorIPLib/drivers/axicdma/doc/html/api/dynsections.js
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67
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/files.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<html xmlns="http://www.w3.org/1999/xhtml">
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<head>
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<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
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<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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<title>axicdma: File List</title>
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<script type="text/javascript" src="jquery.js"></script>
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<script type="text/javascript" src="dynsections.js"></script>
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<tr style="height: 56px;">
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<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
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<td id="projectalign" style="padding-left: 0.5em;">
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<div id="projectname">axicdma
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<div id="navrow1" class="tabs">
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<ul class="tablist">
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<li><a href="index.html"><span>Overview</span></a></li>
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||||
<li><a href="globals.html"><span>APIs</span></a></li>
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<li class="current"><a href="files.html"><span>File List</span></a></li>
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</ul>
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</div>
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</div><!-- top -->
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<div class="header">
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<div class="headertitle">
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<div class="title">File List</div> </div>
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</div><!--header-->
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<div class="contents">
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<div class="textblock">Here is a list of all documented files with brief descriptions:</div><div class="directory">
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<table class="directory">
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<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma_8c.html" target="_self">xaxicdma.c</a></td><td class="desc"></td></tr>
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<tr id="row_1_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma_8h.html" target="_self">xaxicdma.h</a></td><td class="desc"></td></tr>
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||||
<tr id="row_2_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__bd_8c.html" target="_self">xaxicdma_bd.c</a></td><td class="desc"></td></tr>
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||||
<tr id="row_3_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__bd_8h.html" target="_self">xaxicdma_bd.h</a></td><td class="desc"></td></tr>
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<tr id="row_4_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__bdring_8c.html" target="_self">xaxicdma_bdring.c</a></td><td class="desc"></td></tr>
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<tr id="row_5_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__g_8c.html" target="_self">xaxicdma_g.c</a></td><td class="desc"></td></tr>
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<tr id="row_6_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__hw_8h.html" target="_self">xaxicdma_hw.h</a></td><td class="desc"></td></tr>
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<tr id="row_7_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__i_8h.html" target="_self">xaxicdma_i.h</a></td><td class="desc"></td></tr>
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<tr id="row_8_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__intr_8c.html" target="_self">xaxicdma_intr.c</a></td><td class="desc"></td></tr>
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<tr id="row_9_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__porting__guide_8h.html" target="_self">xaxicdma_porting_guide.h</a></td><td class="desc"></td></tr>
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<tr id="row_10_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxicdma__sinit_8c.html" target="_self">xaxicdma_sinit.c</a></td><td class="desc"></td></tr>
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</div><!-- directory -->
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||||
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<ul>
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</ul>
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</div>
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</body>
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</html>
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413
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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||||
<meta name="generator" content="Doxygen 1.8.10"/>
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<title>axicdma: APIs</title>
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|
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|
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|
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|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axicdma
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||||
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||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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||||
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||||
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|
||||
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||||
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|
||||
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||||
<!-- end header part -->
|
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<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
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|
||||
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|
||||
<div id="navrow3" class="tabs2">
|
||||
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||||
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|
||||
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|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
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||||
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||||
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|
||||
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|
||||
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|
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|
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||||
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|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
<div class="textblock">Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:</div>
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
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||||
<li>XAxiCdma_Bd
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||||
: <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">xaxicdma_bd.h</a>
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</li>
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<li>XAXICDMA_BD_ADDRLEN_OFFSET
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: <a class="el" href="group__axicdma__v4__0.html#ga0d0d6c6e655e662017785bd3afb8ff1e">xaxicdma_hw.h</a>
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</li>
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||||
<li>XAXICDMA_BD_BUFDST_MSB_OFFSET
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: <a class="el" href="group__axicdma__v4__0.html#ga3950ca65fb96bad92246c88399f38d89">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFDST_OFFSET
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||||
: <a class="el" href="group__axicdma__v4__0.html#gacd2dd9425a21034814a89119ff957528">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFSRC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga62a39b3ce53b54ba5641b4ad654054a4">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFSRC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaf29c4c37b3f8d6fee34a0f6e014a80d3">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_CTRL_LEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7153a14322b05f4845ac7796f6ab92fa">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_CTRL_LENGTH_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga08590ca37cda0c7e7648f8b58bb70d94">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_HASDRE_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga8e9efcc5a93543b6a6c75ab211ed8318">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_HW_NUM_BYTES
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga17eecb43d41d19d66cca58097dec4891">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_ISLITE_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaadb078c2f018d8422e66ebaaf4149712">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_MAX_LEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga6d00373734319bbfc1f81b2df043e0c4">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_MINIMUM_ALIGNMENT
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaae822f32753ddd2fec7be5d3c9e9a4ff">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_NDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga73442468eff68f4fac6ca04f7d66b3bc">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_NDESC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaac93627274e0a7ff4e45613eddd60d64">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_NUM_WORDS
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga710808485441a384edf28b803363f3dd">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_PHYS_ADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac3b26e44089dbe1e471eb9aedc6797fa">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_PHYS_ADDR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2dac41e5e3020258ed9ff6f2c5299e85">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_START_CLEAR
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7a4abf2f49cd4e47db090ef83c1d4224">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_ALL_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab72e831b0648742189a2623b040166b7">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaff5819b9b557b391de8b69c7c730b492">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_COMPLETE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac206252f0aeb8a2f8c28aaf7c0f8361e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_DEC_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5beb3dd9b31ecb304f698bab67ca81b3">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_INT_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga36516a3195bb957d00ef16b9f2ddf671">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9bc60587fa8dd61bb342dff49b7c8fc8">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_SLV_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga23cf4a9370aec62b2000113b6709e92a">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_TO_CLEAR
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab4e667853d75008ef5a74aca06762980">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_WORDLEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac5ef7101904b47a4ec640bedec49e0fc">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdClear()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga594480d7591185014d72869ac15fd490">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdClearSts()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5ee87642c7b803ad1543c5f839872594">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdClone()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaa16c4a61c0b1b2892ee5869e62546884">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetDstBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae95f4fe35bf907a14c7ec44dcc2f0033">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetLength()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2d0201500b1c123a0eb67c02f9666598">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetNextPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2091d8d3a0a4743a557307b1153b4791">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetPhysAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga535e9b3301b3227aed27e42961304165">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetSrcBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae42ce84dde541ca08b7995ded0e164cb">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetSts()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga25c6311cbd4ac7c3a1dec2e2a59c0bf7">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingAlloc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingClone()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingCntCalc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabf6db470a391644bdd03727d17bcb0d6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingCreate()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingFree()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingFromHw()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingGetCnt()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga6dda9c5b4ded0bdbf1e85d6532461ef6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingGetCurrBd()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab6f6efa84ee457f155a4c7a94e4227da">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingGetFreeCnt()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga07f505ed309a6eb2172e7e8e154fa082">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingMemCalc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1525cddb18badb5737c1017f2a0d34e1">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingNext()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingPrev()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingSnapShotCurrBd()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga4677cddba8354ca3979f9b6ae386ffde">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingToHw()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingUnAlloc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetCurBdPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae1333cf9309c85b0f620e026c889e01c">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetDstBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2b4866bb4184857c6de973d76f7e7e71">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetHasDRE()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga270070a493422c1d6f64842febb012d8">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetIsLite()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1025e9931f9d6fc4b7a0d526169eeab0">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetLength()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3467e25f29ab081f1d9b0a1a685adbfa">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetMaxLen()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga03aff38e0c27e9925e4a79986e351e0d">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetNextPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab4d51959154b33364f8e3104c4a1afb0">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetPhysAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga27a4cefa4eee7b30158763c0619c725b">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetSrcBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga18cd5efedba0025703b7c3a845f52cad">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetTailBdPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1141024e912e7012d2c716cef9fc791f">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetWordLen()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7956eaa8a90bcf2a0894d513b9c15639">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BTT_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaf2b93c5bebf2fdcf9516bcfefc7ae356">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaac2ba51f1e81b8ed8fe31bc5632d2980">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CDESC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaf62f028c2ed24dea6e0ebf8388cdf670">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_CfgInitialize()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaadefa567a30eb3ab3213919fff7d3f9b">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAXICDMA_COALESCE_MAX
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga0bb5457c991743bf45e9db3201df17ed">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_KHOLE_RD_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac31916a2867c9e47834091131d449f88">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_KHOLE_WR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5ddbb13c86e6c75d5dd928447e3ec8bb">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1f23c9a4fe3565eb423286405a1de5ca">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_RESET_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga0f6d1104468e9f155a3b9477a84531a6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_SGMODE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae0e7fa6cee94c02784164c315268c6a6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DELAY_MAX
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5c26fb92eb7913f78454aeaae8f91115">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DESC_LSB_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaca543a8c03c6cd2d6d7284cc4bd119c2">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DSTADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9a61d8801792647638b54afcafbd8a86">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DSTADDR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3064fdc2bc683fa002bedf51498d810c">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_DumpBd()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga37f4ecb500f691583798662804d5da18">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_DumpRegisters()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3287c31f1aa41a1e4a535af134324524">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_GetCoalesce()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga92087f03877293982f895e8178557f6a">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_GetError()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae1fbdb8f7ad8926f744c771e07814f72">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrDisable()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabdccf08d74f4e037b06a36a2e9db2877">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrEnable()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrGetEnabled()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrHandler()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga8acd5bf5f5f072c6e425a8cc1b589498">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IsBusy()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaee6e140ed15cd9b7e49145e01220115a">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_LookupConfig()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3ecc6331ed89e613e7f1fb53f45a4cb0">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_MAX_TRANSFER_LEN
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac84f0c20f910716d8f3e48ff23294440">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_ReadReg
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gafcbfb5805f763b09fd93a283afa8a55e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_Reset()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaaf97cc8317af0bf1678973925beff0c5">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_ResetIsDone()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2575375744593bd55425365dde7744e5">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_SelectKeyHole()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga815f36efce97dba797f67f9acbbb761d">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_SetCoalesce()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga91adf55050cb617cee00b0ba2f0d754e">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_SimpleTransfer()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1e81ba2046ada4a40527c50ee7fdce9a">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabec2417b4096d65fa8f07a84eef38cea">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_DECODE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9bdb5e1000af0d05ba0b9481e71b5d2d">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_INTERNAL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9c4d04c2dc3d2601d5e63067a7e5e751">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SG_DEC_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaab7404d4487c554b8d6c8c984732c46e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SG_INT_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga67ecbbc57656c5e82c86541961cef427">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SG_SLV_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gad47677d061063e96f50b5d28af989879">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SLAVE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga95a6cfba374a96cfc1f899bda9cdc9bc">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_IDLE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga73bb174cc046fe8f5d51da6f2d11cfaa">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaa5e9b49d3805237bc9ed772948fbf4ae">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_SGINCLD_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gada1a00e54aeb12049cd23a005eb47c52">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SRCADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaeca7eef88c0b04de01219565d5039d93">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SRCADDR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga53c4bf8e65e8770c6fe129160ad07e29">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_TDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaed7af011eefd18c937d40571593b9297">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_TDESC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5a00af58a865daf4ee6995ade0c9cdd1">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_WriteReg
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gad6d4705f0ef363ca8d3dab00df58728f">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_COALESCE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga156955220ded772774e8146b2ff6e7d6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_DELAY_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga20aec8c77e90ca555dc44341c40af592">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gad2b921e876e581f84be0e7c152d13221">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_DELAY_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga615ffaf234787866d781bf67b214dda3">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_ERROR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaa4987449eeea265c2cbe875a7eed3ee8">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_IOC_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7f2c9f2df6f106e9576ec6d0d0448e0b">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_SIMPLE_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga14246912a21d68d0dde910704b6d0ac6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
257
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_defs.html
Executable file
257
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_defs.html
Executable file
|
|
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|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<html xmlns="http://www.w3.org/1999/xhtml">
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<head>
|
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<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
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<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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<meta name="generator" content="Doxygen 1.8.10"/>
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<title>axicdma: APIs</title>
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<script type="text/javascript" src="jquery.js"></script>
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<tbody>
|
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<tr style="height: 56px;">
|
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<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
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<td id="projectalign" style="padding-left: 0.5em;">
|
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<div id="projectname">axicdma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
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</td>
|
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</tr>
|
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</tbody>
|
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</table>
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<!-- end header part -->
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<ul class="tablist">
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<li><a href="index.html"><span>Overview</span></a></li>
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<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
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<li><a href="files.html"><span>File List</span></a></li>
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</ul>
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<div id="navrow3" class="tabs2">
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<ul class="tablist">
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<li><a href="globals.html"><span>All</span></a></li>
|
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<li><a href="globals_func.html"><span>Functions</span></a></li>
|
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<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
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<li class="current"><a href="globals_defs.html"><span>Macros</span></a></li>
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</ul>
|
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</ul>
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</div>
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</div><!-- top -->
|
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<div class="contents">
|
||||
 
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAXICDMA_BD_ADDRLEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga0d0d6c6e655e662017785bd3afb8ff1e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFDST_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3950ca65fb96bad92246c88399f38d89">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFDST_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gacd2dd9425a21034814a89119ff957528">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFSRC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga62a39b3ce53b54ba5641b4ad654054a4">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_BUFSRC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaf29c4c37b3f8d6fee34a0f6e014a80d3">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_CTRL_LEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7153a14322b05f4845ac7796f6ab92fa">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_CTRL_LENGTH_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga08590ca37cda0c7e7648f8b58bb70d94">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_HASDRE_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga8e9efcc5a93543b6a6c75ab211ed8318">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_HW_NUM_BYTES
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga17eecb43d41d19d66cca58097dec4891">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_ISLITE_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaadb078c2f018d8422e66ebaaf4149712">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_MAX_LEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga6d00373734319bbfc1f81b2df043e0c4">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_MINIMUM_ALIGNMENT
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaae822f32753ddd2fec7be5d3c9e9a4ff">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_NDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga73442468eff68f4fac6ca04f7d66b3bc">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_NDESC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaac93627274e0a7ff4e45613eddd60d64">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_NUM_WORDS
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga710808485441a384edf28b803363f3dd">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_PHYS_ADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac3b26e44089dbe1e471eb9aedc6797fa">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_PHYS_ADDR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2dac41e5e3020258ed9ff6f2c5299e85">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_START_CLEAR
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7a4abf2f49cd4e47db090ef83c1d4224">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_ALL_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab72e831b0648742189a2623b040166b7">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaff5819b9b557b391de8b69c7c730b492">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_COMPLETE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac206252f0aeb8a2f8c28aaf7c0f8361e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_DEC_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5beb3dd9b31ecb304f698bab67ca81b3">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_INT_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga36516a3195bb957d00ef16b9f2ddf671">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9bc60587fa8dd61bb342dff49b7c8fc8">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_STS_SLV_ERR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga23cf4a9370aec62b2000113b6709e92a">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_TO_CLEAR
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab4e667853d75008ef5a74aca06762980">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BD_WORDLEN_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac5ef7101904b47a4ec640bedec49e0fc">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_BTT_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaf2b93c5bebf2fdcf9516bcfefc7ae356">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaac2ba51f1e81b8ed8fe31bc5632d2980">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CDESC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaf62f028c2ed24dea6e0ebf8388cdf670">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_COALESCE_MAX
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga0bb5457c991743bf45e9db3201df17ed">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_KHOLE_RD_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac31916a2867c9e47834091131d449f88">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_KHOLE_WR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5ddbb13c86e6c75d5dd928447e3ec8bb">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1f23c9a4fe3565eb423286405a1de5ca">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_RESET_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga0f6d1104468e9f155a3b9477a84531a6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_CR_SGMODE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae0e7fa6cee94c02784164c315268c6a6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DELAY_MAX
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5c26fb92eb7913f78454aeaae8f91115">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DESC_LSB_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaca543a8c03c6cd2d6d7284cc4bd119c2">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DSTADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9a61d8801792647638b54afcafbd8a86">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_DSTADDR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3064fdc2bc683fa002bedf51498d810c">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_MAX_TRANSFER_LEN
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gac84f0c20f910716d8f3e48ff23294440">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_ReadReg
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gafcbfb5805f763b09fd93a283afa8a55e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabec2417b4096d65fa8f07a84eef38cea">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_DECODE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9bdb5e1000af0d05ba0b9481e71b5d2d">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_INTERNAL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9c4d04c2dc3d2601d5e63067a7e5e751">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SG_DEC_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaab7404d4487c554b8d6c8c984732c46e">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SG_INT_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga67ecbbc57656c5e82c86541961cef427">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SG_SLV_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gad47677d061063e96f50b5d28af989879">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_ERR_SLAVE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga95a6cfba374a96cfc1f899bda9cdc9bc">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_IDLE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga73bb174cc046fe8f5d51da6f2d11cfaa">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaa5e9b49d3805237bc9ed772948fbf4ae">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SR_SGINCLD_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gada1a00e54aeb12049cd23a005eb47c52">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SRCADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaeca7eef88c0b04de01219565d5039d93">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_SRCADDR_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga53c4bf8e65e8770c6fe129160ad07e29">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_TDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaed7af011eefd18c937d40571593b9297">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_TDESC_OFFSET
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5a00af58a865daf4ee6995ade0c9cdd1">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_WriteReg
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gad6d4705f0ef363ca8d3dab00df58728f">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_COALESCE_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga156955220ded772774e8146b2ff6e7d6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_DELAY_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga20aec8c77e90ca555dc44341c40af592">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gad2b921e876e581f84be0e7c152d13221">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_DELAY_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga615ffaf234787866d781bf67b214dda3">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_ERROR_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaa4987449eeea265c2cbe875a7eed3ee8">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_IOC_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7f2c9f2df6f106e9576ec6d0d0448e0b">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXICDMA_XR_IRQ_SIMPLE_ALL_MASK
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga14246912a21d68d0dde910704b6d0ac6">xaxicdma_hw.h</a>
|
||||
</li>
|
||||
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|
||||
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|
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
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<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
218
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_func.html
Executable file
218
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_func.html
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|
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|
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|
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|
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<div id="projectname">axicdma
|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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<div class="contents">
|
||||
 
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAxiCdma_BdClear()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga594480d7591185014d72869ac15fd490">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdClearSts()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga5ee87642c7b803ad1543c5f839872594">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdClone()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaa16c4a61c0b1b2892ee5869e62546884">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetDstBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae95f4fe35bf907a14c7ec44dcc2f0033">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetLength()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2d0201500b1c123a0eb67c02f9666598">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetNextPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2091d8d3a0a4743a557307b1153b4791">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetPhysAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga535e9b3301b3227aed27e42961304165">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetSrcBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae42ce84dde541ca08b7995ded0e164cb">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdGetSts()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga25c6311cbd4ac7c3a1dec2e2a59c0bf7">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingAlloc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingClone()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingCntCalc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabf6db470a391644bdd03727d17bcb0d6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingCreate()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingFree()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingFromHw()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingGetCnt()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga6dda9c5b4ded0bdbf1e85d6532461ef6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingGetCurrBd()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab6f6efa84ee457f155a4c7a94e4227da">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingGetFreeCnt()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga07f505ed309a6eb2172e7e8e154fa082">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingMemCalc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1525cddb18badb5737c1017f2a0d34e1">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingNext()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingPrev()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingSnapShotCurrBd()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga4677cddba8354ca3979f9b6ae386ffde">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingToHw()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdRingUnAlloc()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetCurBdPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae1333cf9309c85b0f620e026c889e01c">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetDstBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2b4866bb4184857c6de973d76f7e7e71">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetHasDRE()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga270070a493422c1d6f64842febb012d8">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetIsLite()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1025e9931f9d6fc4b7a0d526169eeab0">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetLength()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3467e25f29ab081f1d9b0a1a685adbfa">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetMaxLen()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga03aff38e0c27e9925e4a79986e351e0d">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetNextPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gab4d51959154b33364f8e3104c4a1afb0">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetPhysAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga27a4cefa4eee7b30158763c0619c725b">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetSrcBufAddr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga18cd5efedba0025703b7c3a845f52cad">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetTailBdPtr()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1141024e912e7012d2c716cef9fc791f">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_BdSetWordLen()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga7956eaa8a90bcf2a0894d513b9c15639">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_CfgInitialize()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaadefa567a30eb3ab3213919fff7d3f9b">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_DumpBd()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga37f4ecb500f691583798662804d5da18">xaxicdma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_DumpRegisters()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3287c31f1aa41a1e4a535af134324524">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_GetCoalesce()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga92087f03877293982f895e8178557f6a">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_GetError()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gae1fbdb8f7ad8926f744c771e07814f72">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrDisable()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gabdccf08d74f4e037b06a36a2e9db2877">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrEnable()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrGetEnabled()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IntrHandler()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga8acd5bf5f5f072c6e425a8cc1b589498">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_IsBusy()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaee6e140ed15cd9b7e49145e01220115a">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_LookupConfig()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga3ecc6331ed89e613e7f1fb53f45a4cb0">xaxicdma.h</a>
|
||||
</li>
|
||||
<li>XAxiCdma_Reset()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#gaaf97cc8317af0bf1678973925beff0c5">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_ResetIsDone()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga2575375744593bd55425365dde7744e5">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_SelectKeyHole()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga815f36efce97dba797f67f9acbbb761d">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_SetCoalesce()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga91adf55050cb617cee00b0ba2f0d754e">xaxicdma.c</a>
|
||||
</li>
|
||||
<li>XAxiCdma_SimpleTransfer()
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga1e81ba2046ada4a40527c50ee7fdce9a">xaxicdma.c</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<ul>
|
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
61
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_type.html
Executable file
61
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_type.html
Executable file
|
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<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
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<td id="projectalign" style="padding-left: 0.5em;">
|
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<div id="projectname">axicdma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
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|
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|
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|
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</div><!-- top -->
|
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<div class="contents">
|
||||
 <ul>
|
||||
<li>XAxiCdma_Bd
|
||||
: <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">xaxicdma_bd.h</a>
|
||||
</li>
|
||||
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<div class="title">axicdma Documentation</div> </div>
|
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</div><!--header-->
|
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<div class="contents">
|
||||
<div class="textblock"><p>This is the driver API for the AXI CDMA engine. For a full description of the features of the AXI CDMA engine, please refer to the hardware specification. This driver supports the following features:</p>
|
||||
<ul>
|
||||
<li>Simple DMA transfer</li>
|
||||
<li>Scatter gather (SG) DMA transfer</li>
|
||||
<li>Interrupt for error or completion of transfers</li>
|
||||
<li>For SG DMA transfer:<ul>
|
||||
<li>Programmable interrupt coalescing</li>
|
||||
<li>Programmable delay timer counter</li>
|
||||
<li>Managing the buffer descriptors (BDs)</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
<p><b>Two Hardware Building Modes</b></p>
|
||||
<p>The hardware can be built in two modes:</p>
|
||||
<ul>
|
||||
<li><b>Simple only mode</b>, in this mode, only simple transfers are supported by the hardware. The functionality is similar to the XPS Central DMA, however, the driver API to do the transfer is slightly different.</li>
|
||||
<li><b>Hybrid mode</b>, in this mode, the hardware supports both the simple transfer and the SG transfer. However, only one kind of transfer can be active at a time. If an SG transfer is ongoing in the hardware, a submission of a simple transfer fails. If a simple transfer is ongoing in the hardware, a submission of an SG transfer is successful, however the SG transfer will not start until the simple transfer is done.</li>
|
||||
</ul>
|
||||
<p><b>Transactions</b></p>
|
||||
<p>The hardware supports two types of transfers, the simple DMA transfer and the scatter gather (SG) DMA transfer.</p>
|
||||
<p>A simple DMA transfer only needs source buffer address, destination buffer address and transfer length to do a DMA transfer. Only one transfer can be submitted to the hardware at a time.</p>
|
||||
<p>A SG DMA transfer requires setting up a buffer descriptor (BD), which keeps the transfer information, including source buffer address, destination buffer address, and transfer length. The hardware updates the BD for the completion status of the transfer. BDs that are connected to each other can be submitted to the hardware at once, therefore, the SG DMA transfer has better performance when the application is doing multiple transfers each time.</p>
|
||||
<p><b>Callback Function</b></p>
|
||||
<p>Each transfer, for which the application cares about its completion, should provide with the driver its callback function. The signature of the callback function is as the following:</p>
|
||||
<p>void XAxiCdma_CallBackFn(void *CallBackRef, u32 IrqMask, int *NumPtr);</p>
|
||||
<p>Where the CallBackRef is a reference pointer that the application passes to the driver along with the callback function. The driver passes IrqMask to the application when it calls this callback. The NumPtr is only used in SG mode to track how many BDs still left for this callback function.</p>
|
||||
<p>The callback function is set upon transfer submission:</p>
|
||||
<ul>
|
||||
<li><p class="startli">Simple transfer callback function setup:</p>
|
||||
<p class="startli"><b>Only set the callback function if in interrupt mode.</b></p>
|
||||
<p class="startli">For simple transfers, the callback function along with the callback reference pointer is passed to the driver through the submission of the simple transfer:</p>
|
||||
<p class="startli">XAxiCdma_SimpleTransfer(...)</p>
|
||||
</li>
|
||||
<li><p class="startli">SG transfer callback function setup: For SG transfers, the callback function and the callback reference pointer are set through the transfer submission call:</p>
|
||||
<p class="startli">XAxiCdma_BdRingToHw(...)</p>
|
||||
</li>
|
||||
</ul>
|
||||
<p><b>Simple Transfers</b></p>
|
||||
<p>For an application that only does one DMA transfer at a time, and the DMA engine is exclusively used by this application, simple DMA transfer is sufficient.</p>
|
||||
<p>Using the simple DMA transfer has the advantage of ease of use comparing to SG DMA transfer. For an individual DMA transfer, simple DMA transfer is also faster because of simplicity in software and hardware.</p>
|
||||
<p><b>Scatter Gather (SG) Transfers</b></p>
|
||||
<p>For an application that has multiple DMA transfers sometimes, or the DMA engine is shared by multiple applications, using SG DMA transfer yields better performance over all applications.</p>
|
||||
<p>The SG DMA transfer provides queuing of multiple transfers, therefore, it provides better performance because the hardware can continuously work on all submitted transfers without software intervention.</p>
|
||||
<p>The down side of using the SG DMA transfer is that you have to manage the memory for the buffer descriptors (BD), and setup BDs for the transfers.</p>
|
||||
<p><b>Interrupts</b></p>
|
||||
<p>The driver handles the interrupts.</p>
|
||||
<p>The completion of a transfer, that has a callback function associated with, will trigger the driver to call the callback function. The IrqMask that is passed through the callback function notifies the application about the completion status of the transfer.</p>
|
||||
<p><b>Interrupt Coalescing for SG Transfers</b></p>
|
||||
<p>For SG transfers, the application can program the interrupt coalescing threshold to reduce the frequency of interrupts. If the number of transfers does not match well with the interrupt coalescing threshold, the completion of the last transfer will not trigger the completion interrupt. However, after the specified delay count time, the delay interrupt will fire.</p>
|
||||
<p>By default, the interrupt threshold for the hardware is one, which is one interrupt per BD completion.</p>
|
||||
<p><b>Delay Interrupt for SG Transfers</b></p>
|
||||
<p>Delay interrupt is to signal the application about inactivity of transfers. If the delay interrupt is enabled, the delay timer starts counting down once a transfer has started. If the interval between transfers is longer than the delay counter, the delay interrupt is fired.</p>
|
||||
<p>By default, the delay counter is zero, which means the delay interrupt is disabled. To enable delay interrupt, the delay interrupt enable bit must be set and the delay counter must be set to a value between 1 to 255.</p>
|
||||
<p><b>BD management for SG DMA Transfers </b></p>
|
||||
<p>BD is shared by the software and the hardware. To use BD for SG DMA transfers, the application needs to use the driver API to do the following:</p>
|
||||
<ul>
|
||||
<li><p class="startli">Setup the BD ring:</p><ul>
|
||||
<li>XAxiCdma_BdRingCreate(...)</li>
|
||||
</ul>
|
||||
<p class="startli">Note that the memory for the BD ring is allocated and is later de-allocated by the application.</p>
|
||||
</li>
|
||||
<li>Request BD from the BD ring, more than one BDs can be requested at once:<ul>
|
||||
<li>XAxiCdma_BdRingAlloc(...)</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Prepare BDs for the transfer, one BD at a time:<ul>
|
||||
<li>XAxiCdma_BdSetSrcBufAddr(...)</li>
|
||||
<li>XAxiCdma_BdSetDstBufAddr(...)</li>
|
||||
<li>XAxiCdma_BdSetLength(...)</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Submit all prepared BDs to the hardware:<ul>
|
||||
<li>XAxiCdma_BdRingToHw(...)</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Upon transfer completion, the application can request completed BDs from the hardware:<ul>
|
||||
<li>XAxiCdma_BdRingFromHw(...)</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>After the application has finished using the BDs, it should free the BDs back to the free pool:<ul>
|
||||
<li>XAxiCdma_BdRingFree(...)</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
<p>The driver also provides API functions to get the status of a completed BD, along with get functions for other fields in the BD.</p>
|
||||
<p>The following two diagrams show the correct flow of BDs:</p>
|
||||
<p>The first diagram shows a complete cycle for BDs, starting from requesting the BDs to freeing the BDs. </p><pre></pre><pre> <a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6" title="This function requests number of BDs from the BD ring. ">XAxiCdma_BdRingAlloc()</a> <a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68" title="This function tries to enqueue the number of BDs to the hardware. ">XAxiCdma_BdRingToHw()</a>
|
||||
Free ------------------------> Pre-process ----------------------> Hardware
|
||||
|
|
||||
/|\ |
|
||||
| <a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864" title="This function returns the BDs back to the free pool of the BD ring. ">XAxiCdma_BdRingFree()</a> <a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc" title="This function tries to retrieve completed BDs from the hardware. ">XAxiCdma_BdRingFromHw()</a> |
|
||||
+--------------------------- Post-process <----------------------+</pre><pre> </pre><p>The second diagram shows when a DMA transfer is to be cancelled before enqueuing to the hardware, application can return the requested BDs to the free group using <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f" title="This function tries to free the number of BDs back to the ring. ">XAxiCdma_BdRingUnAlloc()</a>. </p><pre></pre><pre> <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f" title="This function tries to free the number of BDs back to the ring. ">XAxiCdma_BdRingUnAlloc()</a>
|
||||
Free <----------------------- Pre-process</pre><pre> </pre><p><b>Physical/Virtual Addresses</b></p>
|
||||
<p>Addresses for the transfer buffers are physical addresses.</p>
|
||||
<p>For SG transfers, the next BD pointer in a BD is also a physical address.</p>
|
||||
<p>However, application's reference to a BD and to the transfer buffers are through virtual addresses.</p>
|
||||
<p>The application is responsible to translate the virtual addresses of its transfer buffers to physical addresses before handing them to the driver.</p>
|
||||
<p>For systems where MMU is not used, or MMU is a direct mapping, then the physical address and the virtual address are the same.</p>
|
||||
<p><b>Cache Coherency</b></p>
|
||||
<p>To prevent cache and memory inconsistency:</p><ul>
|
||||
<li>Flush the transmit buffer range before the transfer</li>
|
||||
<li>Invalidate the receive buffer range before passing it to the hardware and before passing it to the application</li>
|
||||
</ul>
|
||||
<p>For SG transfers:</p><ul>
|
||||
<li>Flush the BDs once the preparation setup is done</li>
|
||||
<li>Invalidate the memory region for BDs when BDs are retrieved from the hardware.</li>
|
||||
</ul>
|
||||
<p><b>BD alignment for SG Transfers</b></p>
|
||||
<p>The hardware has requirement for the minimum alignment of the BDs, XAXICDMA_BD_MINIMUM_ALIGNMENT. It is OK to have an alignment larger than the required minimum alignment, however, it must be multiple of the minimum alignment. The alignment is passed into <a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5" title="This function creates the BD ring for the driver instance. ">XAxiCdma_BdRingCreate()</a>.</p>
|
||||
<p><b>Error Handling</b></p>
|
||||
<p>The hardware halts upon all error conditions. The driver will reset the hardware once the error occurs.</p>
|
||||
<p>The IrqMask argument in the callback function notifies the application about error conditions for the transfer.</p>
|
||||
<p><b>Mutual Exclusion</b></p>
|
||||
<p>The driver does not provide mutual exclusion mechanisms, it is up to the upper layer to handle this.</p>
|
||||
<p><b>Hardware Defaults & Exclusive Use</b></p>
|
||||
<p>The hardware is in the following condition on start or after a reset:</p>
|
||||
<ul>
|
||||
<li>All interrupts are disabled.</li>
|
||||
<li>The engine is in simple mode.</li>
|
||||
<li>Interrupt coalescing counter is one.</li>
|
||||
<li>Delay counter is 0.</li>
|
||||
</ul>
|
||||
<p>The driver has exclusive use of the hardware registers and BDs. Accessing the hardware registers or the BDs should always go through the driver API functions.</p>
|
||||
<p><b>Hardware Features That User Should Be Aware of</b></p>
|
||||
<p>For performance reasons, the driver does not check the submission of transfers during run time. It is the user's responsibility to submit approrpiate transfers to the hardware. The following hardware features should be considerred when submitting a transfer:</p>
|
||||
<p>. Whether the hardware supports unaligned transfers, reflected through C_INCLUDE_DRE in system.mhs file. Submitting unaligned transfers while the hardware does not support it, causes errors upon transfer submission. Aligned transfer is in respect to word length, and word length is defined through the building parameter XPAR_AXI_CDMA_0_M_AXI_DATA_WIDTH.</p>
|
||||
<p>. Memory range of the transfer addresses. Transfer data to executable memory can crash the system.</p>
|
||||
<p>. Lite mode. To save hardware resources (drastically), you may select "lite" mode build of the hardware. However, with lite mode, the following features are _not_ supported:</p><ul>
|
||||
<li>Cross page boundary transfer. Each transfer must be restrictly inside one page; otherwise, slave error occurs.</li>
|
||||
<li>Unaligned transfer.</li>
|
||||
<li>Data width larger than 64 bit</li>
|
||||
<li>Maximum transfer length each time is limited to data_width * burst_len</li>
|
||||
</ul>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><pre> . Updated the debug print on type casting to avoid warnings on u32. Cast
|
||||
u32 to (unsigned int) to use the x format.</pre><pre> Ver Who Date Changes
|
||||
----- ---- -------- -------------------------------------------------------
|
||||
1.00a jz 07/08/10 First release
|
||||
2.01a rkv 01/25/11 Added TCL script to generate Test App code for peripheral
|
||||
tests.
|
||||
Replaced with "\r\n" in place on "\n\r" in printf
|
||||
statements. Made some minor modifications for Doxygen
|
||||
2.02a srt 01/18/13 Added support for Key Hole feature (CR: 687217).
|
||||
Updated DDR base address for IPI designs (CR 703656).
|
||||
2.03a srt 04/13/13 Removed Warnings (CR 705006).
|
||||
Added logic to check if DDR is present in the test app
|
||||
tcl file. (CR 700806)
|
||||
3.0 adk 19/12/13 Updated as per the New Tcl API's
|
||||
4.0 adk 27/07/15 Added support for 64-bit Addressing.
|
||||
</pre> </div></div><!-- contents -->
|
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||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
</html>
|
||||
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|
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
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|
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|
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<div class="textblock">Here is a list of all modules:</div><div class="directory">
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||||
<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><a class="el" href="group__axicdma__v4__0.html" target="_self">Axicdma_v4_0</a></td><td class="desc">The implementation of the API of Xilinx CDMA engine </td></tr>
|
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Functions</h2></td></tr>
|
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<tr class="memitem:gae1fbdb8f7ad8926f744c771e07814f72"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae1fbdb8f7ad8926f744c771e07814f72">XAxiCdma_GetError</a> (XAxiCdma *InstancePtr)</td></tr>
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<tr class="separator:gae1fbdb8f7ad8926f744c771e07814f72"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gaaf97cc8317af0bf1678973925beff0c5"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaaf97cc8317af0bf1678973925beff0c5">XAxiCdma_Reset</a> (XAxiCdma *InstancePtr)</td></tr>
|
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<tr class="separator:gaaf97cc8317af0bf1678973925beff0c5"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga2575375744593bd55425365dde7744e5"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2575375744593bd55425365dde7744e5">XAxiCdma_ResetIsDone</a> (XAxiCdma *InstancePtr)</td></tr>
|
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<tr class="separator:ga2575375744593bd55425365dde7744e5"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gaadefa567a30eb3ab3213919fff7d3f9b"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaadefa567a30eb3ab3213919fff7d3f9b">XAxiCdma_CfgInitialize</a> (XAxiCdma *InstancePtr, XAxiCdma_Config *CfgPtr, u32 EffectiveAddr)</td></tr>
|
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<tr class="separator:gaadefa567a30eb3ab3213919fff7d3f9b"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gaee6e140ed15cd9b7e49145e01220115a"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaee6e140ed15cd9b7e49145e01220115a">XAxiCdma_IsBusy</a> (XAxiCdma *InstancePtr)</td></tr>
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<tr class="separator:gaee6e140ed15cd9b7e49145e01220115a"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga815f36efce97dba797f67f9acbbb761d"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga815f36efce97dba797f67f9acbbb761d">XAxiCdma_SelectKeyHole</a> (XAxiCdma *InstancePtr, u32 Direction, u32 Select)</td></tr>
|
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<tr class="separator:ga815f36efce97dba797f67f9acbbb761d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e81ba2046ada4a40527c50ee7fdce9a"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1e81ba2046ada4a40527c50ee7fdce9a">XAxiCdma_SimpleTransfer</a> (XAxiCdma *InstancePtr, UINTPTR SrcAddr, UINTPTR DstAddr, int Length, XAxiCdma_CallBackFn SimpleCallBack, void *CallBackRef)</td></tr>
|
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<tr class="separator:ga1e81ba2046ada4a40527c50ee7fdce9a"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga91adf55050cb617cee00b0ba2f0d754e"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga91adf55050cb617cee00b0ba2f0d754e">XAxiCdma_SetCoalesce</a> (XAxiCdma *InstancePtr, u32 Counter, u32 Delay)</td></tr>
|
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<tr class="separator:ga91adf55050cb617cee00b0ba2f0d754e"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga92087f03877293982f895e8178557f6a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga92087f03877293982f895e8178557f6a">XAxiCdma_GetCoalesce</a> (XAxiCdma *InstancePtr, u32 *CounterPtr, u32 *DelayPtr)</td></tr>
|
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|
||||
<tr class="memitem:ga3287c31f1aa41a1e4a535af134324524"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3287c31f1aa41a1e4a535af134324524">XAxiCdma_DumpRegisters</a> (XAxiCdma *InstancePtr)</td></tr>
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</ul>
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</body>
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</html>
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126
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma_8h.html
Executable file
126
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma_8h.html
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<tr class="memitem:ga3ecc6331ed89e613e7f1fb53f45a4cb0"><td class="memItemLeft" align="right" valign="top">XAxiCdma_Config * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3ecc6331ed89e613e7f1fb53f45a4cb0">XAxiCdma_LookupConfig</a> (u32 DeviceId)</td></tr>
|
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<tr class="memitem:gaadefa567a30eb3ab3213919fff7d3f9b"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaadefa567a30eb3ab3213919fff7d3f9b">XAxiCdma_CfgInitialize</a> (XAxiCdma *InstancePtr, XAxiCdma_Config *CfgPtr, u32 EffectiveAddr)</td></tr>
|
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<tr class="separator:gaadefa567a30eb3ab3213919fff7d3f9b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaaf97cc8317af0bf1678973925beff0c5"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaaf97cc8317af0bf1678973925beff0c5">XAxiCdma_Reset</a> (XAxiCdma *InstancePtr)</td></tr>
|
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<tr class="separator:gaaf97cc8317af0bf1678973925beff0c5"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2575375744593bd55425365dde7744e5"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2575375744593bd55425365dde7744e5">XAxiCdma_ResetIsDone</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga2575375744593bd55425365dde7744e5"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaee6e140ed15cd9b7e49145e01220115a"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaee6e140ed15cd9b7e49145e01220115a">XAxiCdma_IsBusy</a> (XAxiCdma *InstancePtr)</td></tr>
|
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<tr class="separator:gaee6e140ed15cd9b7e49145e01220115a"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga91adf55050cb617cee00b0ba2f0d754e"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga91adf55050cb617cee00b0ba2f0d754e">XAxiCdma_SetCoalesce</a> (XAxiCdma *InstancePtr, u32 Counter, u32 Delay)</td></tr>
|
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<tr class="separator:ga91adf55050cb617cee00b0ba2f0d754e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga92087f03877293982f895e8178557f6a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga92087f03877293982f895e8178557f6a">XAxiCdma_GetCoalesce</a> (XAxiCdma *InstancePtr, u32 *CounterPtr, u32 *DelayPtr)</td></tr>
|
||||
<tr class="separator:ga92087f03877293982f895e8178557f6a"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae1fbdb8f7ad8926f744c771e07814f72"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae1fbdb8f7ad8926f744c771e07814f72">XAxiCdma_GetError</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:gae1fbdb8f7ad8926f744c771e07814f72"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga9f146fe224ea4c9a86477de3030dd79a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">XAxiCdma_IntrEnable</a> (XAxiCdma *InstancePtr, u32 Mask)</td></tr>
|
||||
<tr class="separator:ga9f146fe224ea4c9a86477de3030dd79a"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1a269e884ce6e3552313521dea8032b6"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">XAxiCdma_IntrGetEnabled</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga1a269e884ce6e3552313521dea8032b6"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gabdccf08d74f4e037b06a36a2e9db2877"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabdccf08d74f4e037b06a36a2e9db2877">XAxiCdma_IntrDisable</a> (XAxiCdma *InstancePtr, u32 Mask)</td></tr>
|
||||
<tr class="separator:gabdccf08d74f4e037b06a36a2e9db2877"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga8acd5bf5f5f072c6e425a8cc1b589498"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga8acd5bf5f5f072c6e425a8cc1b589498">XAxiCdma_IntrHandler</a> (void *HandlerRef)</td></tr>
|
||||
<tr class="separator:ga8acd5bf5f5f072c6e425a8cc1b589498"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1e81ba2046ada4a40527c50ee7fdce9a"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1e81ba2046ada4a40527c50ee7fdce9a">XAxiCdma_SimpleTransfer</a> (XAxiCdma *InstancePtr, UINTPTR SrcAddr, UINTPTR DstAddr, int Length, XAxiCdma_CallBackFn SimpleCallBack, void *CallBackRef)</td></tr>
|
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<tr class="separator:ga1e81ba2046ada4a40527c50ee7fdce9a"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga815f36efce97dba797f67f9acbbb761d"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga815f36efce97dba797f67f9acbbb761d">XAxiCdma_SelectKeyHole</a> (XAxiCdma *InstancePtr, u32 Direction, u32 Select)</td></tr>
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<tr class="separator:ga815f36efce97dba797f67f9acbbb761d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabf6db470a391644bdd03727d17bcb0d6"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabf6db470a391644bdd03727d17bcb0d6">XAxiCdma_BdRingCntCalc</a> (u32 Alignment, u32 Bytes, u32 BdBuffAddr)</td></tr>
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||||
<tr class="separator:gabf6db470a391644bdd03727d17bcb0d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1525cddb18badb5737c1017f2a0d34e1"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1525cddb18badb5737c1017f2a0d34e1">XAxiCdma_BdRingMemCalc</a> (u32 Alignment, int NumBd)</td></tr>
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<tr class="separator:ga1525cddb18badb5737c1017f2a0d34e1"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6dda9c5b4ded0bdbf1e85d6532461ef6"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga6dda9c5b4ded0bdbf1e85d6532461ef6">XAxiCdma_BdRingGetCnt</a> (XAxiCdma *InstancePtr)</td></tr>
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<tr class="separator:ga6dda9c5b4ded0bdbf1e85d6532461ef6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07f505ed309a6eb2172e7e8e154fa082"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga07f505ed309a6eb2172e7e8e154fa082">XAxiCdma_BdRingGetFreeCnt</a> (XAxiCdma *InstancePtr)</td></tr>
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<tr class="separator:ga07f505ed309a6eb2172e7e8e154fa082"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4677cddba8354ca3979f9b6ae386ffde"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga4677cddba8354ca3979f9b6ae386ffde">XAxiCdma_BdRingSnapShotCurrBd</a> (XAxiCdma *InstancePtr)</td></tr>
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<tr class="separator:ga4677cddba8354ca3979f9b6ae386ffde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab6f6efa84ee457f155a4c7a94e4227da"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab6f6efa84ee457f155a4c7a94e4227da">XAxiCdma_BdRingGetCurrBd</a> (XAxiCdma *InstancePtr)</td></tr>
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||||
<tr class="separator:gab6f6efa84ee457f155a4c7a94e4227da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabfe3657b7aad9487946d6bb436aeba18"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">XAxiCdma_BdRingNext</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:gabfe3657b7aad9487946d6bb436aeba18"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga24af2a3eacaf56c972e6313683a3f7e0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">XAxiCdma_BdRingPrev</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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||||
<tr class="separator:ga24af2a3eacaf56c972e6313683a3f7e0"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gab36598e09c09ffa680b6c0f207baf9f5"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">XAxiCdma_BdRingCreate</a> (XAxiCdma *InstancePtr, UINTPTR PhysAddr, UINTPTR VirtAddr, u32 Alignment, int BdCount)</td></tr>
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<tr class="separator:gab36598e09c09ffa680b6c0f207baf9f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3183f9f25654d2a066c19213f29897be"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">XAxiCdma_BdRingClone</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *TemplateBdPtr)</td></tr>
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<tr class="separator:ga3183f9f25654d2a066c19213f29897be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27dd0cdc27b7a724533db75336c4acc6"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">XAxiCdma_BdRingAlloc</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> **BdSetPtr)</td></tr>
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<tr class="separator:ga27dd0cdc27b7a724533db75336c4acc6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9be6e4072c2a17f4519ffa9f9ec3332f"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">XAxiCdma_BdRingUnAlloc</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr)</td></tr>
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<tr class="separator:ga9be6e4072c2a17f4519ffa9f9ec3332f"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga3c5cd26d9fd3311c2ccfa4253c587e68"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">XAxiCdma_BdRingToHw</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr, XAxiCdma_CallBackFn CallBackFn, void *CallBackRef)</td></tr>
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<tr class="separator:ga3c5cd26d9fd3311c2ccfa4253c587e68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafce6a8283bdec8b9c35169c7cd29f4dc"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">XAxiCdma_BdRingFromHw</a> (XAxiCdma *InstancePtr, int BdLimit, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> **BdSetPtr)</td></tr>
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<tr class="separator:gafce6a8283bdec8b9c35169c7cd29f4dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab204e3f92e4edd3865ecf6b344f0b864"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">XAxiCdma_BdRingFree</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr)</td></tr>
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<tr class="separator:gab204e3f92e4edd3865ecf6b344f0b864"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae1333cf9309c85b0f620e026c889e01c"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae1333cf9309c85b0f620e026c889e01c">XAxiCdma_BdSetCurBdPtr</a> (XAxiCdma *InstancePtr, UINTPTR CurBdPtr)</td></tr>
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<tr class="separator:gae1333cf9309c85b0f620e026c889e01c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1141024e912e7012d2c716cef9fc791f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1141024e912e7012d2c716cef9fc791f">XAxiCdma_BdSetTailBdPtr</a> (XAxiCdma *InstancePtr, UINTPTR TailBdPtr)</td></tr>
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<tr class="separator:ga1141024e912e7012d2c716cef9fc791f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3287c31f1aa41a1e4a535af134324524"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3287c31f1aa41a1e4a535af134324524">XAxiCdma_DumpRegisters</a> (XAxiCdma *InstancePtr)</td></tr>
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<tr class="separator:ga3287c31f1aa41a1e4a535af134324524"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</html>
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100
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__bd_8c.html
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<div class="title">xaxicdma_bd.c File Reference</div> </div>
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Functions</h2></td></tr>
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<tr class="memitem:ga594480d7591185014d72869ac15fd490"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga594480d7591185014d72869ac15fd490">XAxiCdma_BdClear</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga594480d7591185014d72869ac15fd490"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa16c4a61c0b1b2892ee5869e62546884"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaa16c4a61c0b1b2892ee5869e62546884">XAxiCdma_BdClone</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *TmpBd)</td></tr>
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<tr class="separator:gaa16c4a61c0b1b2892ee5869e62546884"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2091d8d3a0a4743a557307b1153b4791"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2091d8d3a0a4743a557307b1153b4791">XAxiCdma_BdGetNextPtr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga2091d8d3a0a4743a557307b1153b4791"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4d51959154b33364f8e3104c4a1afb0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab4d51959154b33364f8e3104c4a1afb0">XAxiCdma_BdSetNextPtr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR NextBdPtr)</td></tr>
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<tr class="separator:gab4d51959154b33364f8e3104c4a1afb0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga25c6311cbd4ac7c3a1dec2e2a59c0bf7"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga25c6311cbd4ac7c3a1dec2e2a59c0bf7">XAxiCdma_BdGetSts</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga25c6311cbd4ac7c3a1dec2e2a59c0bf7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5ee87642c7b803ad1543c5f839872594"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga5ee87642c7b803ad1543c5f839872594">XAxiCdma_BdClearSts</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga5ee87642c7b803ad1543c5f839872594"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga18cd5efedba0025703b7c3a845f52cad"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga18cd5efedba0025703b7c3a845f52cad">XAxiCdma_BdSetSrcBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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<tr class="separator:ga18cd5efedba0025703b7c3a845f52cad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae42ce84dde541ca08b7995ded0e164cb"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae42ce84dde541ca08b7995ded0e164cb">XAxiCdma_BdGetSrcBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:gae42ce84dde541ca08b7995ded0e164cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b4866bb4184857c6de973d76f7e7e71"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2b4866bb4184857c6de973d76f7e7e71">XAxiCdma_BdSetDstBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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<tr class="memitem:gae95f4fe35bf907a14c7ec44dcc2f0033"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae95f4fe35bf907a14c7ec44dcc2f0033">XAxiCdma_BdGetDstBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:gae95f4fe35bf907a14c7ec44dcc2f0033"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3467e25f29ab081f1d9b0a1a685adbfa"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3467e25f29ab081f1d9b0a1a685adbfa">XAxiCdma_BdSetLength</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int LenBytes)</td></tr>
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<tr class="separator:ga3467e25f29ab081f1d9b0a1a685adbfa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d0201500b1c123a0eb67c02f9666598"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2d0201500b1c123a0eb67c02f9666598">XAxiCdma_BdGetLength</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga2d0201500b1c123a0eb67c02f9666598"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27a4cefa4eee7b30158763c0619c725b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga27a4cefa4eee7b30158763c0619c725b">XAxiCdma_BdSetPhysAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR PhysAddr)</td></tr>
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<tr class="separator:ga27a4cefa4eee7b30158763c0619c725b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1025e9931f9d6fc4b7a0d526169eeab0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1025e9931f9d6fc4b7a0d526169eeab0">XAxiCdma_BdSetIsLite</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int IsLite)</td></tr>
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<tr class="separator:ga1025e9931f9d6fc4b7a0d526169eeab0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga270070a493422c1d6f64842febb012d8"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga270070a493422c1d6f64842febb012d8">XAxiCdma_BdSetHasDRE</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int HasDRE)</td></tr>
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<tr class="separator:ga270070a493422c1d6f64842febb012d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7956eaa8a90bcf2a0894d513b9c15639"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga7956eaa8a90bcf2a0894d513b9c15639">XAxiCdma_BdSetWordLen</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int WordLen)</td></tr>
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<tr class="separator:ga7956eaa8a90bcf2a0894d513b9c15639"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03aff38e0c27e9925e4a79986e351e0d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga03aff38e0c27e9925e4a79986e351e0d">XAxiCdma_BdSetMaxLen</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int MaxLen)</td></tr>
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<tr class="separator:ga03aff38e0c27e9925e4a79986e351e0d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga535e9b3301b3227aed27e42961304165"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga535e9b3301b3227aed27e42961304165">XAxiCdma_BdGetPhysAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga535e9b3301b3227aed27e42961304165"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga37f4ecb500f691583798662804d5da18"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga37f4ecb500f691583798662804d5da18">XAxiCdma_DumpBd</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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</table>
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</html>
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106
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__bd_8h.html
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<div class="title">xaxicdma_bd.h File Reference</div> </div>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:ga33f9ce1ca035334d63cd08d4cf26daea"><td class="memItemLeft" align="right" valign="top">typedef UINTPTR </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a>[<a class="el" href="group__axicdma__v4__0.html#ga710808485441a384edf28b803363f3dd">XAXICDMA_BD_NUM_WORDS</a>]</td></tr>
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<tr class="separator:ga33f9ce1ca035334d63cd08d4cf26daea"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
|
||||
<tr class="memitem:ga594480d7591185014d72869ac15fd490"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga594480d7591185014d72869ac15fd490">XAxiCdma_BdClear</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga594480d7591185014d72869ac15fd490"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gaa16c4a61c0b1b2892ee5869e62546884"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gaa16c4a61c0b1b2892ee5869e62546884">XAxiCdma_BdClone</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *TmpBd)</td></tr>
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<tr class="separator:gaa16c4a61c0b1b2892ee5869e62546884"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2091d8d3a0a4743a557307b1153b4791"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2091d8d3a0a4743a557307b1153b4791">XAxiCdma_BdGetNextPtr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga2091d8d3a0a4743a557307b1153b4791"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4d51959154b33364f8e3104c4a1afb0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab4d51959154b33364f8e3104c4a1afb0">XAxiCdma_BdSetNextPtr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR NextBdPtr)</td></tr>
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<tr class="separator:gab4d51959154b33364f8e3104c4a1afb0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga25c6311cbd4ac7c3a1dec2e2a59c0bf7"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga25c6311cbd4ac7c3a1dec2e2a59c0bf7">XAxiCdma_BdGetSts</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga25c6311cbd4ac7c3a1dec2e2a59c0bf7"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga5ee87642c7b803ad1543c5f839872594"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga5ee87642c7b803ad1543c5f839872594">XAxiCdma_BdClearSts</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga5ee87642c7b803ad1543c5f839872594"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga18cd5efedba0025703b7c3a845f52cad"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga18cd5efedba0025703b7c3a845f52cad">XAxiCdma_BdSetSrcBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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<tr class="separator:ga18cd5efedba0025703b7c3a845f52cad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae42ce84dde541ca08b7995ded0e164cb"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae42ce84dde541ca08b7995ded0e164cb">XAxiCdma_BdGetSrcBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:gae42ce84dde541ca08b7995ded0e164cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b4866bb4184857c6de973d76f7e7e71"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2b4866bb4184857c6de973d76f7e7e71">XAxiCdma_BdSetDstBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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<tr class="separator:ga2b4866bb4184857c6de973d76f7e7e71"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae95f4fe35bf907a14c7ec44dcc2f0033"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae95f4fe35bf907a14c7ec44dcc2f0033">XAxiCdma_BdGetDstBufAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:gae95f4fe35bf907a14c7ec44dcc2f0033"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3467e25f29ab081f1d9b0a1a685adbfa"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3467e25f29ab081f1d9b0a1a685adbfa">XAxiCdma_BdSetLength</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int LenBytes)</td></tr>
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<tr class="separator:ga3467e25f29ab081f1d9b0a1a685adbfa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2d0201500b1c123a0eb67c02f9666598"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga2d0201500b1c123a0eb67c02f9666598">XAxiCdma_BdGetLength</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga2d0201500b1c123a0eb67c02f9666598"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27a4cefa4eee7b30158763c0619c725b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga27a4cefa4eee7b30158763c0619c725b">XAxiCdma_BdSetPhysAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, UINTPTR PhysAddr)</td></tr>
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<tr class="separator:ga27a4cefa4eee7b30158763c0619c725b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1025e9931f9d6fc4b7a0d526169eeab0"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1025e9931f9d6fc4b7a0d526169eeab0">XAxiCdma_BdSetIsLite</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int IsLite)</td></tr>
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<tr class="separator:ga1025e9931f9d6fc4b7a0d526169eeab0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga270070a493422c1d6f64842febb012d8"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga270070a493422c1d6f64842febb012d8">XAxiCdma_BdSetHasDRE</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int HasDRE)</td></tr>
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<tr class="separator:ga270070a493422c1d6f64842febb012d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7956eaa8a90bcf2a0894d513b9c15639"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga7956eaa8a90bcf2a0894d513b9c15639">XAxiCdma_BdSetWordLen</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int WordLen)</td></tr>
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<tr class="separator:ga7956eaa8a90bcf2a0894d513b9c15639"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga03aff38e0c27e9925e4a79986e351e0d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga03aff38e0c27e9925e4a79986e351e0d">XAxiCdma_BdSetMaxLen</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr, int MaxLen)</td></tr>
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<tr class="memitem:ga535e9b3301b3227aed27e42961304165"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga535e9b3301b3227aed27e42961304165">XAxiCdma_BdGetPhysAddr</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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<tr class="memitem:ga37f4ecb500f691583798662804d5da18"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga37f4ecb500f691583798662804d5da18">XAxiCdma_DumpBd</a> (<a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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96
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__bdring_8c.html
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Functions</h2></td></tr>
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<tr class="memitem:gabf6db470a391644bdd03727d17bcb0d6"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabf6db470a391644bdd03727d17bcb0d6">XAxiCdma_BdRingCntCalc</a> (u32 Alignment, u32 Bytes, u32 BdBuffAddr)</td></tr>
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<tr class="separator:gabf6db470a391644bdd03727d17bcb0d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1525cddb18badb5737c1017f2a0d34e1"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1525cddb18badb5737c1017f2a0d34e1">XAxiCdma_BdRingMemCalc</a> (u32 Alignment, int NumBd)</td></tr>
|
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<tr class="separator:ga1525cddb18badb5737c1017f2a0d34e1"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae1333cf9309c85b0f620e026c889e01c"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gae1333cf9309c85b0f620e026c889e01c">XAxiCdma_BdSetCurBdPtr</a> (XAxiCdma *InstancePtr, UINTPTR CurBdPtr)</td></tr>
|
||||
<tr class="separator:gae1333cf9309c85b0f620e026c889e01c"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab6f6efa84ee457f155a4c7a94e4227da"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab6f6efa84ee457f155a4c7a94e4227da">XAxiCdma_BdRingGetCurrBd</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:gab6f6efa84ee457f155a4c7a94e4227da"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6dda9c5b4ded0bdbf1e85d6532461ef6"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga6dda9c5b4ded0bdbf1e85d6532461ef6">XAxiCdma_BdRingGetCnt</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga6dda9c5b4ded0bdbf1e85d6532461ef6"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga07f505ed309a6eb2172e7e8e154fa082"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga07f505ed309a6eb2172e7e8e154fa082">XAxiCdma_BdRingGetFreeCnt</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga07f505ed309a6eb2172e7e8e154fa082"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga4677cddba8354ca3979f9b6ae386ffde"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga4677cddba8354ca3979f9b6ae386ffde">XAxiCdma_BdRingSnapShotCurrBd</a> (XAxiCdma *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga4677cddba8354ca3979f9b6ae386ffde"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1141024e912e7012d2c716cef9fc791f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1141024e912e7012d2c716cef9fc791f">XAxiCdma_BdSetTailBdPtr</a> (XAxiCdma *InstancePtr, UINTPTR TailBdPtr)</td></tr>
|
||||
<tr class="separator:ga1141024e912e7012d2c716cef9fc791f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gabfe3657b7aad9487946d6bb436aeba18"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">XAxiCdma_BdRingNext</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
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||||
<tr class="separator:gabfe3657b7aad9487946d6bb436aeba18"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga24af2a3eacaf56c972e6313683a3f7e0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">XAxiCdma_BdRingPrev</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
|
||||
<tr class="separator:ga24af2a3eacaf56c972e6313683a3f7e0"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab36598e09c09ffa680b6c0f207baf9f5"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">XAxiCdma_BdRingCreate</a> (XAxiCdma *InstancePtr, UINTPTR PhysAddr, UINTPTR VirtAddr, u32 Alignment, int BdCount)</td></tr>
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||||
<tr class="separator:gab36598e09c09ffa680b6c0f207baf9f5"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga3183f9f25654d2a066c19213f29897be"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">XAxiCdma_BdRingClone</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *TemplateBdPtr)</td></tr>
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||||
<tr class="separator:ga3183f9f25654d2a066c19213f29897be"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga27dd0cdc27b7a724533db75336c4acc6"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">XAxiCdma_BdRingAlloc</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> **BdSetPtr)</td></tr>
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||||
<tr class="separator:ga27dd0cdc27b7a724533db75336c4acc6"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga9be6e4072c2a17f4519ffa9f9ec3332f"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">XAxiCdma_BdRingUnAlloc</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr)</td></tr>
|
||||
<tr class="separator:ga9be6e4072c2a17f4519ffa9f9ec3332f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga3c5cd26d9fd3311c2ccfa4253c587e68"><td class="memItemLeft" align="right" valign="top">LONG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">XAxiCdma_BdRingToHw</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr, XAxiCdma_CallBackFn CallBackFn, void *CallBackRef)</td></tr>
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||||
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||||
<tr class="memitem:gafce6a8283bdec8b9c35169c7cd29f4dc"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">XAxiCdma_BdRingFromHw</a> (XAxiCdma *InstancePtr, int BdLimit, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> **BdSetPtr)</td></tr>
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<tr class="memitem:gab204e3f92e4edd3865ecf6b344f0b864"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">XAxiCdma_BdRingFree</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr)</td></tr>
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56
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__g_8c.html
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|
||||
<a href="#define-members">Macros</a> </div>
|
||||
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|
||||
<div class="title">xaxicdma_hw.h File Reference</div> </div>
|
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Macros</h2></td></tr>
|
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<tr class="memitem:gafcbfb5805f763b09fd93a283afa8a55e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gafcbfb5805f763b09fd93a283afa8a55e">XAxiCdma_ReadReg</a>(BaseAddress, RegOffset)    XAxiCdma_In32((BaseAddress) + (u32)(RegOffset))</td></tr>
|
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<tr class="separator:gafcbfb5805f763b09fd93a283afa8a55e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad6d4705f0ef363ca8d3dab00df58728f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gad6d4705f0ef363ca8d3dab00df58728f">XAxiCdma_WriteReg</a>(BaseAddress, RegOffset, Data)    XAxiCdma_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))</td></tr>
|
||||
<tr class="separator:gad6d4705f0ef363ca8d3dab00df58728f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Buffer Descriptor Alignment</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Maximum transfer length</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>This is determined by hardware </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Register offset definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>Register accesses are 32-bit. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_SR_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>This register reports status of a DMA channel, including idle state, errors, and interrupts </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_CR_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmask for descriptor</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmask for interrupts</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>These masks are shared by XAXICDMA_CR_OFFSET register and XAXICDMA_SR_OFFSET register </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmask and shift for delay counter and coalescing counter</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>These masks are shared by XAXICDMA_CR_OFFSET register and XAXICDMA_SR_OFFSET register </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Buffer Descriptor offsets</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>The first 8 words are used by hardware.</p>
|
||||
<p>Cache operations are required for words used by hardware to enforce data consistency. All words after the 8th word are for software use only. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_BD_CTRL_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_BD_STS_OFFSET register</div></td></tr>
|
||||
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56
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__i_8h.html
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70
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__intr_8c.html
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|
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|
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Functions</h2></td></tr>
|
||||
<tr class="memitem:ga9f146fe224ea4c9a86477de3030dd79a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">XAxiCdma_IntrEnable</a> (XAxiCdma *InstancePtr, u32 Mask)</td></tr>
|
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<tr class="separator:ga9f146fe224ea4c9a86477de3030dd79a"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1a269e884ce6e3552313521dea8032b6"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">XAxiCdma_IntrGetEnabled</a> (XAxiCdma *InstancePtr)</td></tr>
|
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<tr class="separator:ga1a269e884ce6e3552313521dea8032b6"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gabdccf08d74f4e037b06a36a2e9db2877"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabdccf08d74f4e037b06a36a2e9db2877">XAxiCdma_IntrDisable</a> (XAxiCdma *InstancePtr, u32 Mask)</td></tr>
|
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|
||||
<tr class="memitem:ga8acd5bf5f5f072c6e425a8cc1b589498"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga8acd5bf5f5f072c6e425a8cc1b589498">XAxiCdma_IntrHandler</a> (void *HandlerRef)</td></tr>
|
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|
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64
XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__sinit_8c.html
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|
||||
<tr id="row_8_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxidma__porting__guide_8h.html" target="_self">xaxidma_porting_guide.h</a></td><td class="desc"></td></tr>
|
||||
<tr id="row_9_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxidma__selftest_8c.html" target="_self">xaxidma_selftest.c</a></td><td class="desc"></td></tr>
|
||||
<tr id="row_10_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icondoc"></span><a class="el" href="xaxidma__sinit_8c.html" target="_self">xaxidma_sinit.c</a></td><td class="desc"></td></tr>
|
||||
</table>
|
||||
</div><!-- directory -->
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
130
XilinxProcessorIPLib/drivers/axidma/doc/html/api/functions.html
Executable file
130
XilinxProcessorIPLib/drivers/axidma/doc/html/api/functions.html
Executable file
|
|
@ -0,0 +1,130 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
||||
<meta name="generator" content="Doxygen 1.8.10"/>
|
||||
<title>axidma: Data Fields</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
||||
<script type="text/javascript" src="dynsections.js"></script>
|
||||
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li class="current"><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow2" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="functions.html"><span>Data Fields</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li class="current"><a href="functions.html"><span>All</span></a></li>
|
||||
<li><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
<div class="textblock">Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:</div><ul>
|
||||
<li>AddrWidth
|
||||
: <a class="el" href="struct_x_axi_dma.html#a663f5757eabe6b1b8813ed5fdb0d0edb">XAxiDma</a>
|
||||
, <a class="el" href="struct_x_axi_dma___config.html#a6fc1c26fb40944182ff84e370e667eb0">XAxiDma_Config</a>
|
||||
</li>
|
||||
<li>AllCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3c928d2f36e8daf845a70afdae2573a4">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>BdaRestart
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a2519fd626856e7ab0d822adc46aab7d8">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>ChanBase
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a138fd282802e5f6ed3cb1d2505ede08a">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FirstBdAddr
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a6d41078607d5a8165e67d6483e40e9ab">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FirstBdPhysAddr
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#add2c7d765c8d95eeb9d0f94a54775528">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FreeCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a51ec0929002582a900d404502e9a1622">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FreeHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3e067ffdf2820a816f2d6dda6e3f9114">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HasStsCntrlStrm
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7d35cb00bb50fff2e24c15f7d7d8dae0">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HwCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#ab49406dd2d9ec65e3f38d1cc3c880391">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HwHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#af097be199cf9d1d62cf32f775309a4f3">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HwTail
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7abe8351de43377407c579cd158f2448">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>IsRxChannel
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a912bf38e61c8b03995ece842426b3ccf">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>LastBdAddr
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3743d05f930d7c04abb0693f2ef0b271">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>Length
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#af0b3fe5c9b9123209b3000e0d95193ed">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PostCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#afd4e1620895f91a829354e131432d2b3">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PostHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a92668e60e10a940428e68f816c64eab6">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PreCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a68e8042d227f7a40821a478deb063215">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PreHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a8a2958fb6be370d3cc29972f57203952">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>RingIndex
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#ac14f09fcd00f1869c8194d790f73d791">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>RunState
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a443e5c48e677e9a1a4e85a383eefc2be">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>Separation
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#aafd8e01bf65c7950235d8f21cf225e12">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
130
XilinxProcessorIPLib/drivers/axidma/doc/html/api/functions_vars.html
Executable file
130
XilinxProcessorIPLib/drivers/axidma/doc/html/api/functions_vars.html
Executable file
|
|
@ -0,0 +1,130 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
||||
<meta name="generator" content="Doxygen 1.8.10"/>
|
||||
<title>axidma: Data Fields - Variables</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
||||
<script type="text/javascript" src="dynsections.js"></script>
|
||||
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li class="current"><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow2" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="functions.html"><span>Data Fields</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="functions.html"><span>All</span></a></li>
|
||||
<li class="current"><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
 <ul>
|
||||
<li>AddrWidth
|
||||
: <a class="el" href="struct_x_axi_dma.html#a663f5757eabe6b1b8813ed5fdb0d0edb">XAxiDma</a>
|
||||
, <a class="el" href="struct_x_axi_dma___config.html#a6fc1c26fb40944182ff84e370e667eb0">XAxiDma_Config</a>
|
||||
</li>
|
||||
<li>AllCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3c928d2f36e8daf845a70afdae2573a4">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>BdaRestart
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a2519fd626856e7ab0d822adc46aab7d8">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>ChanBase
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a138fd282802e5f6ed3cb1d2505ede08a">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FirstBdAddr
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a6d41078607d5a8165e67d6483e40e9ab">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FirstBdPhysAddr
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#add2c7d765c8d95eeb9d0f94a54775528">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FreeCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a51ec0929002582a900d404502e9a1622">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>FreeHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3e067ffdf2820a816f2d6dda6e3f9114">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HasStsCntrlStrm
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7d35cb00bb50fff2e24c15f7d7d8dae0">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HwCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#ab49406dd2d9ec65e3f38d1cc3c880391">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HwHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#af097be199cf9d1d62cf32f775309a4f3">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>HwTail
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7abe8351de43377407c579cd158f2448">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>IsRxChannel
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a912bf38e61c8b03995ece842426b3ccf">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>LastBdAddr
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3743d05f930d7c04abb0693f2ef0b271">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>Length
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#af0b3fe5c9b9123209b3000e0d95193ed">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PostCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#afd4e1620895f91a829354e131432d2b3">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PostHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a92668e60e10a940428e68f816c64eab6">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PreCnt
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a68e8042d227f7a40821a478deb063215">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>PreHead
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a8a2958fb6be370d3cc29972f57203952">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>RingIndex
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#ac14f09fcd00f1869c8194d790f73d791">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>RunState
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#a443e5c48e677e9a1a4e85a383eefc2be">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
<li>Separation
|
||||
: <a class="el" href="struct_x_axi_dma___bd_ring.html#aafd8e01bf65c7950235d8f21cf225e12">XAxiDma_BdRing</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
558
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals.html
Executable file
558
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals.html
Executable file
|
|
@ -0,0 +1,558 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
||||
<meta name="generator" content="Doxygen 1.8.10"/>
|
||||
<title>axidma: APIs</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
||||
<script type="text/javascript" src="dynsections.js"></script>
|
||||
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li class="current"><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Macros</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow4" class="tabs3">
|
||||
<ul class="tablist">
|
||||
<li class="current"><a href="#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
<div class="textblock">Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:</div>
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAxiDma
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac08fe7cb6508a133a7ef036bba7df5b5">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_Bd
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_ADDRLEN_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2b64a2b3eb88233498a9dd6a01068de6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_BUFA_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaccd48ccba559728721eac77a4acc23d1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_BUFA_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8bb69f2401305faa1d89fb8dc31e770f">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_BYTES_TO_CLEAR
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga97ec6974f990aef9ea2298c1df5d72c3">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa409dba5ec46ad5a31953e22c4d3333f">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_LEN_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac3372d0a1625537d5b637f40ca20f52c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_TXEOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae9f4d328b9fb0bbdcadd6dc4c09fd4fa">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_TXSOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac279d381208f7f123ac07736702f8ff1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_DRE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad40d36cf3371ad3d176835933dc85e4b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_DRE_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga932a4ab54f38046e6635b9b87a584c79">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_DRE_SHIFT
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac15dd4e956aa14d53a6f92544db468d1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_STSCNTRL_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga819b1b14cd4d386e588679105a8738a6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HW_NUM_BYTES
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae8ddf1d33d85b0a7508b9a072d95bf14">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_ID_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga117e266cba3edbd1fd2f1e29305dcfc8">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_MCCTL_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6daf74c6d99207a0d8ba91a049e661c6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_MINIMUM_ALIGNMENT
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7957d90570574e9c7a7ee308b290ecab">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_NDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga730aa200407e3c7e38e6fad914ad1eb0">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_NDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga64e86b7df328bc7209a28152f86fd609">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_NUM_WORDS
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga751f6662ab9baed908685eef30d322b8">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_START_CLEAR
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9eac2b100bcdf0aa763d1575f43c822b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STRIDE_VSIZE_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga83d7d4d6e88ab44910242b61fcd7f8fe">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_ALL_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8018932d7e9b743c4c5c76ab3d373de1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac433a776854849cbeaadcbed14132cb6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_COMPLETE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadb7c73caf5e5007dcb56ea029d7390ba">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_DEC_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae79c77f87a9887510ea53480c1e9a998">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_INT_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga09e502148e375f2d695d6d5d6e1797d2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac71ad6cd79fc11e699bc10e3736fa08c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_RXEOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga91b0504c621f6c06b0df4752fe65ee3a">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_RXSOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga29915484fd9f840a8ab727cf83bbfe81">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_SLV_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1f7727fc139a6b3100a5a17cb110efa6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR0_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gace0f0376ed9e0aad3d3e3c80254b20b4">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR1_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7d9d62be0e0ed11b18f185b62dc72f67">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR2_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadc83ff22099fdf61a5237965ce082504">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR3_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae1c5981447fe5ac113a6da3c1e19d6ed">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR4_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1ccae584923d0b6d0851a8bbae4528c9">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_WORDLEN_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gafcbd1a131c650a5d6ceee6be15008a77">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_WORDLEN_SHIFT
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga3db5b1d09deab9660ff65c06136acbc5">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdClear
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6c47900232c9a5a5ba30a2c1a3343628">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetActualLength
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga135667574b201437cfbdbecd8b348ee0">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetAppWord()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9d2814e4249884e68fe9e6f370920ca4">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetARCache
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa5f7ba67cbbb678662e4b5d36c63d16e">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetARUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga72d1616af8d996f12db78473a75b54b6">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetBufAddr
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf858d9659197442c9e96856c206423c6">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetCtrl
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga495e780d704ecf548d3536b3bb8961a5">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetId
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf3f333d78d115724bfcac84746d8cfa6">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetLength
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9875ecb45b47664b70d74e8810fd5cf0">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetStride
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga29a75b8f1de16a347544e37b48d8129c">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetSts
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf2448f2b2ac172da0d19adeae3cc4c48">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetTDest
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8c1e3dd04821568424ffc77caf11a851">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetTId
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac14fa76311fd7e5fb59b81fd9e251f62">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetTUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7a2f9668058b7e4cdc89dffcce6086d3">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetVSize
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad9f48ceb5b30d66bab23337edc35d2fe">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdHwCompleted
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga20937b96fad07f286948f1af50590421">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRead
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingAckIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9e782e3715c1d2dd03e5d03434f47319">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingAlloc()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingBusy
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf7c291190c92ce93d72f95c5b04ef1d4">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingCheck()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingClone()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingCntCalc
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga98555b607a9ec831dc6473e77515bb4b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingCreate()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingDumpRegs()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingFree()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingFromHw()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetCnt
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac62389e25e6775026cf1be6c383e665b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetCoalesce()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetCurrBd
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga21aa8dbf6eabf9146097d9b3cc91c574">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetError
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga24cd47cdbfac0813e0d9caf966a1a3d2">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetFreeCnt
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga415cf0c379fef0104f9f52881ead13a7">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7a9d2103e6d09fc3850b34a6386dc803">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetSr
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga740fa349c7811de2b7bae5cf83eb445e">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingHwIsStarted
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga766bed2454969636d827fb79faeeee97">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingIntDisable
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0269e07693c731cf7721c6f19f8eb69b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingIntEnable
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2518030938ab80081f6896fc5589682c">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingIntGetEnabled
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadbb17169213d8af8b50e6dee7f7b6d8b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingMemCalc
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6899085c400b8f453381b305ac5521d9">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingNext
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4b7e75d1acf86428bd79fcd0d1c13745">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingPrev
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga86c6d4b9c4f8766634d46a3078eadc8a">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingSetCoalesce()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingSnapShotCurrBd
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0d79253861939c76e6d440ecde2b6edd">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingStart()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingToHw()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingUnAlloc()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetAppWord()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gafc6434a23594c20c2b601f010a979e48">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetARCache
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac7d8a383cd6d5aff6ee36c3a3db20cbf">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetARUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae89253197f1aef6582d5cda3e49f8ead">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetBufAddr()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetBufAddrMicroMode()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8947514b5acfea6298d0f969f3d2b97e">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetCtrl()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4eb2615ac89054e982c3f3c37f0ddb52">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetId
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga53eeff085fd39a91b855939f13fe76f3">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetLength()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4056035d8e7c90a68fa954c60d021e07">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetStride
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga58961be41e3c0bc2694444bfe37b6c27">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetTDest
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5f9b3088c4e16c7f5584610a43b17462">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetTId
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa5bc321894b77ca6194c867018d9fe12">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetTUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#gacf41c0ebe00870b6cdd34e46698e081b">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetVSize
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga383b2c0667bf5bafa22922168895bd5e">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdWrite
|
||||
: <a class="el" href="group__axidma__v9__0.html#gab3b7d771208c01701b35bce165332a9f">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BUFFLEN_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa7ede468ba17bf106101d4850184dc74">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_Busy()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaff68c0ba3e9e25dfe5e39153301862f8">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga00ee7a235750d8795961223455407051">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga24b47801eed2ab0ba326b8b40d24f2b1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_CfgInitialize()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAXIDMA_COALESCE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga280fd988ea7ec3fadfe7cf1293f39e36">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_CYCLIC_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2d34bf268de2f2ef4d32351043835f68">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_KEYHOLE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8bdf83c8ba16d8217a2a6486a9b5b521">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8534b07ed878f92d2062dc1680fb0391">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_RESET_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga33fda61f0837d37da36d3b72b90b0fba">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_RUNSTOP_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gab0ebdf6b7776e79941efe1325aac5aa9">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DELAY_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae3ad7ae6b5814b99de67bba06ec77ed1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DESC_LSB_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga170ce0e12eb12686a03e006610e2acd2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DESTADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga3a54e372851dbae81c33997ef2ba8d2f">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DESTADDR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4e98e82ed389c23918315d833b457ea9">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_DumpBd()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga53983f629aba5b4ebf27f803a7a9284e">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4102192c408420feb5b7db14d47c6d5c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_DECODE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa19b93d226e97afd08d3869dc530b692">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_INTERNAL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga87ac559811703a8ca33fc6b427913f2b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SG_DEC_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga43ecb16ea8e8d09a33364a17610d8909">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SG_INT_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1f9ef0d10a7456a25a4b244955659d65">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SG_SLV_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0f0d25fd68716e868742115c9a28c18c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SLAVE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6d50743f6c9d6474561f6727eb956915">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_GetRxIndexRing
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf03e87b58cf2f9800e6260fda3745631">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_GetRxRing
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6373ac3baa5365607f6727f4e2ece7a5">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_GetTxRing
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9d91f29c6dc41f2106e097f1f9957a6e">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_HALTED_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga70671c3d8cd1e51c56723e298d268cce">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_HasSg
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga18dd03026dd6c0ebd13526116c09ccae">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IDLE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa3538e8c2a6e024641259c85368667f0">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrAckIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9ff0d2e5b50846e4b6a2d683283c10d5">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrDisable
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1936b497c0fa61d326807e5ed8dd572b">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrEnable
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadac28afa26e2cb55bdada1ee3c016c52">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrGetEnabled
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadba63ad7c0a784d569736a8d1eb7c367">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrGetIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6a0eb17bcfcaf3331e01855d302f5f0e">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8347e41a5c01bdabefce9c8484a7ced1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_DELAY_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadc4a45d09bcbf852f29b880935d607dc">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_ERROR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6ceb68e74761910e4253795a9b4992cf">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_IOC_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae420f2ad87e1e00456a6ee3a80d2480d">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_LookupConfig()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0cbcf5259635ea3c336fe5413c98f75c">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_MICROMODE_MIN_BUF_ALIGN
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf0f7e862f42d26800868816eea2a949b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_Pause()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_ReadReg
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga99f615c527035db697545614fff86bf2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_Reset()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_ResetIsDone()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_Resume()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_CDESC0_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad80414a88feceb1da4b9f77096d1d590">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_CDESC0_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga79d2eca90f2554b8c893b2f9a70c795c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_NDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6fc559cbc93b62195de6ecaf25492467">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadfdc083e0b249c04624a66e700d7a7c4">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_TDESC0_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa9b5991af857e7bac763311fd917978d">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_TDESC0_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadfa4d02f0dd1fd005c695e9977457722">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_SelectCyclicMode()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2d93bfcf1c3e34cb9fc4a22da6148dc5">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_SelectKeyHole()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5becc8b0f9945af34e372ced2b37aebb">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_Selftest()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad4ea3039216916336ae1c7598ff26afc">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SGCTL_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gab26580f9b4a94b3ab1d373ddeab7b3b6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_SimpleTransfer()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga50d6957f8447d4eab9e444666730f692">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SRCADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gafaafc49751e690d818d604efe368c481">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SRCADDR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga386fad6446792679302b362ed34022cf">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_StartBdRingHw()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAXIDMA_TDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6063ffb7cb46cdca589e6f31069f7758">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_TDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac8626fb2bed7230a2c82a7e1db0ddd35">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_TX_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga88232281611059fd669f0339888cd44e">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_UpdateBdRingCDesc()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_WriteReg
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga96d7b2834ae100f53627ca961393e9a2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
456
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_defs.html
Executable file
456
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_defs.html
Executable file
|
|
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<html xmlns="http://www.w3.org/1999/xhtml">
|
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<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
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<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
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<meta name="generator" content="Doxygen 1.8.10"/>
|
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<title>axidma: APIs</title>
|
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<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
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<script type="text/javascript" src="jquery.js"></script>
|
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<script type="text/javascript" src="dynsections.js"></script>
|
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<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
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<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
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</head>
|
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<body>
|
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<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
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<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
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<!-- end header part -->
|
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<!-- Generated by Doxygen 1.8.10 -->
|
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<div id="navrow1" class="tabs">
|
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<ul class="tablist">
|
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<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
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<li><a href="files.html"><span>File List</span></a></li>
|
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</ul>
|
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</div>
|
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<div id="navrow3" class="tabs2">
|
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<ul class="tablist">
|
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<li><a href="globals.html"><span>All</span></a></li>
|
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<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li class="current"><a href="globals_defs.html"><span>Macros</span></a></li>
|
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</ul>
|
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</div>
|
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<div id="navrow4" class="tabs3">
|
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<ul class="tablist">
|
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<li class="current"><a href="#index_x"><span>x</span></a></li>
|
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</ul>
|
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</div>
|
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</div><!-- top -->
|
||||
<div class="contents">
|
||||
 
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAXIDMA_BD_ADDRLEN_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2b64a2b3eb88233498a9dd6a01068de6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_BUFA_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaccd48ccba559728721eac77a4acc23d1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_BUFA_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8bb69f2401305faa1d89fb8dc31e770f">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_BYTES_TO_CLEAR
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga97ec6974f990aef9ea2298c1df5d72c3">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa409dba5ec46ad5a31953e22c4d3333f">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_LEN_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac3372d0a1625537d5b637f40ca20f52c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_TXEOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae9f4d328b9fb0bbdcadd6dc4c09fd4fa">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_CTRL_TXSOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac279d381208f7f123ac07736702f8ff1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_DRE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad40d36cf3371ad3d176835933dc85e4b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_DRE_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga932a4ab54f38046e6635b9b87a584c79">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_DRE_SHIFT
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac15dd4e956aa14d53a6f92544db468d1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HAS_STSCNTRL_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga819b1b14cd4d386e588679105a8738a6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_HW_NUM_BYTES
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae8ddf1d33d85b0a7508b9a072d95bf14">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_ID_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga117e266cba3edbd1fd2f1e29305dcfc8">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_MCCTL_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6daf74c6d99207a0d8ba91a049e661c6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_MINIMUM_ALIGNMENT
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7957d90570574e9c7a7ee308b290ecab">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_NDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga730aa200407e3c7e38e6fad914ad1eb0">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_NDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga64e86b7df328bc7209a28152f86fd609">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_NUM_WORDS
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga751f6662ab9baed908685eef30d322b8">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_START_CLEAR
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9eac2b100bcdf0aa763d1575f43c822b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STRIDE_VSIZE_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga83d7d4d6e88ab44910242b61fcd7f8fe">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_ALL_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8018932d7e9b743c4c5c76ab3d373de1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac433a776854849cbeaadcbed14132cb6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_COMPLETE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadb7c73caf5e5007dcb56ea029d7390ba">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_DEC_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae79c77f87a9887510ea53480c1e9a998">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_INT_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga09e502148e375f2d695d6d5d6e1797d2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac71ad6cd79fc11e699bc10e3736fa08c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_RXEOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga91b0504c621f6c06b0df4752fe65ee3a">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_RXSOF_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga29915484fd9f840a8ab727cf83bbfe81">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_STS_SLV_ERR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1f7727fc139a6b3100a5a17cb110efa6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR0_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gace0f0376ed9e0aad3d3e3c80254b20b4">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR1_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7d9d62be0e0ed11b18f185b62dc72f67">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR2_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadc83ff22099fdf61a5237965ce082504">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR3_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae1c5981447fe5ac113a6da3c1e19d6ed">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_USR4_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1ccae584923d0b6d0851a8bbae4528c9">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_WORDLEN_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gafcbd1a131c650a5d6ceee6be15008a77">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BD_WORDLEN_SHIFT
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga3db5b1d09deab9660ff65c06136acbc5">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdClear
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6c47900232c9a5a5ba30a2c1a3343628">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetActualLength
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga135667574b201437cfbdbecd8b348ee0">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetARCache
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa5f7ba67cbbb678662e4b5d36c63d16e">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetARUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga72d1616af8d996f12db78473a75b54b6">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetBufAddr
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf858d9659197442c9e96856c206423c6">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetCtrl
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga495e780d704ecf548d3536b3bb8961a5">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetId
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf3f333d78d115724bfcac84746d8cfa6">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetLength
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9875ecb45b47664b70d74e8810fd5cf0">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetStride
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga29a75b8f1de16a347544e37b48d8129c">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetSts
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf2448f2b2ac172da0d19adeae3cc4c48">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetTDest
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8c1e3dd04821568424ffc77caf11a851">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetTId
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac14fa76311fd7e5fb59b81fd9e251f62">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetTUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7a2f9668058b7e4cdc89dffcce6086d3">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdGetVSize
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad9f48ceb5b30d66bab23337edc35d2fe">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdHwCompleted
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga20937b96fad07f286948f1af50590421">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRead
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingAckIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9e782e3715c1d2dd03e5d03434f47319">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingBusy
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf7c291190c92ce93d72f95c5b04ef1d4">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingCntCalc
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga98555b607a9ec831dc6473e77515bb4b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetCnt
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac62389e25e6775026cf1be6c383e665b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetCurrBd
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga21aa8dbf6eabf9146097d9b3cc91c574">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetError
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga24cd47cdbfac0813e0d9caf966a1a3d2">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetFreeCnt
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga415cf0c379fef0104f9f52881ead13a7">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7a9d2103e6d09fc3850b34a6386dc803">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetSr
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga740fa349c7811de2b7bae5cf83eb445e">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingHwIsStarted
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga766bed2454969636d827fb79faeeee97">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingIntDisable
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0269e07693c731cf7721c6f19f8eb69b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingIntEnable
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2518030938ab80081f6896fc5589682c">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingIntGetEnabled
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadbb17169213d8af8b50e6dee7f7b6d8b">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingMemCalc
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6899085c400b8f453381b305ac5521d9">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingNext
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4b7e75d1acf86428bd79fcd0d1c13745">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingPrev
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga86c6d4b9c4f8766634d46a3078eadc8a">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingSnapShotCurrBd
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0d79253861939c76e6d440ecde2b6edd">xaxidma_bdring.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetARCache
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac7d8a383cd6d5aff6ee36c3a3db20cbf">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetARUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae89253197f1aef6582d5cda3e49f8ead">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetId
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga53eeff085fd39a91b855939f13fe76f3">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetStride
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga58961be41e3c0bc2694444bfe37b6c27">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetTDest
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5f9b3088c4e16c7f5584610a43b17462">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetTId
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa5bc321894b77ca6194c867018d9fe12">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetTUser
|
||||
: <a class="el" href="group__axidma__v9__0.html#gacf41c0ebe00870b6cdd34e46698e081b">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetVSize
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga383b2c0667bf5bafa22922168895bd5e">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdWrite
|
||||
: <a class="el" href="group__axidma__v9__0.html#gab3b7d771208c01701b35bce165332a9f">xaxidma_bd.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_BUFFLEN_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa7ede468ba17bf106101d4850184dc74">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga00ee7a235750d8795961223455407051">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga24b47801eed2ab0ba326b8b40d24f2b1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_COALESCE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga280fd988ea7ec3fadfe7cf1293f39e36">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_CYCLIC_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2d34bf268de2f2ef4d32351043835f68">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_KEYHOLE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8bdf83c8ba16d8217a2a6486a9b5b521">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8534b07ed878f92d2062dc1680fb0391">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_RESET_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga33fda61f0837d37da36d3b72b90b0fba">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_CR_RUNSTOP_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gab0ebdf6b7776e79941efe1325aac5aa9">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DELAY_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae3ad7ae6b5814b99de67bba06ec77ed1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DESC_LSB_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga170ce0e12eb12686a03e006610e2acd2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DESTADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga3a54e372851dbae81c33997ef2ba8d2f">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_DESTADDR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4e98e82ed389c23918315d833b457ea9">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4102192c408420feb5b7db14d47c6d5c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_DECODE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa19b93d226e97afd08d3869dc530b692">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_INTERNAL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga87ac559811703a8ca33fc6b427913f2b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SG_DEC_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga43ecb16ea8e8d09a33364a17610d8909">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SG_INT_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1f9ef0d10a7456a25a4b244955659d65">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SG_SLV_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0f0d25fd68716e868742115c9a28c18c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_ERR_SLAVE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6d50743f6c9d6474561f6727eb956915">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_GetRxIndexRing
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf03e87b58cf2f9800e6260fda3745631">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_GetRxRing
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6373ac3baa5365607f6727f4e2ece7a5">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_GetTxRing
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9d91f29c6dc41f2106e097f1f9957a6e">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_HALTED_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga70671c3d8cd1e51c56723e298d268cce">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_HasSg
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga18dd03026dd6c0ebd13526116c09ccae">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IDLE_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa3538e8c2a6e024641259c85368667f0">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrAckIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9ff0d2e5b50846e4b6a2d683283c10d5">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrDisable
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1936b497c0fa61d326807e5ed8dd572b">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrEnable
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadac28afa26e2cb55bdada1ee3c016c52">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrGetEnabled
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadba63ad7c0a784d569736a8d1eb7c367">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_IntrGetIrq
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6a0eb17bcfcaf3331e01855d302f5f0e">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_ALL_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8347e41a5c01bdabefce9c8484a7ced1">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_DELAY_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadc4a45d09bcbf852f29b880935d607dc">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_ERROR_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6ceb68e74761910e4253795a9b4992cf">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_IRQ_IOC_MASK
|
||||
: <a class="el" href="group__axidma__v9__0.html#gae420f2ad87e1e00456a6ee3a80d2480d">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_MICROMODE_MIN_BUF_ALIGN
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf0f7e862f42d26800868816eea2a949b">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_ReadReg
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga99f615c527035db697545614fff86bf2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_CDESC0_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad80414a88feceb1da4b9f77096d1d590">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_CDESC0_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga79d2eca90f2554b8c893b2f9a70c795c">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_NDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6fc559cbc93b62195de6ecaf25492467">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadfdc083e0b249c04624a66e700d7a7c4">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_TDESC0_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaa9b5991af857e7bac763311fd917978d">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_RX_TDESC0_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadfa4d02f0dd1fd005c695e9977457722">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SGCTL_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gab26580f9b4a94b3ab1d373ddeab7b3b6">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga50d6957f8447d4eab9e444666730f692">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SRCADDR_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gafaafc49751e690d818d604efe368c481">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_SRCADDR_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga386fad6446792679302b362ed34022cf">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_TDESC_MSB_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga6063ffb7cb46cdca589e6f31069f7758">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_TDESC_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac8626fb2bed7230a2c82a7e1db0ddd35">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAXIDMA_TX_OFFSET
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga88232281611059fd669f0339888cd44e">xaxidma_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_WriteReg
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga96d7b2834ae100f53627ca961393e9a2">xaxidma_hw.h</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
162
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_func.html
Executable file
162
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_func.html
Executable file
|
|
@ -0,0 +1,162 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
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<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
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<meta name="generator" content="Doxygen 1.8.10"/>
|
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<title>axidma: APIs</title>
|
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<link href="tabs.css" rel="stylesheet" type="text/css"/>
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<script type="text/javascript" src="jquery.js"></script>
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<script type="text/javascript" src="dynsections.js"></script>
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<link href="doxygen.css" rel="stylesheet" type="text/css" />
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<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
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</head>
|
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<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
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<!-- Generated by Doxygen 1.8.10 -->
|
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<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
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<ul class="tablist">
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li class="current"><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Macros</span></a></li>
|
||||
</ul>
|
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</div>
|
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<div id="navrow4" class="tabs3">
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<ul class="tablist">
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<li class="current"><a href="#index_x"><span>x</span></a></li>
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</ul>
|
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</div>
|
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</div><!-- top -->
|
||||
<div class="contents">
|
||||
 
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAxiDma_BdGetAppWord()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga9d2814e4249884e68fe9e6f370920ca4">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingAlloc()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingCheck()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingClone()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingCreate()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingDumpRegs()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingFree()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingFromHw()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingGetCoalesce()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingSetCoalesce()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingStart()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingToHw()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdRingUnAlloc()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetAppWord()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gafc6434a23594c20c2b601f010a979e48">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetBufAddr()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetBufAddrMicroMode()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8947514b5acfea6298d0f969f3d2b97e">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetCtrl()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4eb2615ac89054e982c3f3c37f0ddb52">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_BdSetLength()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga4056035d8e7c90a68fa954c60d021e07">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_Busy()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaff68c0ba3e9e25dfe5e39153301862f8">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_CfgInitialize()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_DumpBd()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga53983f629aba5b4ebf27f803a7a9284e">xaxidma_bd.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_LookupConfig()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga0cbcf5259635ea3c336fe5413c98f75c">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_Pause()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_Reset()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_ResetIsDone()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_Resume()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_SelectCyclicMode()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga2d93bfcf1c3e34cb9fc4a22da6148dc5">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_SelectKeyHole()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga5becc8b0f9945af34e372ced2b37aebb">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_Selftest()
|
||||
: <a class="el" href="group__axidma__v9__0.html#gad4ea3039216916336ae1c7598ff26afc">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_SimpleTransfer()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">xaxidma.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_StartBdRingHw()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
<li>XAxiDma_UpdateBdRingCDesc()
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">xaxidma_bdring.c</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
65
XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_type.html
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|
|
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|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
||||
<meta name="generator" content="Doxygen 1.8.10"/>
|
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<title>axidma: APIs</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
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<script type="text/javascript" src="dynsections.js"></script>
|
||||
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li class="current"><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Macros</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
 <ul>
|
||||
<li>XAxiDma
|
||||
: <a class="el" href="group__axidma__v9__0.html#gac08fe7cb6508a133a7ef036bba7df5b5">xaxidma.h</a>
|
||||
</li>
|
||||
<li>XAxiDma_Bd
|
||||
: <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">xaxidma_bd.h</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
5350
XilinxProcessorIPLib/drivers/axidma/doc/html/api/group__axidma__v9__0.html
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5350
XilinxProcessorIPLib/drivers/axidma/doc/html/api/group__axidma__v9__0.html
Executable file
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261
XilinxProcessorIPLib/drivers/axidma/doc/html/api/index.html
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261
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|
|
@ -0,0 +1,261 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
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<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
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<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
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<meta name="generator" content="Doxygen 1.8.10"/>
|
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<title>axidma: Main Page</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
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<script type="text/javascript" src="dynsections.js"></script>
|
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<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axidma
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li class="current"><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="header">
|
||||
<div class="headertitle">
|
||||
<div class="title">axidma Documentation</div> </div>
|
||||
</div><!--header-->
|
||||
<div class="contents">
|
||||
<div class="textblock"><p>This is the driver API for the AXI DMA engine.For a full description of DMA features, please see the hardware spec. This driver supports the following features:</p>
|
||||
<ul>
|
||||
<li>Scatter-Gather DMA (SGDMA)</li>
|
||||
<li>Simple DMA</li>
|
||||
<li>Interrupts</li>
|
||||
<li>Programmable interrupt coalescing for SGDMA</li>
|
||||
<li>APIs to manage Buffer Descriptors (BD) movement to and from the SGDMA engine</li>
|
||||
</ul>
|
||||
<p><b>Simple DMA</b></p>
|
||||
<p>Simple DMA allows the application to define a single transaction between DMA and Device. It has two channels: one from the DMA to Device and the other from Device to DMA. Application has to set the buffer address and length fields to initiate the transfer in respective channel.</p>
|
||||
<p><b>Transactions</b></p>
|
||||
<p>The object used to describe a transaction is referred to as a Buffer Descriptor (BD). Buffer descriptors are allocated in the user application. The user application needs to set buffer address, transfer length, and control information for this transfer. The control information includes SOF and EOF. Definition of those masks are in <a class="el" href="xaxidma__hw_8h.html">xaxidma_hw.h</a></p>
|
||||
<p><b>Scatter-Gather DMA</b></p>
|
||||
<p>SGDMA allows the application to define a list of transactions in memory which the hardware will process without further application intervention. During this time, the application is free to continue adding more work to keep the Hardware busy.</p>
|
||||
<p>User can check for the completion of transactions through polling the hardware, or interrupts.</p>
|
||||
<p>SGDMA processes whole packets. A packet is defined as a series of data bytes that represent a message. SGDMA allows a packet of data to be broken up into one or more transactions. For example, take an Ethernet IP packet which consists of a 14 byte header followed by a 1 or more bytes of payload. With SGDMA, the application may point a BD to the header and another BD to the payload, then transfer them as a single message. This strategy can make a TCP/IP stack more efficient by allowing it to keep packet header and data in different memory regions instead of assembling packets into contiguous blocks of memory.</p>
|
||||
<p><b>BD Ring Management</b></p>
|
||||
<p>BD rings are shared by the software and the hardware.</p>
|
||||
<p>The hardware expects BDs to be setup as a linked list. The DMA hardware walks through the list by following the next pointer field of a completed BD. The hardware stops processing when the just completed BD is the same as the BD specified in the Tail Ptr register in the hardware.</p>
|
||||
<p>The last BD in the ring is linked to the first BD in the ring.</p>
|
||||
<p>All BD management are done inside the driver. The user application should not directly modify the BD fields. Modifications to the BD fields should always go through the specific API functions.</p>
|
||||
<p>Within the ring, the driver maintains four groups of BDs. Each group consists of 0 or more adjacent BDs:</p>
|
||||
<ul>
|
||||
<li>Free: The BDs that can be allocated by the application with <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f" title="Reserve locations in the BD ring. ">XAxiDma_BdRingAlloc()</a>.</li>
|
||||
<li>Pre-process: The BDs that have been allocated with <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f" title="Reserve locations in the BD ring. ">XAxiDma_BdRingAlloc()</a>. These BDs are under application control. The application modifies these BDs through driver API to prepare them for DMA transactions.</li>
|
||||
<li>Hardware: The BDs that have been enqueued to hardware with <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b" title="Enqueue a set of BDs to hardware that were previously allocated by XAxiDma_BdRingAlloc(). ">XAxiDma_BdRingToHw()</a>. These BDs are under hardware control and may be in a state of awaiting hardware processing, in process, or processed by hardware. It is considered an error for the application to change BDs while they are in this group. Doing so can cause data corruption and lead to system instability.</li>
|
||||
<li>Post-process: The BDs that have been processed by hardware and have been extracted from the Hardware group with <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c" title="Returns a set of BD(s) that have been processed by hardware. ">XAxiDma_BdRingFromHw()</a>. These BDs are under application control. The application can check the transfer status of these BDs. The application use <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7" title="Frees a set of BDs that had been previously retrieved with XAxiDma_BdRingFromHw(). ">XAxiDma_BdRingFree()</a> to put them into the Free group.</li>
|
||||
</ul>
|
||||
<p>BDs are expected to transition in the following way for continuous DMA transfers: </p><pre></pre><pre> <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f" title="Reserve locations in the BD ring. ">XAxiDma_BdRingAlloc()</a> <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b" title="Enqueue a set of BDs to hardware that were previously allocated by XAxiDma_BdRingAlloc(). ">XAxiDma_BdRingToHw()</a>
|
||||
Free ------------------------> Pre-process ----------------------> Hardware
|
||||
|
|
||||
/|\ |
|
||||
| <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7" title="Frees a set of BDs that had been previously retrieved with XAxiDma_BdRingFromHw(). ">XAxiDma_BdRingFree()</a> <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c" title="Returns a set of BD(s) that have been processed by hardware. ">XAxiDma_BdRingFromHw()</a> |
|
||||
+--------------------------- Post-process <----------------------+</pre><pre></pre><p>When a DMA transfer is to be cancelled before enqueuing to hardware, application can return the requested BDs to the Free group using <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce" title="Fully or partially undo an XAxiDma_BdRingAlloc() operation. ">XAxiDma_BdRingUnAlloc()</a>, as shown below: </p><pre></pre><pre> <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce" title="Fully or partially undo an XAxiDma_BdRingAlloc() operation. ">XAxiDma_BdRingUnAlloc()</a>
|
||||
Free <----------------------- Pre-process</pre><pre></pre><p>The API provides functions for BD list traversal:</p><ul>
|
||||
<li><a class="el" href="group__axidma__v9__0.html#ga4b7e75d1acf86428bd79fcd0d1c13745" title="Return the next BD in the ring. ">XAxiDma_BdRingNext()</a></li>
|
||||
<li><a class="el" href="group__axidma__v9__0.html#ga86c6d4b9c4f8766634d46a3078eadc8a" title="Return the previous BD in the ring. ">XAxiDma_BdRingPrev()</a></li>
|
||||
</ul>
|
||||
<p>These functions should be used with care as they do not understand where one group ends and another begins.</p>
|
||||
<p><b>SGDMA Descriptor Ring Creation</b></p>
|
||||
<p>BD ring is created using <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b" title="Using a memory segment allocated by the caller, This fundtion creates and setup the BD ring...">XAxiDma_BdRingCreate()</a>. The memory for the BD ring is allocated by the application, and it has to be contiguous. Physical address is required to setup the BD ring.</p>
|
||||
<p>The applicaiton can use <a class="el" href="group__axidma__v9__0.html#ga6899085c400b8f453381b305ac5521d9" title="Use this macro at initialization time to determine how many bytes of memory are required to contain a...">XAxiDma_BdRingMemCalc()</a> to find out the amount of memory needed for a certain number of BDs. <a class="el" href="group__axidma__v9__0.html#ga98555b607a9ec831dc6473e77515bb4b" title="Use this macro at initialization time to determine how many BDs will fit within the given memory cons...">XAxiDma_BdRingCntCalc()</a> can be used to find out how many BDs can be allocated for certain amount of memory.</p>
|
||||
<p>A helper function, <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b" title="Clone the given BD into every BD in the ring. ">XAxiDma_BdRingClone()</a>, can speed up the BD ring setup if the BDs have same types of controls, for example, SOF and EOF. After using the <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b" title="Clone the given BD into every BD in the ring. ">XAxiDma_BdRingClone()</a>, the application only needs to setup the buffer address and transfer length. Note that certain BDs in one packet, for example, the first BD and the last BD, may need to setup special control information.</p>
|
||||
<p><b>Descriptor Ring State Machine</b></p>
|
||||
<p>There are two states of the BD ring:</p>
|
||||
<ul>
|
||||
<li>HALTED (H), where hardware is not running</li>
|
||||
<li>NOT HALTED (NH), where hardware is running</li>
|
||||
</ul>
|
||||
<p>The following diagram shows the state transition for the DMA engine:</p>
|
||||
<pre>
|
||||
_____ <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f" title="Start a DMA channel and Allow DMA transactions to commence on a given channel if descriptors are read...">XAxiDma_StartBdRingHw()</a>, or <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3" title="Start a DMA channel, updates current descriptors and Allow DMA transactions to commence on a given ch...">XAxiDma_BdRingStart()</a>, ______
|
||||
| | or <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574" title="Resume DMA transactions on both channels. ">XAxiDma_Resume()</a> | |
|
||||
| H |----------------------------------------------------->| NH |
|
||||
| |<-----------------------------------------------------| |
|
||||
----- <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c" title="Pause DMA transactions on both channels. ">XAxiDma_Pause()</a> or <a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f" title="Reset both TX and RX channels of a DMA engine. ">XAxiDma_Reset()</a> ------
|
||||
</pre><p><b>Interrupt Coalescing</b></p>
|
||||
<p>SGDMA provides control over the frequency of interrupts through interrupt coalescing. The DMA engine provides two ways to tune the interrupt coalescing:</p>
|
||||
<ul>
|
||||
<li>The packet threshold counter. Interrupt will fire once the programmable number of packets have been processed by the engine.</li>
|
||||
<li>The packet delay timer counter. Interrupt will fire once the programmable amount of time has passed after processing the last packet, and no new packets to process. Note that the interrupt will only fire if at least one packet has been processed.</li>
|
||||
</ul>
|
||||
<p><b> Interrupt </b></p>
|
||||
<p>Interrupts are handled by the user application. Each DMA channel has its own interrupt ID. The driver provides APIs to enable/disable interrupt, and tune the interrupt frequency regarding to packet processing frequency.</p>
|
||||
<p><b> Software Initialization </b></p>
|
||||
<p>To use the Simple mode DMA engine for transfers, the following setup is required:</p>
|
||||
<ul>
|
||||
<li>DMA Initialization using <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77" title="This function initializes a DMA engine. ">XAxiDma_CfgInitialize()</a> function. This step initializes a driver instance for the given DMA engine and resets the engine.</li>
|
||||
<li>Enable interrupts if chosen to use interrupt mode. The application is responsible for setting up the interrupt system, which includes providing and connecting interrupt handlers and call back functions, before enabling the interrupts.</li>
|
||||
<li>Set the buffer address and length field in respective channels to start the DMA transfer</li>
|
||||
</ul>
|
||||
<p>To use the SG mode DMA engine for transfers, the following setup are required:</p>
|
||||
<ul>
|
||||
<li>DMA Initialization using <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77" title="This function initializes a DMA engine. ">XAxiDma_CfgInitialize()</a> function. This step initializes a driver instance for the given DMA engine and resets the engine.</li>
|
||||
<li>BD Ring creation. A BD ring is needed per DMA channel and can be built by calling <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b" title="Using a memory segment allocated by the caller, This fundtion creates and setup the BD ring...">XAxiDma_BdRingCreate()</a>.</li>
|
||||
<li>Enable interrupts if chose to use interrupt mode. The application is responsible for setting up the interrupt system, which includes providing and connecting interrupt handlers and call back functions, before enabling the interrupts.</li>
|
||||
<li>Start a DMA transfer: Call <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3" title="Start a DMA channel, updates current descriptors and Allow DMA transactions to commence on a given ch...">XAxiDma_BdRingStart()</a> to start a transfer for the first time or after a reset, and <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b" title="Enqueue a set of BDs to hardware that were previously allocated by XAxiDma_BdRingAlloc(). ">XAxiDma_BdRingToHw()</a> if the channel is already started. Calling <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b" title="Enqueue a set of BDs to hardware that were previously allocated by XAxiDma_BdRingAlloc(). ">XAxiDma_BdRingToHw()</a> when a DMA channel is not running will not put the BDs to the hardware, and the BDs will be processed later when the DMA channel is started through <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3" title="Start a DMA channel, updates current descriptors and Allow DMA transactions to commence on a given ch...">XAxiDma_BdRingStart()</a>.</li>
|
||||
</ul>
|
||||
<p><b> How to start DMA transactions </b></p>
|
||||
<p>The user application uses <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b" title="Enqueue a set of BDs to hardware that were previously allocated by XAxiDma_BdRingAlloc(). ">XAxiDma_BdRingToHw()</a> to submit BDs to the hardware to start DMA transfers.</p>
|
||||
<p>For both channels, if the DMA engine is currently stopped (using <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c" title="Pause DMA transactions on both channels. ">XAxiDma_Pause()</a>), the newly added BDs will be accepted but not processed until the DMA engine is started, using <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3" title="Start a DMA channel, updates current descriptors and Allow DMA transactions to commence on a given ch...">XAxiDma_BdRingStart()</a>, or resumed, using <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574" title="Resume DMA transactions on both channels. ">XAxiDma_Resume()</a>.</p>
|
||||
<p><b> Software Post-Processing on completed DMA transactions </b></p>
|
||||
<p>If the interrupt system has been set up and the interrupts are enabled, a DMA channels notifies the software about the completion of a transfer through interrupts. Otherwise, the user application can poll for completions of the BDs, using <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c" title="Returns a set of BD(s) that have been processed by hardware. ">XAxiDma_BdRingFromHw()</a> or <a class="el" href="group__axidma__v9__0.html#ga20937b96fad07f286948f1af50590421" title="Check whether a BD has completed in hardware. ">XAxiDma_BdHwCompleted()</a>.</p>
|
||||
<ul>
|
||||
<li>Once BDs are finished by a channel, the application first needs to fetch them from the channel using <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c" title="Returns a set of BD(s) that have been processed by hardware. ">XAxiDma_BdRingFromHw()</a>.</li>
|
||||
<li>On the TX side, the application now could free the data buffers attached to those BDs as the data in the buffers has been transmitted.</li>
|
||||
<li>On the RX side, the application now could use the received data in the buffers attached to those BDs.</li>
|
||||
<li>For both channels, completed BDs need to be put back to the Free group using <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7" title="Frees a set of BDs that had been previously retrieved with XAxiDma_BdRingFromHw(). ">XAxiDma_BdRingFree()</a>, so they can be used for future transactions.</li>
|
||||
<li>On the RX side, it is the application's responsibility to have BDs ready to receive data at any time. Otherwise, the RX channel refuses to accept any data if it has no RX BDs.</li>
|
||||
</ul>
|
||||
<p><b> Examples </b></p>
|
||||
<p>We provide five examples to show how to use the driver API:</p><ul>
|
||||
<li>One for SG interrupt mode (xaxidma_example_sg_intr.c), multiple BD/packets transfer</li>
|
||||
<li>One for SG polling mode (xaxidma_example_sg_poll.c), single BD transfer.</li>
|
||||
<li>One for SG polling mode (xaxidma_poll_multi_pkts.c), multiple BD/packets transfer</li>
|
||||
<li>One for simple polling mode (xaxidma_example_simple_poll.c)</li>
|
||||
<li>One for simple Interrupt mode (xaxidma_example_simple_intr.c)</li>
|
||||
</ul>
|
||||
<p><b> Address Translation </b></p>
|
||||
<p>All buffer addresses and BD addresses for the hardware are physical addresses. The user application is responsible to provide physical buffer address for the BD upon BD ring creation. The user application accesses BD through its virtual addess. The driver maintains the address translation between the physical and virtual address for BDs.</p>
|
||||
<p><b> Cache Coherency </b></p>
|
||||
<p>This driver expects all application buffers attached to BDs to be in cache coherent memory. If cache is used in the system, buffers for transmit MUST be flushed from the cache before passing the associated BD to this driver. Buffers for receive MUST be invalidated before accessing the data.</p>
|
||||
<p><b> Alignment </b></p>
|
||||
<p>For BDs:</p>
|
||||
<p>Minimum alignment is defined by the constant XAXIDMA_BD_MINIMUM_ALIGNMENT. This is the smallest alignment allowed by both hardware and software for them to properly work.</p>
|
||||
<p>If the descriptor ring is to be placed in cached memory, alignment also MUST be at least the processor's cache-line size. Otherwise, system instability occurs. For alignment larger than the cache line size, multiple cache line size alignment is required.</p>
|
||||
<p>Aside from the initial creation of the descriptor ring (see <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b" title="Using a memory segment allocated by the caller, This fundtion creates and setup the BD ring...">XAxiDma_BdRingCreate()</a>), there are no other run-time checks for proper alignment of BDs.</p>
|
||||
<p>For application data buffers:</p>
|
||||
<p>Application data buffers may reside on any alignment if DRE is built into the hardware. Otherwise, application data buffer must be word-aligned. The word is defined by XPAR_AXIDMA_0_M_AXIS_MM2S_TDATA_WIDTH for transmit and XPAR_AXIDMA_0_S_AXIS_S2MM_TDATA_WIDTH for receive.</p>
|
||||
<p>For scatter gather transfers that have more than one BDs in the chain of BDs, Each BD transfer length must be multiple of word too. Otherwise, internal error happens in the hardware.</p>
|
||||
<p><b> Error Handling </b></p>
|
||||
<p>The DMA engine will halt on all error conditions. It requires the software to do a reset before it can start process new transfer requests.</p>
|
||||
<p><b> Restart After Stopping </b></p>
|
||||
<p>After the DMA engine has been stopped (through reset or reset after an error) the software keeps track of the current BD pointer when reset happens, and processing of BDs can be resumed through <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3" title="Start a DMA channel, updates current descriptors and Allow DMA transactions to commence on a given ch...">XAxiDma_BdRingStart()</a>.</p>
|
||||
<p><b> Limitations </b></p>
|
||||
<p>This driver does not have any mechanisms for mutual exclusion. It is up to the application to provide this protection.</p>
|
||||
<p><b> Hardware Defaults & Exclusive Use </b></p>
|
||||
<p>After the initialization or reset, the DMA engine is in the following default mode:</p><ul>
|
||||
<li>All interrupts are disabled.</li>
|
||||
<li>Interrupt coalescing counter is 1.</li>
|
||||
<li>The DMA engine is not running (halted). Each DMA channel is started separately, using <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f" title="Start a DMA channel and Allow DMA transactions to commence on a given channel if descriptors are read...">XAxiDma_StartBdRingHw()</a> if no BDs are setup for transfer yet, or <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3" title="Start a DMA channel, updates current descriptors and Allow DMA transactions to commence on a given ch...">XAxiDma_BdRingStart()</a> otherwise.</li>
|
||||
</ul>
|
||||
<p>The driver has exclusive use of the registers and BDs. All accesses to the registers and BDs should go through the driver interface.</p>
|
||||
<p><b> Debug Print </b></p>
|
||||
<p>To see the debug print for the driver, please put "-DDEBUG" as the extra compiler flags in software platform settings. Also comment out the line in xdebug.h: "#undef DEBUG".</p>
|
||||
<p><b>Changes From v1.00a</b></p>
|
||||
<p>. We have changes return type for <a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22" title="Set the BD's buffer address. ">XAxiDma_BdSetBufAddr()</a> from void to int . We added <a class="el" href="group__axidma__v9__0.html#ga0cbcf5259635ea3c336fe5413c98f75c" title="Look up the hardware configuration for a device instance. ">XAxiDma_LookupConfig()</a> so that user does not need to look for the hardware settings anymore.</p>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><pre>Ver Who Date Changes
|
||||
----- ---- -------- -------------------------------------------------------
|
||||
1.00a jz 05/18/10 First release
|
||||
2.00a jz 08/10/10 Second release, added in <a class="el" href="xaxidma__g_8c.html">xaxidma_g.c</a>, <a class="el" href="xaxidma__sinit_8c.html">xaxidma_sinit.c</a>,
|
||||
updated tcl file, added <a class="el" href="xaxidma__porting__guide_8h.html">xaxidma_porting_guide.h</a>
|
||||
3.00a jz 11/22/10 Support IP core parameters change
|
||||
4.00a rkv 02/22/11 Added support for simple DMA mode
|
||||
New API added for simple DMA mode are</p><ul>
|
||||
<li>XAxiDma_Busy</li>
|
||||
<li>XAxiDma_SimpleTransfer
|
||||
New Macros added for simple DMA mode are<ul>
|
||||
<li>XAxiDma_HasSg</li>
|
||||
<li>XAxiDma_IntrEnable</li>
|
||||
<li>XAxiDma_IntrGetEnabled</li>
|
||||
<li>XAxiDma_IntrDisable</li>
|
||||
<li>XAxiDma_IntrGetIrq</li>
|
||||
<li>XAxiDma_IntrAckIrq
|
||||
5.00a srt 08/25/11 Added support for memory barrier and modified
|
||||
Cache Macros to have a common API for Microblaze
|
||||
and Zynq.
|
||||
6.00a srt 01/24/12 Added support for Multi-Channel DMA mode.</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</pre><pre>Changed APIs:
|
||||
* <a class="el" href="group__axidma__v9__0.html#ga6373ac3baa5365607f6727f4e2ece7a5" title="Get Receive (Rx) Ring ptr. ">XAxiDma_GetRxRing(InstancePtr, RingIndex)</a>
|
||||
* XAxiDma_Start(XAxiDma * InstancePtr, int RingIndex)
|
||||
* XAxiDma_Started(XAxiDma * InstancePtr, int RingIndex)
|
||||
* XAxiDma_Pause(XAxiDma * InstancePtr, int RingIndex)
|
||||
* XAxiDma_Resume(XAxiDma * InstancePtr, int RingIndex)
|
||||
* XAxiDma_SimpleTransfer(<a class="el" href="struct_x_axi_dma.html" title="The XAxiDma driver instance data. ">XAxiDma</a> *InstancePtr,
|
||||
u32 BuffAddr, u32 Length,
|
||||
int Direction, int RingIndex)
|
||||
* XAxiDma_StartBdRingHw(<a class="el" href="struct_x_axi_dma___bd_ring.html" title="Container structure for descriptor storage control. ">XAxiDma_BdRing</a> * RingPtr,
|
||||
int RingIndex)
|
||||
* XAxiDma_BdRingStart(<a class="el" href="struct_x_axi_dma___bd_ring.html" title="Container structure for descriptor storage control. ">XAxiDma_BdRing</a> * RingPtr,
|
||||
int RingIndex)
|
||||
* XAxiDma_BdRingToHw(<a class="el" href="struct_x_axi_dma___bd_ring.html" title="Container structure for descriptor storage control. ">XAxiDma_BdRing</a> * RingPtr,
|
||||
int NumBd, XAxiDma_Bd * BdSetPtr, int RingIndex)
|
||||
* XAxiDma_BdRingDumpRegs(<a class="el" href="struct_x_axi_dma___bd_ring.html" title="Container structure for descriptor storage control. ">XAxiDma_BdRing</a> * RingPtr,
|
||||
int RingIndex)
|
||||
* XAxiDma_BdRingSnapShotCurrBd(<a class="el" href="struct_x_axi_dma___bd_ring.html" title="Container structure for descriptor storage control. ">XAxiDma_BdRing</a> * RingPtr,
|
||||
int RingIndex)
|
||||
* XAxiDma_BdSetLength(XAxiDma_Bd *BdPtr,
|
||||
u32 LenBytes, u32 LengthMask)
|
||||
* <a class="el" href="group__axidma__v9__0.html#ga135667574b201437cfbdbecd8b348ee0" title="Get the actual transfer length of a BD. ">XAxiDma_BdGetActualLength(BdPtr, LengthMask)</a>
|
||||
* <a class="el" href="group__axidma__v9__0.html#ga9875ecb45b47664b70d74e8810fd5cf0" title="Retrieve the length field value from the given BD. ">XAxiDma_BdGetLength(BdPtr, LengthMask)</a></p><ul>
|
||||
<li>New APIs
|
||||
* XAxiDma_SelectKeyHole(<a class="el" href="struct_x_axi_dma.html" title="The XAxiDma driver instance data. ">XAxiDma</a> *InstancePtr,
|
||||
int Direction, int Select)
|
||||
* XAxiDma_UpdateBdRingCDesc(<a class="el" href="struct_x_axi_dma___bd_ring.html" title="Container structure for descriptor storage control. ">XAxiDma_BdRing</a> * RingPtr,
|
||||
int RingIndex)
|
||||
7.00a srt 06/18/12 All the APIs changed in v6_00_a are reverted back for
|
||||
backward compatibility.<ul>
|
||||
<li>New API:
|
||||
<a class="el" href="group__axidma__v9__0.html#gaf03e87b58cf2f9800e6260fda3745631" title="Get Receive (Rx) Ring ptr of a Index. ">XAxiDma_GetRxIndexRing(InstancePtr, RingIndex)</a>
|
||||
7.01a srt 10/26/12 - Fixed issue with driver as it fails with IP version
|
||||
< 6.00a as the parameter C_NUM_*_CHANNELS is not
|
||||
applicable.</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Changed the logic of MCDMA BD fields Set APIs, to
|
||||
clear the field first and then set it.
|
||||
7.02a srt 01/23/13 Replaced *_TDATA_WIDTH parameters to *_DATA_WIDTH
|
||||
(CR 691867)
|
||||
Updated DDR base address for IPI designs (CR 703656).
|
||||
8.0 adk 19/12/13 Updated as per the New Tcl API's
|
||||
srt 01/29/14 Added support for Micro DMA Mode and cyclic mode of
|
||||
operations.</li>
|
||||
</ul>
|
||||
</pre><pre>New APIs:
|
||||
* XAxiDma_SelectCyclicMode(<a class="el" href="struct_x_axi_dma.html" title="The XAxiDma driver instance data. ">XAxiDma</a> *InstancePtr,
|
||||
int Direction, int Select)
|
||||
* XAxiDma_BdSetBufAddrMicroMode(XAxiDma_Bd*, u32)
|
||||
8.1 adk 20/01/15 Added support for peripheral test. Created the self
|
||||
test example to include it on peripheral test's(CR#823144).
|
||||
8.1 adk 29/01/15 Added the sefltest api (XAxiDma_Selftest) to the driver source files
|
||||
(<a class="el" href="xaxidma__selftest_8c.html">xaxidma_selftest.c</a>) and called this from the selftest example
|
||||
9.0 adk 27/07/15 Added support for 64-bit Addressing.
|
||||
9.0 adk 19/08/15 Fixed CR#873125 DMA SG Mode example tests are failing on
|
||||
HW in 2015.3.</pre><pre></pre> </div></div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
68
XilinxProcessorIPLib/drivers/axidma/doc/html/api/jquery.js
vendored
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68
XilinxProcessorIPLib/drivers/axidma/doc/html/api/jquery.js
vendored
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58
XilinxProcessorIPLib/drivers/axidma/doc/html/api/modules.html
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58
XilinxProcessorIPLib/drivers/axidma/doc/html/api/modules.html
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|
|
@ -0,0 +1,58 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
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<div class="textblock">Here is a list of all modules:</div><div class="directory">
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<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><a class="el" href="group__axidma__v9__0.html" target="_self">Axidma_v9_0</a></td><td class="desc">This file implements DMA engine-wise initialization and control functions </td></tr>
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78
XilinxProcessorIPLib/drivers/axidma/doc/html/api/struct_x_axi_dma.html
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XilinxProcessorIPLib/drivers/axidma/doc/html/api/struct_x_axi_dma.html
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<div class="header">
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<div class="headertitle">
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<div class="title">XAxiDma Struct Reference<div class="ingroups"><a class="el" href="group__axidma__v9__0.html">Axidma_v9_0</a></div></div> </div>
|
||||
</div><!--header-->
|
||||
<div class="contents">
|
||||
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||||
<div class="textblock"><p>An instance must be allocated for each DMA engine in use. </p>
|
||||
</div><h2 class="groupheader">Field Documentation</h2>
|
||||
<a class="anchor" id="a663f5757eabe6b1b8813ed5fdb0d0edb"></a>
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<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma::AddrWidth</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Address Width. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>, and <a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">XAxiDma_SimpleTransfer()</a>.</p>
|
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|
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|
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</div><!-- contents -->
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</ul>
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</div>
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</body>
|
||||
</html>
|
||||
398
XilinxProcessorIPLib/drivers/axidma/doc/html/api/struct_x_axi_dma___bd_ring.html
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XilinxProcessorIPLib/drivers/axidma/doc/html/api/struct_x_axi_dma___bd_ring.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
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|
||||
</div>
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
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|
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|
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|
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</div>
|
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</div><!-- top -->
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<div class="header">
|
||||
<div class="headertitle">
|
||||
<div class="title">XAxiDma_BdRing Struct Reference<div class="ingroups"><a class="el" href="group__axidma__v9__0.html">Axidma_v9_0</a></div></div> </div>
|
||||
</div><!--header-->
|
||||
<div class="contents">
|
||||
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||||
<div class="textblock"><p>If address translation is enabled, then all addresses and pointers excluding FirstBdPhysAddr are expressed in terms of the virtual address. </p>
|
||||
</div><h2 class="groupheader">Field Documentation</h2>
|
||||
<a class="anchor" id="a3c928d2f36e8daf845a70afdae2573a4"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::AllCnt</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Total Number of BDs for channel. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a2519fd626856e7ab0d822adc46aab7d8"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>* XAxiDma_BdRing::BdaRestart</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>BD to load when channel is started. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a138fd282802e5f6ed3cb1d2505ede08a"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XAxiDma_BdRing::ChanBase</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>physical base address </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">XAxiDma_BdRingDumpRegs()</a>, <a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">XAxiDma_BdRingGetCoalesce()</a>, <a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">XAxiDma_BdRingSetCoalesce()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>, <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">XAxiDma_Pause()</a>, <a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">XAxiDma_ResetIsDone()</a>, <a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">XAxiDma_SimpleTransfer()</a>, <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw()</a>, and <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a6d41078607d5a8165e67d6483e40e9ab"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">UINTPTR XAxiDma_BdRing::FirstBdAddr</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Virtual address of 1st BD in list. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone()</a>, and <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="add2c7d765c8d95eeb9d0f94a54775528"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">UINTPTR XAxiDma_BdRing::FirstBdPhysAddr</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Physical address of 1st BD in list. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, and <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a51ec0929002582a900d404502e9a1622"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::FreeCnt</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Number of allocatable BDs in free group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">XAxiDma_BdRingAlloc()</a>, <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">XAxiDma_BdRingFree()</a>, and <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">XAxiDma_BdRingUnAlloc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a3e067ffdf2820a816f2d6dda6e3f9114"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>* XAxiDma_BdRing::FreeHead</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>First BD in the free group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">XAxiDma_BdRingAlloc()</a>, <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">XAxiDma_BdRingUnAlloc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a7d35cb00bb50fff2e24c15f7d7d8dae0"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::HasStsCntrlStrm</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Whether has stscntrl stream. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="ab49406dd2d9ec65e3f38d1cc3c880391"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::HwCnt</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Number of BDs in work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, and <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="af097be199cf9d1d62cf32f775309a4f3"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>* XAxiDma_BdRing::HwHead</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>First BD in the work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a7abe8351de43377407c579cd158f2448"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>* XAxiDma_BdRing::HwTail</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Last BD in the work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, and <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a912bf38e61c8b03995ece842426b3ccf"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::IsRxChannel</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Is this a receive channel. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>, <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw()</a>, and <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a3743d05f930d7c04abb0693f2ef0b271"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">UINTPTR XAxiDma_BdRing::LastBdAddr</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Virtual address of last BD in the list. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, and <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="af0b3fe5c9b9123209b3000e0d95193ed"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XAxiDma_BdRing::Length</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Total size of ring in bytes. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="afd4e1620895f91a829354e131432d2b3"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::PostCnt</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Number of BDs in post-work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">XAxiDma_BdRingFree()</a>, and <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a92668e60e10a940428e68f816c64eab6"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>* XAxiDma_BdRing::PostHead</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>First BD in the post-work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">XAxiDma_BdRingFree()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a68e8042d227f7a40821a478deb063215"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::PreCnt</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Number of BDs in pre-work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">XAxiDma_BdRingAlloc()</a>, <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, and <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">XAxiDma_BdRingUnAlloc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a8a2958fb6be370d3cc29972f57203952"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>* XAxiDma_BdRing::PreHead</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>First BD in the pre-work group. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, and <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="ac14f09fcd00f1869c8194d790f73d791"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XAxiDma_BdRing::RingIndex</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Ring Index. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">XAxiDma_BdRingDumpRegs()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>, <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw()</a>, and <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a443e5c48e677e9a1a4e85a383eefc2be"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">volatile int XAxiDma_BdRing::RunState</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Whether channel is running. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone()</a>, <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>, <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw()</a>, <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>, <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">XAxiDma_Pause()</a>, <a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">XAxiDma_Reset()</a>, <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">XAxiDma_Resume()</a>, <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw()</a>, and <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc()</a>.</p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="aafd8e01bf65c7950235d8f21cf225e12"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">UINTPTR XAxiDma_BdRing::Separation</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Number of bytes between the starting address of adjacent BDs. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck()</a>, <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone()</a>, and <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate()</a>.</p>
|
||||
|
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|
||||
</div>
|
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<div class="title">XAxiDma_Config Struct Reference<div class="ingroups"><a class="el" href="group__axidma__v9__0.html">Axidma_v9_0</a></div></div> </div>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>This structure passes the hardware building information to the driver </p>
|
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</div><h2 class="groupheader">Field Documentation</h2>
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<td class="memname">int XAxiDma_Config::AddrWidth</td>
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<p>Address Width. </p>
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<p>Referenced by <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize()</a>.</p>
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_77cbdaba61660bf3d37eac9737091131.html">axidma</a></li><li class="navelem"><a class="el" href="dir_d8b80b343a022500e2a21d50e293dc15.html">src</a></li> </ul>
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<a href="#func-members">Functions</a> </div>
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<div class="title">xaxidma.c File Reference</div> </div>
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Functions</h2></td></tr>
|
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<tr class="memitem:ga8026e76c90d891d21c9c355ff776cb77"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, <a class="el" href="struct_x_axi_dma___config.html">XAxiDma_Config</a> *Config)</td></tr>
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<tr class="separator:ga8026e76c90d891d21c9c355ff776cb77"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5b7d1248ef065915fd8c9e8d5e00640f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">XAxiDma_Reset</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
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<tr class="separator:ga5b7d1248ef065915fd8c9e8d5e00640f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf73e1329e40c8ac1ae47a7d9c104af75"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">XAxiDma_ResetIsDone</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
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<tr class="separator:gaf73e1329e40c8ac1ae47a7d9c104af75"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb572b623215a7df62b1e0468e3bd68c"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">XAxiDma_Pause</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
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<tr class="separator:gadb572b623215a7df62b1e0468e3bd68c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga847cd9a0255fcb444bce58b945de8574"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">XAxiDma_Resume</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
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<tr class="memitem:gaff68c0ba3e9e25dfe5e39153301862f8"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaff68c0ba3e9e25dfe5e39153301862f8">XAxiDma_Busy</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, int Direction)</td></tr>
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<tr class="memitem:ga5becc8b0f9945af34e372ced2b37aebb"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5becc8b0f9945af34e372ced2b37aebb">XAxiDma_SelectKeyHole</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, int Direction, int Select)</td></tr>
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|
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<tr class="memitem:ga32ca6099d7926297a4c17cdb4a19511b"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">XAxiDma_SimpleTransfer</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, UINTPTR BuffAddr, u32 Length, int Direction)</td></tr>
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|
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|
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_dma.html">XAxiDma</a></td></tr>
|
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|
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_dma___config.html">XAxiDma_Config</a></td></tr>
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|
||||
<tr class="memitem:ga9d91f29c6dc41f2106e097f1f9957a6e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga9d91f29c6dc41f2106e097f1f9957a6e">XAxiDma_GetTxRing</a>(InstancePtr)   (&((InstancePtr)->TxBdRing))</td></tr>
|
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|
||||
<tr class="memitem:ga6373ac3baa5365607f6727f4e2ece7a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga6373ac3baa5365607f6727f4e2ece7a5">XAxiDma_GetRxRing</a>(InstancePtr)   (&((InstancePtr)->RxBdRing[0]))</td></tr>
|
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<tr class="separator:ga6373ac3baa5365607f6727f4e2ece7a5"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaf03e87b58cf2f9800e6260fda3745631"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf03e87b58cf2f9800e6260fda3745631">XAxiDma_GetRxIndexRing</a>(InstancePtr, RingIndex)   (&((InstancePtr)->RxBdRing[RingIndex]))</td></tr>
|
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<tr class="separator:gaf03e87b58cf2f9800e6260fda3745631"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga18dd03026dd6c0ebd13526116c09ccae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga18dd03026dd6c0ebd13526116c09ccae">XAxiDma_HasSg</a>(InstancePtr)   ((InstancePtr)->HasSg) ? TRUE : FALSE</td></tr>
|
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|
||||
<tr class="memitem:gadac28afa26e2cb55bdada1ee3c016c52"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gadac28afa26e2cb55bdada1ee3c016c52">XAxiDma_IntrEnable</a>(InstancePtr, Mask, Direction)</td></tr>
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||||
<tr class="memitem:gadba63ad7c0a784d569736a8d1eb7c367"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gadba63ad7c0a784d569736a8d1eb7c367">XAxiDma_IntrGetEnabled</a>(InstancePtr, Direction)</td></tr>
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|
||||
<tr class="memitem:ga1936b497c0fa61d326807e5ed8dd572b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga1936b497c0fa61d326807e5ed8dd572b">XAxiDma_IntrDisable</a>(InstancePtr, Mask, Direction)</td></tr>
|
||||
<tr class="separator:ga1936b497c0fa61d326807e5ed8dd572b"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6a0eb17bcfcaf3331e01855d302f5f0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga6a0eb17bcfcaf3331e01855d302f5f0e">XAxiDma_IntrGetIrq</a>(InstancePtr, Direction)</td></tr>
|
||||
<tr class="separator:ga6a0eb17bcfcaf3331e01855d302f5f0e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga9ff0d2e5b50846e4b6a2d683283c10d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga9ff0d2e5b50846e4b6a2d683283c10d5">XAxiDma_IntrAckIrq</a>(InstancePtr, Mask, Direction)</td></tr>
|
||||
<tr class="separator:ga9ff0d2e5b50846e4b6a2d683283c10d5"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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||||
Typedefs</h2></td></tr>
|
||||
<tr class="memitem:gac08fe7cb6508a133a7ef036bba7df5b5"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="struct_x_axi_dma.html">XAxiDma</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac08fe7cb6508a133a7ef036bba7df5b5">XAxiDma</a></td></tr>
|
||||
<tr class="separator:gac08fe7cb6508a133a7ef036bba7df5b5"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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||||
Functions</h2></td></tr>
|
||||
<tr class="memitem:ga0cbcf5259635ea3c336fe5413c98f75c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_dma___config.html">XAxiDma_Config</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga0cbcf5259635ea3c336fe5413c98f75c">XAxiDma_LookupConfig</a> (u32 DeviceId)</td></tr>
|
||||
<tr class="separator:ga0cbcf5259635ea3c336fe5413c98f75c"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga8026e76c90d891d21c9c355ff776cb77"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">XAxiDma_CfgInitialize</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, <a class="el" href="struct_x_axi_dma___config.html">XAxiDma_Config</a> *Config)</td></tr>
|
||||
<tr class="separator:ga8026e76c90d891d21c9c355ff776cb77"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga5b7d1248ef065915fd8c9e8d5e00640f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">XAxiDma_Reset</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga5b7d1248ef065915fd8c9e8d5e00640f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaf73e1329e40c8ac1ae47a7d9c104af75"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">XAxiDma_ResetIsDone</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:gaf73e1329e40c8ac1ae47a7d9c104af75"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gadb572b623215a7df62b1e0468e3bd68c"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">XAxiDma_Pause</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:gadb572b623215a7df62b1e0468e3bd68c"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga847cd9a0255fcb444bce58b945de8574"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">XAxiDma_Resume</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga847cd9a0255fcb444bce58b945de8574"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaff68c0ba3e9e25dfe5e39153301862f8"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaff68c0ba3e9e25dfe5e39153301862f8">XAxiDma_Busy</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, int Direction)</td></tr>
|
||||
<tr class="separator:gaff68c0ba3e9e25dfe5e39153301862f8"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga32ca6099d7926297a4c17cdb4a19511b"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">XAxiDma_SimpleTransfer</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, UINTPTR BuffAddr, u32 Length, int Direction)</td></tr>
|
||||
<tr class="separator:ga32ca6099d7926297a4c17cdb4a19511b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga5becc8b0f9945af34e372ced2b37aebb"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5becc8b0f9945af34e372ced2b37aebb">XAxiDma_SelectKeyHole</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, int Direction, int Select)</td></tr>
|
||||
<tr class="separator:ga5becc8b0f9945af34e372ced2b37aebb"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2d93bfcf1c3e34cb9fc4a22da6148dc5"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga2d93bfcf1c3e34cb9fc4a22da6148dc5">XAxiDma_SelectCyclicMode</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr, int Direction, int Select)</td></tr>
|
||||
<tr class="separator:ga2d93bfcf1c3e34cb9fc4a22da6148dc5"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad4ea3039216916336ae1c7598ff26afc"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gad4ea3039216916336ae1c7598ff26afc">XAxiDma_Selftest</a> (<a class="el" href="struct_x_axi_dma.html">XAxiDma</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:gad4ea3039216916336ae1c7598ff26afc"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
</table>
|
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</div><!-- contents -->
|
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
77
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bd_8c.html
Executable file
77
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bd_8c.html
Executable file
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<html xmlns="http://www.w3.org/1999/xhtml">
|
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|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
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|
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|
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<div id="projectname">axidma
|
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</div>
|
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
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</td>
|
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</tr>
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|
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</table>
|
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<!-- end header part -->
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_77cbdaba61660bf3d37eac9737091131.html">axidma</a></li><li class="navelem"><a class="el" href="dir_d8b80b343a022500e2a21d50e293dc15.html">src</a></li> </ul>
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<div class="title">xaxidma_bd.c File Reference</div> </div>
|
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|
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<table class="memberdecls">
|
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
|
||||
<tr class="memitem:ga4056035d8e7c90a68fa954c60d021e07"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga4056035d8e7c90a68fa954c60d021e07">XAxiDma_BdSetLength</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, u32 LenBytes, u32 LengthMask)</td></tr>
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<tr class="separator:ga4056035d8e7c90a68fa954c60d021e07"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:gac1a9cb01ba6cd686ee08245f5e08cb22"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22">XAxiDma_BdSetBufAddr</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
|
||||
<tr class="separator:gac1a9cb01ba6cd686ee08245f5e08cb22"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga8947514b5acfea6298d0f969f3d2b97e"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga8947514b5acfea6298d0f969f3d2b97e">XAxiDma_BdSetBufAddrMicroMode</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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<tr class="separator:ga8947514b5acfea6298d0f969f3d2b97e"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gafc6434a23594c20c2b601f010a979e48"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gafc6434a23594c20c2b601f010a979e48">XAxiDma_BdSetAppWord</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, int Offset, u32 Word)</td></tr>
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<tr class="separator:gafc6434a23594c20c2b601f010a979e48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d2814e4249884e68fe9e6f370920ca4"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga9d2814e4249884e68fe9e6f370920ca4">XAxiDma_BdGetAppWord</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, int Offset, int *Valid)</td></tr>
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<tr class="separator:ga9d2814e4249884e68fe9e6f370920ca4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4eb2615ac89054e982c3f3c37f0ddb52"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga4eb2615ac89054e982c3f3c37f0ddb52">XAxiDma_BdSetCtrl</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, u32 Data)</td></tr>
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<tr class="separator:ga4eb2615ac89054e982c3f3c37f0ddb52"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga53983f629aba5b4ebf27f803a7a9284e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga53983f629aba5b4ebf27f803a7a9284e">XAxiDma_DumpBd</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga53983f629aba5b4ebf27f803a7a9284e"><td class="memSeparator" colspan="2"> </td></tr>
|
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</table>
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</div><!-- contents -->
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<ul>
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</ul>
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</body>
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</html>
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131
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bd_8h.html
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131
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bd_8h.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<div class="title">xaxidma_bd.h File Reference</div> </div>
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<tr class="memitem:gaa738ffd392c7ae1e844fab340ba50fee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">XAxiDma_BdRead</a>(BaseAddress, Offset)   (*(u32 *)((UINTPTR)((void *)(BaseAddress)) + (u32)(Offset)))</td></tr>
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<tr class="separator:gaa738ffd392c7ae1e844fab340ba50fee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab3b7d771208c01701b35bce165332a9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gab3b7d771208c01701b35bce165332a9f">XAxiDma_BdWrite</a>(BaseAddress, Offset, Data)   (*(u32 *)((UINTPTR)(void *)(BaseAddress) + (u32)(Offset))) = (u32)(Data)</td></tr>
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<tr class="separator:gab3b7d771208c01701b35bce165332a9f"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6c47900232c9a5a5ba30a2c1a3343628"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga6c47900232c9a5a5ba30a2c1a3343628">XAxiDma_BdClear</a>(BdPtr) </td></tr>
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||||
<tr class="separator:ga6c47900232c9a5a5ba30a2c1a3343628"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga495e780d704ecf548d3536b3bb8961a5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga495e780d704ecf548d3536b3bb8961a5">XAxiDma_BdGetCtrl</a>(BdPtr)</td></tr>
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<tr class="separator:ga495e780d704ecf548d3536b3bb8961a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2448f2b2ac172da0d19adeae3cc4c48"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf2448f2b2ac172da0d19adeae3cc4c48">XAxiDma_BdGetSts</a>(BdPtr) </td></tr>
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||||
<tr class="separator:gaf2448f2b2ac172da0d19adeae3cc4c48"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga9875ecb45b47664b70d74e8810fd5cf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga9875ecb45b47664b70d74e8810fd5cf0">XAxiDma_BdGetLength</a>(BdPtr, LengthMask) </td></tr>
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<tr class="separator:ga9875ecb45b47664b70d74e8810fd5cf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53eeff085fd39a91b855939f13fe76f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga53eeff085fd39a91b855939f13fe76f3">XAxiDma_BdSetId</a>(BdPtr, Id)    (<a class="el" href="group__axidma__v9__0.html#gab3b7d771208c01701b35bce165332a9f">XAxiDma_BdWrite</a>((BdPtr), <a class="el" href="group__axidma__v9__0.html#ga117e266cba3edbd1fd2f1e29305dcfc8">XAXIDMA_BD_ID_OFFSET</a>, (u32)(Id)))</td></tr>
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<tr class="separator:ga53eeff085fd39a91b855939f13fe76f3"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gaf3f333d78d115724bfcac84746d8cfa6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf3f333d78d115724bfcac84746d8cfa6">XAxiDma_BdGetId</a>(BdPtr)   (<a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">XAxiDma_BdRead</a>((BdPtr), <a class="el" href="group__axidma__v9__0.html#ga117e266cba3edbd1fd2f1e29305dcfc8">XAXIDMA_BD_ID_OFFSET</a>))</td></tr>
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<tr class="separator:gaf3f333d78d115724bfcac84746d8cfa6"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gaf858d9659197442c9e96856c206423c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf858d9659197442c9e96856c206423c6">XAxiDma_BdGetBufAddr</a>(BdPtr)    (<a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">XAxiDma_BdRead</a>((BdPtr), <a class="el" href="group__axidma__v9__0.html#ga8bb69f2401305faa1d89fb8dc31e770f">XAXIDMA_BD_BUFA_OFFSET</a>))</td></tr>
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<tr class="separator:gaf858d9659197442c9e96856c206423c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga20937b96fad07f286948f1af50590421"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga20937b96fad07f286948f1af50590421">XAxiDma_BdHwCompleted</a>(BdPtr) </td></tr>
|
||||
<tr class="separator:ga20937b96fad07f286948f1af50590421"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga135667574b201437cfbdbecd8b348ee0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga135667574b201437cfbdbecd8b348ee0">XAxiDma_BdGetActualLength</a>(BdPtr, LengthMask) </td></tr>
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||||
<tr class="separator:ga135667574b201437cfbdbecd8b348ee0"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gaa5bc321894b77ca6194c867018d9fe12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaa5bc321894b77ca6194c867018d9fe12">XAxiDma_BdSetTId</a>(BdPtr, TId)</td></tr>
|
||||
<tr class="separator:gaa5bc321894b77ca6194c867018d9fe12"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gac14fa76311fd7e5fb59b81fd9e251f62"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac14fa76311fd7e5fb59b81fd9e251f62">XAxiDma_BdGetTId</a>(BdPtr)</td></tr>
|
||||
<tr class="separator:gac14fa76311fd7e5fb59b81fd9e251f62"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga5f9b3088c4e16c7f5584610a43b17462"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5f9b3088c4e16c7f5584610a43b17462">XAxiDma_BdSetTDest</a>(BdPtr, TDest)</td></tr>
|
||||
<tr class="separator:ga5f9b3088c4e16c7f5584610a43b17462"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga8c1e3dd04821568424ffc77caf11a851"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga8c1e3dd04821568424ffc77caf11a851">XAxiDma_BdGetTDest</a>(BdPtr)</td></tr>
|
||||
<tr class="separator:ga8c1e3dd04821568424ffc77caf11a851"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gacf41c0ebe00870b6cdd34e46698e081b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gacf41c0ebe00870b6cdd34e46698e081b">XAxiDma_BdSetTUser</a>(BdPtr, TUser)</td></tr>
|
||||
<tr class="separator:gacf41c0ebe00870b6cdd34e46698e081b"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga7a2f9668058b7e4cdc89dffcce6086d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga7a2f9668058b7e4cdc89dffcce6086d3">XAxiDma_BdGetTUser</a>(BdPtr)</td></tr>
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||||
<tr class="separator:ga7a2f9668058b7e4cdc89dffcce6086d3"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gac7d8a383cd6d5aff6ee36c3a3db20cbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac7d8a383cd6d5aff6ee36c3a3db20cbf">XAxiDma_BdSetARCache</a>(BdPtr, ARCache)</td></tr>
|
||||
<tr class="separator:gac7d8a383cd6d5aff6ee36c3a3db20cbf"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gaa5f7ba67cbbb678662e4b5d36c63d16e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaa5f7ba67cbbb678662e4b5d36c63d16e">XAxiDma_BdGetARCache</a>(BdPtr)</td></tr>
|
||||
<tr class="separator:gaa5f7ba67cbbb678662e4b5d36c63d16e"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gae89253197f1aef6582d5cda3e49f8ead"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gae89253197f1aef6582d5cda3e49f8ead">XAxiDma_BdSetARUser</a>(BdPtr, ARUser)</td></tr>
|
||||
<tr class="separator:gae89253197f1aef6582d5cda3e49f8ead"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga72d1616af8d996f12db78473a75b54b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga72d1616af8d996f12db78473a75b54b6">XAxiDma_BdGetARUser</a>(BdPtr)</td></tr>
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||||
<tr class="separator:ga72d1616af8d996f12db78473a75b54b6"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga58961be41e3c0bc2694444bfe37b6c27"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga58961be41e3c0bc2694444bfe37b6c27">XAxiDma_BdSetStride</a>(BdPtr, Stride)</td></tr>
|
||||
<tr class="separator:ga58961be41e3c0bc2694444bfe37b6c27"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga29a75b8f1de16a347544e37b48d8129c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga29a75b8f1de16a347544e37b48d8129c">XAxiDma_BdGetStride</a>(BdPtr)</td></tr>
|
||||
<tr class="separator:ga29a75b8f1de16a347544e37b48d8129c"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga383b2c0667bf5bafa22922168895bd5e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga383b2c0667bf5bafa22922168895bd5e">XAxiDma_BdSetVSize</a>(BdPtr, VSize)</td></tr>
|
||||
<tr class="separator:ga383b2c0667bf5bafa22922168895bd5e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad9f48ceb5b30d66bab23337edc35d2fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gad9f48ceb5b30d66bab23337edc35d2fe">XAxiDma_BdGetVSize</a>(BdPtr)</td></tr>
|
||||
<tr class="separator:gad9f48ceb5b30d66bab23337edc35d2fe"><td class="memSeparator" colspan="2"> </td></tr>
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||||
</table><table class="memberdecls">
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||||
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
|
||||
Functions</h2></td></tr>
|
||||
<tr class="memitem:ga4056035d8e7c90a68fa954c60d021e07"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga4056035d8e7c90a68fa954c60d021e07">XAxiDma_BdSetLength</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, u32 LenBytes, u32 LengthMask)</td></tr>
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||||
<tr class="separator:ga4056035d8e7c90a68fa954c60d021e07"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gac1a9cb01ba6cd686ee08245f5e08cb22"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22">XAxiDma_BdSetBufAddr</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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||||
<tr class="separator:gac1a9cb01ba6cd686ee08245f5e08cb22"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga8947514b5acfea6298d0f969f3d2b97e"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga8947514b5acfea6298d0f969f3d2b97e">XAxiDma_BdSetBufAddrMicroMode</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, UINTPTR Addr)</td></tr>
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||||
<tr class="separator:ga8947514b5acfea6298d0f969f3d2b97e"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gafc6434a23594c20c2b601f010a979e48"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gafc6434a23594c20c2b601f010a979e48">XAxiDma_BdSetAppWord</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, int Offset, u32 Word)</td></tr>
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||||
<tr class="separator:gafc6434a23594c20c2b601f010a979e48"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga9d2814e4249884e68fe9e6f370920ca4"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga9d2814e4249884e68fe9e6f370920ca4">XAxiDma_BdGetAppWord</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, int Offset, int *Valid)</td></tr>
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||||
<tr class="separator:ga9d2814e4249884e68fe9e6f370920ca4"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga4eb2615ac89054e982c3f3c37f0ddb52"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga4eb2615ac89054e982c3f3c37f0ddb52">XAxiDma_BdSetCtrl</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr, u32 Data)</td></tr>
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<tr class="separator:ga4eb2615ac89054e982c3f3c37f0ddb52"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga53983f629aba5b4ebf27f803a7a9284e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga53983f629aba5b4ebf27f803a7a9284e">XAxiDma_DumpBd</a> (<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdPtr)</td></tr>
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<tr class="separator:ga53983f629aba5b4ebf27f803a7a9284e"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div><!-- contents -->
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<ul>
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</div>
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</body>
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</html>
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91
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bdring_8c.html
Executable file
91
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bdring_8c.html
Executable file
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<div id="projectname">axidma
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</div>
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_77cbdaba61660bf3d37eac9737091131.html">axidma</a></li><li class="navelem"><a class="el" href="dir_d8b80b343a022500e2a21d50e293dc15.html">src</a></li> </ul>
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<div class="title">xaxidma_bdring.c File Reference</div> </div>
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Functions</h2></td></tr>
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<tr class="memitem:ga39ee7d89e4453276d615849acad27fde"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
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<tr class="separator:ga39ee7d89e4453276d615849acad27fde"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5c6d6f492642dd355478c3a853556d6b"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, UINTPTR PhysAddr, UINTPTR VirtAddr, u32 Alignment, int BdCount)</td></tr>
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<tr class="separator:ga5c6d6f492642dd355478c3a853556d6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad044df5bd676a71226411ba7f78ef20b"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *SrcBdPtr)</td></tr>
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<tr class="separator:gad044df5bd676a71226411ba7f78ef20b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7b38bc9220c391823219937580bd816f"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
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<tr class="memitem:gaafd18a1df185c30b4745c147e3295ac3"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3">XAxiDma_BdRingStart</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
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<tr class="separator:gaafd18a1df185c30b4745c147e3295ac3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaebba5c661e04485582e887e74dbeb94"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">XAxiDma_BdRingSetCoalesce</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, u32 Counter, u32 Timer)</td></tr>
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<tr class="separator:gaaebba5c661e04485582e887e74dbeb94"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0d3794bbccf028da8e94407d061dfc68"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">XAxiDma_BdRingGetCoalesce</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, u32 *CounterPtr, u32 *TimerPtr)</td></tr>
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<tr class="separator:ga0d3794bbccf028da8e94407d061dfc68"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44003cd704b7d4868d1dc00bb433a91f"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">XAxiDma_BdRingAlloc</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> **BdSetPtr)</td></tr>
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<tr class="memitem:gac58b1ab7a89890142baf67211772d3ce"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">XAxiDma_BdRingUnAlloc</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdSetPtr)</td></tr>
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<tr class="separator:gac58b1ab7a89890142baf67211772d3ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac81111b373e373be7dd3989fffffe7b"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdSetPtr)</td></tr>
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<tr class="separator:gaac81111b373e373be7dd3989fffffe7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e5d328b4d4a247d1530fac3efe4c59c"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int BdLimit, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> **BdSetPtr)</td></tr>
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<tr class="separator:ga1e5d328b4d4a247d1530fac3efe4c59c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad2ac76e5a39486896cd484e51d2898c7"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">XAxiDma_BdRingFree</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdSetPtr)</td></tr>
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<tr class="separator:gad2ac76e5a39486896cd484e51d2898c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga64cf3c732bc803da742c256ab6372e0e"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
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<tr class="memitem:gaffa661a9a2467c1e274842c147531cea"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">XAxiDma_BdRingDumpRegs</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
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135
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__bdring_8h.html
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a></td></tr>
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Macros</h2></td></tr>
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<tr class="memitem:ga98555b607a9ec831dc6473e77515bb4b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga98555b607a9ec831dc6473e77515bb4b">XAxiDma_BdRingCntCalc</a>(Alignment, Bytes)    (uint32_t)((Bytes)/((sizeof(<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>)+((Alignment)-1))&~((Alignment)-1)))</td></tr>
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<tr class="memitem:ga6899085c400b8f453381b305ac5521d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga6899085c400b8f453381b305ac5521d9">XAxiDma_BdRingMemCalc</a>(Alignment, NumBd)   (int)((sizeof(<a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a>)+((Alignment)-1)) & ~((Alignment)-1))*(NumBd)</td></tr>
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<tr class="memitem:gac62389e25e6775026cf1be6c383e665b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac62389e25e6775026cf1be6c383e665b">XAxiDma_BdRingGetCnt</a>(RingPtr)   ((RingPtr)->AllCnt)</td></tr>
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<tr class="memitem:ga415cf0c379fef0104f9f52881ead13a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga415cf0c379fef0104f9f52881ead13a7">XAxiDma_BdRingGetFreeCnt</a>(RingPtr)   ((RingPtr)->FreeCnt)</td></tr>
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<tr class="memitem:ga0d79253861939c76e6d440ecde2b6edd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga0d79253861939c76e6d440ecde2b6edd">XAxiDma_BdRingSnapShotCurrBd</a>(RingPtr)</td></tr>
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<tr class="memitem:ga21aa8dbf6eabf9146097d9b3cc91c574"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga21aa8dbf6eabf9146097d9b3cc91c574">XAxiDma_BdRingGetCurrBd</a>(RingPtr) </td></tr>
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<tr class="memitem:ga4b7e75d1acf86428bd79fcd0d1c13745"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga4b7e75d1acf86428bd79fcd0d1c13745">XAxiDma_BdRingNext</a>(RingPtr, BdPtr)</td></tr>
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<tr class="separator:ga4b7e75d1acf86428bd79fcd0d1c13745"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86c6d4b9c4f8766634d46a3078eadc8a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga86c6d4b9c4f8766634d46a3078eadc8a">XAxiDma_BdRingPrev</a>(RingPtr, BdPtr)</td></tr>
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<tr class="separator:ga86c6d4b9c4f8766634d46a3078eadc8a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga740fa349c7811de2b7bae5cf83eb445e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga740fa349c7811de2b7bae5cf83eb445e">XAxiDma_BdRingGetSr</a>(RingPtr)   <a class="el" href="group__axidma__v9__0.html#ga99f615c527035db697545614fff86bf2">XAxiDma_ReadReg</a>((RingPtr)->ChanBase, <a class="el" href="group__axidma__v9__0.html#ga50d6957f8447d4eab9e444666730f692">XAXIDMA_SR_OFFSET</a>)</td></tr>
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<tr class="memitem:ga24cd47cdbfac0813e0d9caf966a1a3d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga24cd47cdbfac0813e0d9caf966a1a3d2">XAxiDma_BdRingGetError</a>(RingPtr)</td></tr>
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<tr class="separator:ga24cd47cdbfac0813e0d9caf966a1a3d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga766bed2454969636d827fb79faeeee97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga766bed2454969636d827fb79faeeee97">XAxiDma_BdRingHwIsStarted</a>(RingPtr)</td></tr>
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<tr class="memitem:gaf7c291190c92ce93d72f95c5b04ef1d4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaf7c291190c92ce93d72f95c5b04ef1d4">XAxiDma_BdRingBusy</a>(RingPtr)</td></tr>
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<tr class="memitem:ga2518030938ab80081f6896fc5589682c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga2518030938ab80081f6896fc5589682c">XAxiDma_BdRingIntEnable</a>(RingPtr, Mask)</td></tr>
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<tr class="memitem:gadbb17169213d8af8b50e6dee7f7b6d8b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gadbb17169213d8af8b50e6dee7f7b6d8b">XAxiDma_BdRingIntGetEnabled</a>(RingPtr)</td></tr>
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<tr class="separator:gadbb17169213d8af8b50e6dee7f7b6d8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0269e07693c731cf7721c6f19f8eb69b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga0269e07693c731cf7721c6f19f8eb69b">XAxiDma_BdRingIntDisable</a>(RingPtr, Mask)</td></tr>
|
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<tr class="separator:ga0269e07693c731cf7721c6f19f8eb69b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a9d2103e6d09fc3850b34a6386dc803"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga7a9d2103e6d09fc3850b34a6386dc803">XAxiDma_BdRingGetIrq</a>(RingPtr)</td></tr>
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<tr class="separator:ga7a9d2103e6d09fc3850b34a6386dc803"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga9e782e3715c1d2dd03e5d03434f47319"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga9e782e3715c1d2dd03e5d03434f47319">XAxiDma_BdRingAckIrq</a>(RingPtr, Mask)</td></tr>
|
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<tr class="separator:ga9e782e3715c1d2dd03e5d03434f47319"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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||||
Functions</h2></td></tr>
|
||||
<tr class="memitem:ga7b38bc9220c391823219937580bd816f"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">XAxiDma_StartBdRingHw</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
|
||||
<tr class="separator:ga7b38bc9220c391823219937580bd816f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga39ee7d89e4453276d615849acad27fde"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">XAxiDma_UpdateBdRingCDesc</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
|
||||
<tr class="separator:ga39ee7d89e4453276d615849acad27fde"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga5c6d6f492642dd355478c3a853556d6b"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">XAxiDma_BdRingCreate</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, UINTPTR PhysAddr, UINTPTR VirtAddr, u32 Alignment, int BdCount)</td></tr>
|
||||
<tr class="separator:ga5c6d6f492642dd355478c3a853556d6b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad044df5bd676a71226411ba7f78ef20b"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">XAxiDma_BdRingClone</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *SrcBdPtr)</td></tr>
|
||||
<tr class="separator:gad044df5bd676a71226411ba7f78ef20b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga44003cd704b7d4868d1dc00bb433a91f"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">XAxiDma_BdRingAlloc</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> **BdSetPtr)</td></tr>
|
||||
<tr class="separator:ga44003cd704b7d4868d1dc00bb433a91f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gac58b1ab7a89890142baf67211772d3ce"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">XAxiDma_BdRingUnAlloc</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdSetPtr)</td></tr>
|
||||
<tr class="separator:gac58b1ab7a89890142baf67211772d3ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaac81111b373e373be7dd3989fffffe7b"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">XAxiDma_BdRingToHw</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdSetPtr)</td></tr>
|
||||
<tr class="separator:gaac81111b373e373be7dd3989fffffe7b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1e5d328b4d4a247d1530fac3efe4c59c"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">XAxiDma_BdRingFromHw</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int BdLimit, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> **BdSetPtr)</td></tr>
|
||||
<tr class="separator:ga1e5d328b4d4a247d1530fac3efe4c59c"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad2ac76e5a39486896cd484e51d2898c7"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">XAxiDma_BdRingFree</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, int NumBd, <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">XAxiDma_Bd</a> *BdSetPtr)</td></tr>
|
||||
<tr class="separator:gad2ac76e5a39486896cd484e51d2898c7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaafd18a1df185c30b4745c147e3295ac3"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3">XAxiDma_BdRingStart</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
|
||||
<tr class="separator:gaafd18a1df185c30b4745c147e3295ac3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaaebba5c661e04485582e887e74dbeb94"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">XAxiDma_BdRingSetCoalesce</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, u32 Counter, u32 Timer)</td></tr>
|
||||
<tr class="separator:gaaebba5c661e04485582e887e74dbeb94"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga0d3794bbccf028da8e94407d061dfc68"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">XAxiDma_BdRingGetCoalesce</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr, u32 *CounterPtr, u32 *TimerPtr)</td></tr>
|
||||
<tr class="separator:ga0d3794bbccf028da8e94407d061dfc68"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga64cf3c732bc803da742c256ab6372e0e"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">XAxiDma_BdRingCheck</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
|
||||
<tr class="separator:ga64cf3c732bc803da742c256ab6372e0e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaffa661a9a2467c1e274842c147531cea"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">XAxiDma_BdRingDumpRegs</a> (<a class="el" href="struct_x_axi_dma___bd_ring.html">XAxiDma_BdRing</a> *RingPtr)</td></tr>
|
||||
<tr class="separator:gaffa661a9a2467c1e274842c147531cea"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
</table>
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</body>
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</html>
|
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57
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__g_8c.html
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<div id="projectname">axidma
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_77cbdaba61660bf3d37eac9737091131.html">axidma</a></li><li class="navelem"><a class="el" href="dir_d8b80b343a022500e2a21d50e293dc15.html">src</a></li> </ul>
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95
XilinxProcessorIPLib/drivers/axidma/doc/html/api/xaxidma__hw_8h.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<div id="projectname">axidma
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<div class="title">xaxidma_hw.h File Reference</div> </div>
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<table class="memberdecls">
|
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">DMA Transfer Direction</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Buffer Descriptor Alignment</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Micro DMA Buffer Address Alignment</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Maximum transfer length</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>This is determined by hardware </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Device registers</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>Register sets on TX and RX channels are identical </p>
|
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</div></td></tr>
|
||||
<tr class="memitem:ga79d2eca90f2554b8c893b2f9a70c795c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga79d2eca90f2554b8c893b2f9a70c795c">XAXIDMA_RX_CDESC0_OFFSET</a>   0x00000040</td></tr>
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<tr class="separator:ga79d2eca90f2554b8c893b2f9a70c795c"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXIDMA_CR_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXIDMA_SR_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>This register reports status of a DMA channel, including run/stop/idle state, errors, and interrupts (note that interrupt masks are shared with XAXIDMA_CR_OFFSET register, and are defined in the _IRQ_ section.</p>
|
||||
<p>The interrupt coalescing threshold value and delay counter value are also shared with XAXIDMA_CR_OFFSET register, and are defined in a later section. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmask for interrupts</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>These masks are shared by XAXIDMA_CR_OFFSET register and XAXIDMA_SR_OFFSET register </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmask and shift for delay and coalesce</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>These masks are shared by XAXIDMA_CR_OFFSET register and XAXIDMA_SR_OFFSET register </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Buffer Descriptor offsets</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>USR* fields are defined by higher level IP.</p>
|
||||
<p>setup for EMAC type devices. The first 13 words are used by hardware. All words after the 13rd word are for software use only. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXIDMA_BD_CTRL_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXIDMA_BD_STS_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks and shift values for XAXIDMA_BD_MCCTL_OFFSET register</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Bitmasks and shift values for XAXIDMA_BD_STRIDE_VSIZE_OFFSET register</div></td></tr>
|
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<tr class="memitem:ga99f615c527035db697545614fff86bf2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axidma__v9__0.html#ga99f615c527035db697545614fff86bf2">XAxiDma_ReadReg</a>(BaseAddress, RegOffset)    XAxiDma_In32((BaseAddress) + (RegOffset))</td></tr>
|
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|
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63
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/files.html
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63
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/files.html
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|
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|
||||
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|
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|
||||
</body>
|
||||
</html>
|
||||
144
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/functions.html
Executable file
144
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/functions.html
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|
||||
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|
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|
||||
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|
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|
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a7413799b4caffd89c43aba985e5e79f9">XAxiEthernet_Config</a>
|
||||
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|
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|
||||
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|
||||
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|
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|
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a8f3e9c24d55f2867bbc152922a645b9e">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#af31660d94a9387980b5288dd86c136a8">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a227cd48d8ffc0fc86c735c91a1f1d590">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet.html#adda2f024038f99905bb2ca8ab85854eb">XAxiEthernet</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a7dc877a54e0c85e0ca14ba977041bcb4">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a4fabde2681b16e5d8b314d4d3eb8b496">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#af57dac13f3ab7814f417d8fbc7863f10">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
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: <a class="el" href="struct_x_axi_ethernet.html#adebe741501e7c32e56ea5f4b62f6c125">XAxiEthernet</a>
|
||||
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|
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|
||||
: <a class="el" href="struct_x_axi_ethernet.html#a36f21814635085cc6476a7cb835e4c34">XAxiEthernet</a>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#aa1e84825e2de8a79bed03619d6acecfa">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#add9dfe4169f1812e6a442507d33d8ad6">XAxiEthernet_Config</a>
|
||||
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a2139dd5ce6832f0ae9211dd5fa759178">XAxiEthernet_Config</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a3d9add2497a3896d1b4b53beb46bea30">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TxVlanTag
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a4458731e2bc3fcbf5d88199971bf8330">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TxVlanTran
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a938f96ffecf9cbdb5cce6991fb120db4">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
144
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/functions_vars.html
Executable file
144
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/functions_vars.html
Executable file
|
|
@ -0,0 +1,144 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
||||
<meta name="generator" content="Doxygen 1.8.10"/>
|
||||
<title>axiethernet: Data Fields - Variables</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
||||
<script type="text/javascript" src="dynsections.js"></script>
|
||||
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axiethernet
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li class="current"><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow2" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="functions.html"><span>Data Fields</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="functions.html"><span>All</span></a></li>
|
||||
<li class="current"><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
 <ul>
|
||||
<li>Avb
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a7413799b4caffd89c43aba985e5e79f9">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>AxiDevBaseAddress
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a444f9516f617d023dae367c84c989946">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>AxiDevType
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a58df9c31ad87109bd294fb26a8af9630">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>AxiDmaRxIntr
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#abc5e20aa42c6e50b6ecf9a5d6a10871f">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>AxiDmaTxIntr
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a8f3e9c24d55f2867bbc152922a645b9e">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>AxiFifoIntr
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#af31660d94a9387980b5288dd86c136a8">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>BaseAddress
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a227cd48d8ffc0fc86c735c91a1f1d590">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>Config
|
||||
: <a class="el" href="struct_x_axi_ethernet.html#adda2f024038f99905bb2ca8ab85854eb">XAxiEthernet</a>
|
||||
</li>
|
||||
<li>DeviceId
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a7dc877a54e0c85e0ca14ba977041bcb4">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>EnableSgmiiOverLvds
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a4fabde2681b16e5d8b314d4d3eb8b496">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>ExtMcast
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#af57dac13f3ab7814f417d8fbc7863f10">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>Flags
|
||||
: <a class="el" href="struct_x_axi_ethernet.html#adebe741501e7c32e56ea5f4b62f6c125">XAxiEthernet</a>
|
||||
</li>
|
||||
<li>IsReady
|
||||
: <a class="el" href="struct_x_axi_ethernet.html#a36f21814635085cc6476a7cb835e4c34">XAxiEthernet</a>
|
||||
</li>
|
||||
<li>IsStarted
|
||||
: <a class="el" href="struct_x_axi_ethernet.html#a7a1dcb16fe62fb0f570ec6e13bd78958">XAxiEthernet</a>
|
||||
</li>
|
||||
<li>Options
|
||||
: <a class="el" href="struct_x_axi_ethernet.html#a5d0462ce1e0c0e7a5ee977413a94ca17">XAxiEthernet</a>
|
||||
</li>
|
||||
<li>PhyType
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#aa1e84825e2de8a79bed03619d6acecfa">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>RxCsum
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#add9dfe4169f1812e6a442507d33d8ad6">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>RxVlanStrp
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a4e2b86637eb13ac65e7cbc42e6d5ad1a">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>RxVlanTag
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a337886aa86b2bb17992b4679f1f346c8">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>RxVlanTran
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a7acfb6bb40497766e396671f39e3624c">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>Stats
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#aedf2130b6fe42d536313f334de21256a">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TemacIntr
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a9fccedcffde8615cf4f23d95e7702600">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TemacType
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a80c732270af2737df3ebed73fd28c630">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TxCsum
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a2139dd5ce6832f0ae9211dd5fa759178">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TxVlanStrp
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a3d9add2497a3896d1b4b53beb46bea30">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TxVlanTag
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a4458731e2bc3fcbf5d88199971bf8330">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
<li>TxVlanTran
|
||||
: <a class="el" href="struct_x_axi_ethernet___config.html#a938f96ffecf9cbdb5cce6991fb120db4">XAxiEthernet_Config</a>
|
||||
</li>
|
||||
</ul>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
1017
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals.html
Executable file
1017
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals.html
Executable file
File diff suppressed because it is too large
Load diff
891
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals_defs.html
Executable file
891
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals_defs.html
Executable file
|
|
@ -0,0 +1,891 @@
|
|||
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
||||
<html xmlns="http://www.w3.org/1999/xhtml">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
||||
<meta name="generator" content="Doxygen 1.8.10"/>
|
||||
<title>axiethernet: APIs</title>
|
||||
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
||||
<script type="text/javascript" src="jquery.js"></script>
|
||||
<script type="text/javascript" src="dynsections.js"></script>
|
||||
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
||||
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
|
||||
</head>
|
||||
<body>
|
||||
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
||||
<div id="titlearea">
|
||||
<table cellspacing="0" cellpadding="0">
|
||||
<tbody>
|
||||
<tr style="height: 56px;">
|
||||
<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axiethernet
|
||||
</div>
|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<!-- end header part -->
|
||||
<!-- Generated by Doxygen 1.8.10 -->
|
||||
<div id="navrow1" class="tabs">
|
||||
<ul class="tablist">
|
||||
<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
<ul class="tablist">
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li class="current"><a href="globals_defs.html"><span>Macros</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div id="navrow4" class="tabs3">
|
||||
<ul class="tablist">
|
||||
<li class="current"><a href="globals_defs.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="contents">
|
||||
 
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAE_AF0_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1f9a9923d88243f2dbfd9dd3d48be41a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_AF1_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa3a5b614123d6e9392c6433f3ab563ed">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_ARREG_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8ea504b7e39b058a887bce53fa6e5eb9">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_BROADCAST_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaed55b7962f8aab228e2c41be4154a834">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_DEFAULT_OPTIONS
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga71e31b002d0e8c019bad31fc22b21c8e">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_GPCS_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga94ebd51e00aa8ddbbbf7402f00d690e3">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_HOST_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae33401f733cd5650060a3485cc40be1d">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_LINKSPD_10
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6401ae2a7a9611e88479f021c209e48b">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_LINKSPD_100
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga0e32b8aa791f8b68cec95f5b82de0a18">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_LINKSPD_1000
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae1151fdb7d6bd896bbd24a153d501269">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_LINKSPEED_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9e47d470aedfcb29a8463fa75d6ec720">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1ce97746fcc377dc64d0456cbeaa8876">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_RGMII_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae53a8af11144ec674692e0db6468e2a7">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_RX16BIT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaee134d68967d67808045f83f92b8417b">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_SGMII_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga5899cad9cafca1a54ab1923c8f0900b8">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EMMC_TX16BIT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga004c84fcdf77219904b6353d45f5d86d">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_EXT_MULTICAST_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga200a4ee26fb655cce6de8edc7a3cc6b9">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_EXT_RXVLAN_TAG_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gafd0f2f2b21a02e3b8c8a11a86085c0c4">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_EXT_RXVLAN_TRAN_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1cef34ccc21b501cf2f5d0efe22392bd">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_EXT_TXVLAN_STRP_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2957a816e7ff90ff5d53bfe30eb7bfec">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_EXT_TXVLAN_TAG_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab4a430ee8f463578c6d55f527a56cd0b">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_EXT_TXVLAN_TRAN_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa8451191982023f578cda79fca48b190">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_FCC_FCRX_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4dc68927cf0dea3848761786b28499e8">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_FCC_FCTX_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga75b1826f6597faac3e9a214cea1d09f1">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_FCC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabbf3f25d565fd576aad0b62cefbf5515">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_FCS_INSERT_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9b828349795f783755ab6fd9413f6ff9">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_FCS_STRIP_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae274295c74b82214342722ee5b5d9392">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_FLOW_CONTROL_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gace9786d16960daabfdb803388b4ff0f3">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_FMI_IND_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf3e4fb0e971f2477c94d307489982e00">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_FMI_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae7c24a2632ccb6e8826e1501e71ba4c7">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_FMI_PM_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4e872cf49e4322b75b51745b89ce5183">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_HARD_TEMAC_TYPE
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gadd5a98458d2a341c6e38b34164de2ef7">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_IDREG_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabfaa17c95dddf907493d97906aeb4229">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_IE_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf0c17d5cc5613f6838922152d42377f4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_IFGP_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4843faa02e4871c182c4f86abcf4c175">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_ALL_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8a5e8274f2cbf0ee37aae6283a575568">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_AUTONEG_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga36749650f993c08f9f610b46bbacc2e4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_HARDACSCMPLT_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1b8183d77505d9e2a18fedb4ca8c62da">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_MGTRDY_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3c46a1393e3d06b7d31248df32731a70">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_PHYRSTCMPLT_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9568963969a3ad5c8f8c4b898a7120f0">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_RECV_ERROR_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga28f85be33530a1bf741db5f9738e3a14">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_RXCMPIT_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga42697e92b09a065154584ba237d2f4d6">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_RXDCMLOCK_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3498d93a8d76fe7c15a44857cc3b349f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_RXFIFOOVR_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gadf2299b3e254b7915b0b951ad3490f7e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_RXRJECT_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa5ac7291090f44c1a2057589f2660b6c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_INT_TXCMPIT_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga06f30667c61eee0aa61f25c3d828781e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_IP_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2479ff05e515d76dd37d9f179026d038">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_IS_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga03ae297b3ba90f6f4b7ebe468519e55a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_JUMBO_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga0c81a1ba1412a469773217a168902aa2">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_LENTYPE_ERR_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7f163c38fd07679c8a358c843a52f19e">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_LOOPS_TO_COME_OUT_OF_RST
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gafe1d4522233aae49418bf7e450c8e18a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MAW1_ADDR_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga15f4b8d39b03d8a8124d0c0ca0aa4326">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MAW1_MATADDR_SHIFT_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8a62168f8a34498245da6b6933648d0c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MAW1_MULTICADDR_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac40f43692c05efba029b1cc82eac5a7c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MAW1_RNW_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac7f7451bbbdcdc735c5e6aa747119774">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MAX_VLAN_TABL_ENTRY
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga11c61dbcc5ec1e5be4675be8a4c26c0f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MCAST_TABLE_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2381b6558022f08c42c607956c47888f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_DIV_DFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga484436248277bbcece62a29c8789cf43">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_INT_MIIM_RDY_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga544313c782ad28a854010723511f0822">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MC_CLOCK_DIVIDE_MAX
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga021c7c7df309cc4035a659309d7c4fcd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MC_MDIOEN_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2de7b376a540da5cb61f72ef47276060">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8d71b840173fb283f998132c3aa2963a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_INITIATE_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga88e9d33a103bd2f2ff98ad470c8e2e2f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf93dc2bae37a5cbfa529c891e540d013">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_OP_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa7e7c8bde6c919be6b748c103fa1051a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_OP_READ_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6f7434d71569f549634a2cfad8a3bd94">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_OP_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga01ffbfe7182296a7489823d31f8b9f1c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_OP_WRITE_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacce6a6bbb65bbfe4734789687dc8b1f4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_PHYAD_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa86d92cd9d5d39cd3c1f16d81faaa13c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_PHYAD_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga0aefae1c825e9ac47e70531fe15f30b2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_READY_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga313f7e9d880515e71c4c1f60fb05c40f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_REGAD_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga39e54e6dd932cdb1421b8aca40deec82">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MCR_REGAD_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3b2455125632bb5aa225e36eb159c4a1">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MIC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa2961f7227dd6b1f8fd2e1b8456bfb82">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MIE_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6bfc45839421f763b434502941a23aa3">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MIP_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga179f8f924f45fdfc2d9c6c14cb65a521">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MIS_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga12d38c652fefead77adb2118120bb92e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MRD_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa0e62ab7c0f7de9beab71a2e8037e466">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MDIO_MWD_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf438471d44cabeb8fb0847983c3b8edb">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_MULTI_MAT_ENTRIES
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8275681d6099aeb497580d8c3ef6ce3e">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_MULTICAST_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabf6e17b27602db32c134aaf5afdd33dd">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_PHY_ADDR_LIMIT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad6059a622b7a77c369471208c9703fc1">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHY_REG_NUM_LIMIT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac844ea52e18aff493fb04c8a225a90be">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga57a445498ecfa99058417ba680feff62">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_RGLINKSPD_10
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga50d2a09fe64415b438a32a6c9c52ed36">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_RGLINKSPD_100
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab49e550332bd1de5dc67d39eb0d6796e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_RGLINKSPD_1000
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7e9da5564eb24dd5b3b236d23e9bc540">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_RGMIIHD_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa3c5d473342ec5a3960a58993acb3527">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_RGMIILINK_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4eae4e748528e82c27b931c36ddf79f4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_RGMIILINKSPEED_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga34647df6f352b94dc2de7314dba63f1e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_SGLINKSPD_10
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa27e5d6f7c6d080198710450197ae2d3">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_SGLINKSPD_100
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga293bc732cbe2951c524cd5025e277df6">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_SGLINKSPD_1000
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2f332c37cb794d3891543bc3e6b67533">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PHYC_SGMIILINKSPEED_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8bac113c6adc3e3b154a101af64eb578">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_PROMISC_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga85d541107aad56649d63d548813e1091">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_BCSTREJ_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac501ac82162c5324b570824ecce826ed">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_EMULTIFLTRENBL_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga45b7fd9599441cd2a9fb25b7e53c5c7c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_MCSTREJ_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gace039cd91c42c092662ed81562cfe824">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_NEWFNCENBL_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa419531d1c8c684132f63d8f83cfed7e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga10705d0bef4683dbb0fa01dc66ae11ce">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_RXBADFRMEN_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaffd060201f156b63135dab21ab89131b">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_RXVSTRPMODE_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8b6f0e91833e2e8b9572df36cc199ec1">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_RXVSTRPMODE_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga5dc2f4f886d986200de3d09149a810a2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_RXVTAGMODE_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga28495411d570623251726fb6318831f4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_RXVTAGMODE_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab18e95d100f84140ec6af506cd8ee1a7">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_STATSRST_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga19989d806683b177c8f182265ddc1155">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_TXVSTRPMODE_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2ac24fc2fc07f6014b741d6180d8a339">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_TXVSTRPMODE_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf16c328aa4a06524256ca9fa6880afa9">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_TXVTAGMODE_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga75681a64feadc9dbcf26f3ad368974ba">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RAF_TXVTAGMODE_SHIFT
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2c206ec548a8adcb8f5413fcced88141">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW0_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad9f19fde721c3a4620d789900f6639e9">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_1588_TIMESTAMP_EN_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae616d54d7ecb9f47df54f6d20c9799b6">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_CL_DIS_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad710dc34ef9fe151e7e3cd89ce7a5a13">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_FCS_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6acc267a0a9b928bc3e3a646fde5e136">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_JUM_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6ac455ba9795c9c316b4be8eb3f215ae">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_LT_DIS_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga25000748d62fa554f5800327372fb87c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga693078837beaaea1d297b346bd51d405">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_PAUSEADDR_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga34602ba09d4919f916808e8fb396f7f2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_RST_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad170d73f7c023e8524eb6bb888c89484">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_RX_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga725b4465d59c451c6434e579d2f6eca0">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RCW1_VLAN_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gafe2e7841745cce3a3d52260229257b19">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RECEIVER_ENABLE_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga027d60f8fd28b519cad51e450b71c07b">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_RST_DELAY_LOOPCNT_VAL
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9c879203604f0d99effc88d231fd3709">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RTAG_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacd907cec24f96e8ef60866c9ec5818c5">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX1024BL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga09158cfb500ca629f0ed4051beb9ab44">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX1024BU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf8c338b370dfdf8e41f20e0019f5f4c4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX128B255L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga558ba48c1f655c827871df2b01f4eecd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX128B255U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae811962bb4208035e39e4640e9ab9116">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX256B511L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga89faf86acfd6381c8b391ed3c0f31470">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX256B511U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7687f9013826f746cea6d084aa3e7dba">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX512B1023L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8e989e4366407644890821b4a6f5d820">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX512B1023U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga461eb93f7941bc5e8afe7ade54f39dbd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX64BL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga607d42c431772913cf3ed22d4b4dd5f4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX64BU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabb01b32eb2a6e232425331cf34af87d4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX65B127L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7b4f780c60e7531b72249c22da6875e5">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX65B127U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad037630eb5991567d64997c25e45b866">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RX_VLAN_DATA_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga297b5d62f50bd525c2cbd7731a482369">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXAERL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga257e63035b3e4e244ffbeef1c56a55ca">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXAERU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac372571d2213b7456d42fbecc263e4cf">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXBCSTFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab2c4d7fbca97ba2f0e35a7f7e1d91b3c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXBCSTFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac5c7b455508d89f0c946937f241799d9">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXBL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga454abf6c4e3d01e17bb52a4bbd4f5638">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXBU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga20de38ad65a25113cf24488309d40777">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXCTRFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae9b31309211ea4cec2869ad55235d0c2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXCTRFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacaad9f5948ffd971735bccdfdabf3079">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9da1a2e44823f2b271d70c13ae88a059">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFCSERL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa31f48644128222bd04709228f63e19d">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFCSERU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga408092309e49f756441361b218f5c657">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga54c0ebc03fe00dc96a17d7db082fb4c0">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFRAGL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9584f4d750e20644a428413e677e3306">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFRAGU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2d49a84f58028528cdc59a8262805654">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga295d42f2ea859fe55015958f1180dfc8">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXLTERL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4ff4981d5f59ecee0b42b6861aad66d3">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXLTERU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7f73f9683f87406bcec727f8d5a236b7">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXMCSTFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga44a3d5db7da76a48c349616839cd7ac8">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXMCSTFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga846188b9055eef79baf8da83fab23396">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXOVRL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacb9fd2f9b874b3ea610c5ca4edbb3b00">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXOVRU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3621ee1287ca3bd03cbb86a1d461c601">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXPFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9c70cc8c41676a4e5f002caf93ce60d4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXPFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gadd9a8e12cda7b094a42ea852939dd4f1">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXUNDRL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaeb34feee8131f3fa4929e199cfeefe7a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXUNDRU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7a6203d278a679b8d366947ade3333bd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXUOPFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9f0511c2fde9093da3cc54765bac7512">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXUOPFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga0803d1f22bb689f0358c1435ebb05965">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXVLANFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa1d46fce0729b68076fb132568cf8fad">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_RXVLANFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga5e3aae8b5c6736292c3722117cf6fefc">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_SOFT_TEMAC_HIGH_SPEED
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga004bc751afe30e5861425a0dfeb52f31">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_SOFT_TEMAC_LOW_SPEED
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga141d3886dcc043edd045ee048432eda3">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_SPEED_1000_MBPS
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3e82c5281db9a956fe27e6098b74d6c2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_SPEED_100_MBPS
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacbedd31638917c16df3848cc3ec88a84">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_SPEED_10_MBPS
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga76ae6e4b652f8fdcc5750ed78f2ed4aa">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_1588_CMD_EN_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga61ebb0ee53221d5d9c129e152ed6ee78">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_FCS_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga808a092df2c5bbba3bdfdf6a3fbe8d01">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_IFG_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga71dfcae51b6738824ff2c3ac07a87bbc">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_JUM_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa2c76f215b1ed9e748b9c0b87ba83793">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga343360bcd114478e5b4d6cecf69c520a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_RST_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab40ab27b9d4bae73a5469b88e824a287">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_TX_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae711647de19d4c0b33aaebe3f685a56f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TC_VLAN_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa9418c071e0e4a034bd6d0f3f672dbb4">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TFGP_IFGP_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6992568e896c3e68556737d85e8b095b">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TPF_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab04450ee6ee95a6dcae48418bade296e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TPF_TPFV_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga913810b6bd0872c14fa6e3c5282077cd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TPID0_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacb2ad5eb62f5026f5da7987ecf2adec0">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TPID1_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaaa406274b68296725c4e4d35d99a1b85">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TPID_0_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf82f52e5b5cdd65785d6c765db3236aa">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TPID_1_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf381962929a99be81465b38d565c8731">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TRANSMITTER_ENABLE_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1e81b6f5f677ed0370507c117b565b20">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_TTAG_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3e03b2fd51bd2803ebfbf5ab172ef66e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX1024L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab70a0cab44804ecf6d7693521895ee01">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX1024U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga32645ce78edd202ecc658209bb60bea7">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX128B255L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gadd435f8dda0867797465e1239b9ce98d">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX128B255U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2602e85c7a6a807daedc240a5fe2495f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX256B511L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga12c4f36c73586076ff786eea2e39dbfd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX256B511U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab1204fc6db885a69b0b452ddb969141f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX512B1023L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8e09bdc68ce9560e7e6a4481de1a2116">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX512B1023U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga298de10c679e810bdb5703b8081d2766">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX64BL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae57c7ee1b1cec0aa76760456b1ba1a7f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX64BU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga0e0e21d350564650bb432b9aad297f57">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX65B127L_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga0946e80ebdbb0ddf813892b36aa09ea1">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX65B127U_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3cf29c99808e80b57e29818df0f10d9f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX_TIMESTAMP_ADJ_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab53f5eb81207b30b2b5b1f6636ed9ee2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TX_VLAN_DATA_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga617d09499fadf250239e514b4a2f87b8">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXAECL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga31d781ac0cd6fe84dc5e4a0476e4d72e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXAECU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaeff673c75d818e72c7b88e22b0d79e6e">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXBCSTFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6bc16986b917920d22723a6672f563c9">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXBCSTFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga52d5c9333eb29587c0f3b3d6fe17b437">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXBL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7e85af8138c7e35ffd02eb5a51301d25">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXBU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9d27f21d0fa110420139649d9fd249d2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXCTRFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6ea8769cefec6aefb68b0d4e7f162f87">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXCTRFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf65358ed77fec94fb92e1a3059382d0f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXDEFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga089241bcaa5465e83246b37e85446d36">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXDEFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad8d85e547fc831a9be04936ab47d0155">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXEDEFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa9ea126f91d468673125633cae69839a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXEDEFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9b7660440391ceab2eec3a53dcfbbdd2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXFC_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2a370e00d99339d3f88aaac38250b999">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga50a92c2beadc33964465750c902ecb4c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga7101f4c653c173aeadfb9a5ab789dcd8">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXLTCL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9b4f8d12fdad1c8ce972e4df07e54a17">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXLTCU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabcac806b8346d7c8411e5d983a07523c">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXMCL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4e08c268b188312c0dd51bc4bf7c0e48">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXMCSTFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6af31b91ae556036a749fb632dbf114a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXMCSTFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga621c1fdb0ea91dced2e45769ca919387">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXMCU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga5b172a15dc8c85e06818fcb1b45c5998">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXOVRL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabe07798db0f52a16de6e8ae02716958b">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXOVRU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gabfca48d297c2c8e61ab1b32d7d6ec2ed">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXPFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae6ba53f96b7193c675111de52b4a7793">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXPFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga485a08e9964a7cce85d60ffe38c09e19">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXSCL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gafed813af809148b4cc42cb62ac97639a">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXSCU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf3951cd6892928ecb8a2a8fb3d43e057">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXUNDRERL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga716123e32e46e6825edf05fc18191669">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXUNDRERU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1c53c5aeb00e50be3e230e0ea06c94c6">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXVLANFL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae104af36284aa14cf0be318e64a2a992">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_TXVLANFU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa1b74c637fff3ec2f4e87bafb2c84ef2">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_UAW0_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1511d1d5d66209f49d12e5676a9af6bd">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_UAW1_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1d7982dd4fcccef36218c20699dedb1f">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_UAW1_UNICASTADDR_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga81eb3453bbd3750f26892d4f7cdbf88d">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_UAWL_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9607c49e8062f71fa2a8ab36edbb9ace">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_UAWU_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga5c4bf07d79b5bdc4d69126048b49f1cc">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_OPTION
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaaacd508700a0767d156cf47e71e1ea76">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_TABL_STRP_ENTRY_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4b63d8ae6fee2645c9db24a33143ec03">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_TABL_STRP_FLD_LEN
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga260908a359375c7325d6a8d86309fdff">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_TABL_STRP_STRT_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaccf80323f72179e1583df1ae7f09dda9">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_TABL_TAG_ENTRY_MASK
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4e72f5a303509c70176ee548d0a72d0b">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_TABL_TAG_FLD_LEN
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gacafa77625463492f0f8b94aef9df4dd0">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAE_VLAN_TABL_VID_START_OFFSET
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2747d92cef5b3e097703acaa222525ef">xaxiethernet_hw.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_AxiDevBaseAddress
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gace643555d4c75d40b1ddee9dbd814a74">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetIntStatus
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga56664c785ad43b4458a1109d3a5b3bc5">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetPhysicalInterface
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac94a4ec88dd7b33f7c2e1366c6313d53">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetTemacType
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6ee4e2b95cc8d84e227f51e28ff07901">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IntClear
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaaaef83a7f1fe4d8ca117cf6bc80500a8">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IntDisable
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6357e97582bc0e064c5b169d212e41df">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IntEnable
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab5476b0e04b0ecd8f9fd027f90ea648f">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IntPending
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga492b674e8d7584ed5e73e2b1a886bcc3">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsAvbConfigured
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa09f91114abaefee6e94e8a5f48923e7">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsDma
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6fa193e8b9cf3c2807d328829903bf6c">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsExtFuncCap
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga51c2a30cc98f11355ce3639139b41d8a">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsExtMcast
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga751c51d9ed918ca9dd556d98187eb76e">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsExtMcastEnable
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab62015adb15bebd496a5346e3877af55">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsFifo
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaaedd2fe4a2b3d24152c3f32160e8f994">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsRecvFrameDropped
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae5c91a283a8b79c5e0735588ed8064ec">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsRxFullCsum
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gafada00dabb696100996b896e83d6c2bd">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsRxPartialCsum
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga310edb175e98c8e42fd2ad7d0c89318f">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsRxVlanStrp
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4764b3156c37e0b505c4df69b105b770">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsRxVlanTag
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga16debcb3a008c09bc8c4e29764310cae">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsRxVlanTran
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga04ad5f292476ee8d62a2cacc66bf8767">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsSgmiiOverLvdsEnabled
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf20d2f840ee7c6defacb6e1a478b38a7">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsStarted
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6c513f6bb939a705f56da5c826d9ec63">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsStatsConfigured
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2e75a48d11c00b0c39339bd2f2461bdc">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsTxFullCsum
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8d1defd403ed40f023650e1e44651c88">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsTxPartialCsum
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6e44788bbc239e6cea83d1e07ddb65ed">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsTxVlanStrp
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga92ea2563addd13a5d3008a0bd9d069bc">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsTxVlanTag
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2d75475a1e85f44562fd614960744b23">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_IsTxVlanTran
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaac1bbeb5294915665aae439a33e3b887">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_ReadReg
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga136faa5126867cb31bb12cec43fb20a2">xaxiethernet_hw.h</a>
|
||||
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|
||||
<li>XAxiEthernet_WriteReg
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga048aa7d7b16bc7fa5e85071bd16147aa">xaxiethernet_hw.h</a>
|
||||
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|
||||
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|
||||
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|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
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|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
186
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals_func.html
Executable file
186
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals_func.html
Executable file
|
|
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|
|||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
<script type="text/javascript" src="jquery.js"></script>
|
||||
<script type="text/javascript" src="dynsections.js"></script>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axiethernet
|
||||
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|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
||||
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|
||||
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|
||||
<li class="current"><a href="globals.html"><span>APIs</span></a></li>
|
||||
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|
||||
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|
||||
</div>
|
||||
<div id="navrow3" class="tabs2">
|
||||
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|
||||
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|
||||
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|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Macros</span></a></li>
|
||||
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|
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|
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|
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|
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|
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|
||||
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|
||||
 
|
||||
|
||||
<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
|
||||
<li>XAxiEthernet_AddExtMulticastGroup()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">xaxiethernet.h</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90">xaxiethernet.c</a>
|
||||
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|
||||
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|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaab45f6c7a4440bc3f58d4ff971e6be7b">xaxiethernet.c</a>
|
||||
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|
||||
<li>XAxiEthernet_ClearExtMulticastGroup()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_ClearOptions()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_ClearTpid()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_DisableControlFrameLenCheck()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga41049ca22799d42d1279461be627c72e">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_DumpExtMulticastGroup()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga08b7db7c5a837de18afceb58230351b3">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_EnableControlFrameLenCheck()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8b71bcdc8be6ae5d6364c59ea0f53aab">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetExtMulticastGroup()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga6932bd79a08811085a47ad1357a4ef89">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetMacAddress()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaa5b70a456ac18505132f61f596428ab7">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetMacPauseAddress()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga369290833088c56abf0a967f16233266">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetOperatingSpeed()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga8e8caa9c4ac753744bd08ebf103877c3">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetOptions()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gaf48b8f321b842bfb139b473ad7185874">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetRgmiiStatus()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gade4816d9067e13fbac2ceb66cf32360d">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetSgmiiStatus()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab7d57eaf1bb97c34a92cc5e2c8600075">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetTpid()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga498bdb032a67313102ac7dee10ae8e7e">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetVidTable()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab13721145a4632d987bd858483c00011">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetVStripMode()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gafb2a0cbe2263410d25caa0e87428a6d7">xaxiethernet.h</a>
|
||||
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|
||||
<li>XAxiEthernet_GetVTagMode()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga9d375eb39bb3a8f724123aa9a9585e47">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_GetVTagValue()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga00d242e51aeec92bf07528bbf58709ea">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_LookupConfig()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga781a4d89a7a3a9d59ac8921ba66b353d">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_MulticastAdd()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_MulticastClear()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_MulticastGet()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gac95ba7bcd0c537eec1787f5ea49488df">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_PhySetMdioDivisor()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_Reset()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SendPausePacket()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetBadFrmRcvOption()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga3db57c4a261afc854985297afed2373b">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetMacAddress()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetMacPauseAddress()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetOperatingSpeed()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetOptions()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetTpid()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetVidTable()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetVStripMode()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_SetVTagMode()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">xaxiethernet.h</a>
|
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</li>
|
||||
<li>XAxiEthernet_SetVTagValue()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_Start()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">xaxiethernet.c</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_Stop()
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">xaxiethernet.c</a>
|
||||
</li>
|
||||
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|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
65
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals_type.html
Executable file
65
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/globals_type.html
Executable file
|
|
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|||
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|
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|
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|
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|
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|
||||
<li class="current"><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Macros</span></a></li>
|
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|
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|
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 <ul>
|
||||
<li>XAxiEthernet
|
||||
: <a class="el" href="group__axiethernet__v5__0.html#gad8601786fc7884f68bf37c3474dddcf3">xaxiethernet.h</a>
|
||||
</li>
|
||||
<li>XAxiEthernet_Config
|
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: <a class="el" href="group__axiethernet__v5__0.html#ga581ee25a5a214e215048176efc6f6c96">xaxiethernet.h</a>
|
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|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
7363
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/group__axiethernet__v5__0.html
Executable file
7363
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|
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<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
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<div id="titlearea">
|
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<table cellspacing="0" cellpadding="0">
|
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|
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<tr style="height: 56px;">
|
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<td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
|
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<td id="projectalign" style="padding-left: 0.5em;">
|
||||
<div id="projectname">axiethernet
|
||||
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|
||||
<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
|
||||
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|
||||
</tr>
|
||||
</tbody>
|
||||
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|
||||
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<!-- Generated by Doxygen 1.8.10 -->
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|
||||
<ul class="tablist">
|
||||
<li class="current"><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li><a href="globals.html"><span>APIs</span></a></li>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div><!-- top -->
|
||||
<div class="header">
|
||||
<div class="headertitle">
|
||||
<div class="title">axiethernet Documentation</div> </div>
|
||||
</div><!--header-->
|
||||
<div class="contents">
|
||||
<div class="textblock"><p>The Xilinx AXI Ethernet MAC driver component. This driver supports hard Ethernet core for Virtex-6(TM) devices and soft Ethernet core for Spartan-6(TM) and other supported devices. The supported speed can be 10/100/1000 Mbps and can reach upto 2000/2500 Mbps (1000Base-X versions).</p>
|
||||
<p>For a full description of AXI Ethernet features, please see the hardware spec. This driver supports the following features:</p><ul>
|
||||
<li>Memory mapped access to host interface registers</li>
|
||||
<li>Virtual memory support</li>
|
||||
<li>Unicast, broadcast, and multicast receive address filtering</li>
|
||||
<li>Full duplex operation</li>
|
||||
<li>Automatic source address insertion or overwrite (programmable)</li>
|
||||
<li>Automatic PAD & FCS insertion and stripping (programmable)</li>
|
||||
<li>Flow control</li>
|
||||
<li>VLAN frame support</li>
|
||||
<li>Pause frame support</li>
|
||||
<li>Jumbo frame support</li>
|
||||
<li>Partial and full checksum offload</li>
|
||||
<li>Extended multicast addresses to 2**23.</li>
|
||||
<li>Extended VLAN translation, tagging and stripping supports.</li>
|
||||
</ul>
|
||||
<h2>Driver Description</h2>
|
||||
<p>The device driver enables higher layer software (e.g., an application) to configure a Axi Ethernet device. It is intended that this driver be used in cooperation with another driver (FIFO or DMA) for data communication. This device driver can support multiple devices even when those devices have significantly different configurations.</p>
|
||||
<h2>Initialization & Configuration</h2>
|
||||
<p>The <a class="el" href="struct_x_axi_ethernet___config.html" title="This typedef contains configuration information for a Axi Ethernet device. ">XAxiEthernet_Config</a> structure can be used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on hardware build properties, although, other methods are allowed and currently used in some systems.</p>
|
||||
<p>To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized using the XAxiEthernet_CfgInitialze() routine.</p>
|
||||
<h2>Interrupts and Asynchronous Callbacks</h2>
|
||||
<p>The driver has no dependencies on the interrupt controller. It provides no interrupt handlers. The application/OS software should set up its own interrupt handlers if required.</p>
|
||||
<h2>Device Reset</h2>
|
||||
<p>When a Axi Ethernet device is connected up to a FIFO or DMA core in hardware, errors may be reported on one of those cores (FIFO or DMA) such that it can be determined that the Axi Ethernet device needs to be reset. If a reset is performed, the calling code should also reconfigure and reapply the proper settings in the Axi Ethernet device.</p>
|
||||
<p>When a Axi Ethernet device reset is required, <a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f" title="XAxiEthernet_Reset does not perform a soft reset of the AxiEthernet core. ">XAxiEthernet_Reset()</a> should be utilized.</p>
|
||||
<h2>Virtual Memory</h2>
|
||||
<p>This driver may be used in systems with virtual memory support by passing the appropriate value for the <em>EffectiveAddress</em> parameter to the <a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90" title="XAxiEthernet_CfgInitialize initializes an AXI Ethernet device along with the InstancePtr that referen...">XAxiEthernet_CfgInitialize()</a> routine.</p>
|
||||
<h2>Transfering Data</h2>
|
||||
<p>The Axi Ethernet core by itself is not capable of transmitting or receiving data in any meaningful way. Instead the Axi Ethernet device need to be connected to a FIFO or DMA core in hardware.</p>
|
||||
<p>This Axi Ethernet driver is modeled in a similar fashion where the application code or O/S adapter driver needs to make use of a separate FIFO or DMA driver in connection with this driver to establish meaningful communication over Ethernet.</p>
|
||||
<h2>Checksum Offloading</h2>
|
||||
<p>If configured, the device can compute a 16-bit checksum from frame data. In most circumstances this can lead to a substantial gain in throughput.</p>
|
||||
<p>The checksum offload settings for each frame sent or received are transmitted through the AXI4-Stream interface in hardware. What this means is that the checksum offload feature is indirectly controlled in the Axi Ethernet device through the driver for DMA core connected to the Axi Ethernet device.</p>
|
||||
<p>Refer to the documentation for DMA driver used for data communication on how to set the values for the relevant AXI4-Stream control words.</p>
|
||||
<p>Since this hardware implementation is general purpose in nature system software must perform pre and post frame processing to obtain the desired results for the types of packets being transferred. Most of the time this will be TCP/IP traffic.</p>
|
||||
<p>TCP/IP and UDP/IP frames contain separate checksums for the IP header and UDP/TCP header+data. For partial checksum offloading (enabled while configuring the hardware), the IP header checksum cannot be offloaded. Many stacks that support offloading will compute the IP header if required and use hardware to compute the UDP/TCP header+data checksum. There are other complications concerning the IP pseudo header that must be taken into consideration. Readers should consult a TCP/IP design reference for more details.</p>
|
||||
<p>For full checksum offloading (enabled while configuring the hardware), the IPv4 checksum calculation and validation can also be offloaded at the harwdare. Full checksum offload is supported only under certain conditions. IP checksum offload will be supported on valid IP datagrams that meet the following conditions.</p><ul>
|
||||
<li>If present, the VLAN header is 4 bytes long</li>
|
||||
<li>Encapsulation into the Ethernet frame is either Ethernet II or Ethernet SNAP format</li>
|
||||
<li>Only IPv4 is supported. IPv6 is not supported.</li>
|
||||
<li>IP header is a valid length TCP/UDP checksum offloading will be supported on valid TCP/UDP segments that meet the following conditions.</li>
|
||||
<li>Encapsulated in IPv4 (IPv6 is not supported)</li>
|
||||
<li>Good IP header checksum</li>
|
||||
<li>No fragmentation</li>
|
||||
<li>TCP or UDP segment When full checksum offload is enabled, the hardware does the following:</li>
|
||||
<li>Calculates the IP header checksum and inserts it in the IP header.</li>
|
||||
<li>Calculates the TCP/UDP Pseudo header from IP header.</li>
|
||||
<li>Calculates TCP/UDP header from, TCP/UDP psedu header, TCP/UDP header and TCP/UDP payload.</li>
|
||||
<li>On the receive path, it again calculates all the above and validates for IP header checksum and TCP/UDP checksum.</li>
|
||||
</ul>
|
||||
<p>There are certain device options that will affect the checksum calculation performed by hardware for Tx:</p>
|
||||
<ul>
|
||||
<li>FCS insertion disabled (XAE_FCS_INSERT_OPTION): software is required to calculate and insert the FCS value at the end of the frame, but the checksum must be known ahead of time prior to calculating the FCS. Therefore checksum offloading cannot be used in this situation.</li>
|
||||
</ul>
|
||||
<p>And for Rx:</p>
|
||||
<ul>
|
||||
<li>FCS/PAD stripping disabled (XAE_FCS_STRIP_OPTION): The 4 byte FCS at the end of frame will be included in the hardware calculated checksum. software must subtract out this data.</li>
|
||||
<li>FCS/PAD stripping disabled (XAE_FCS_STRIP_OPTION): For frames smaller than 64 bytes, padding will be included in the hardware calculated checksum. software must subtract out this data. It may be better to allow the TCP/IP stack verify checksums for this type of packet.</li>
|
||||
<li>VLAN enabled (XAE_VLAN_OPTION): The 4 extra bytes in the Ethernet header affect the hardware calculated checksum. software must subtract out the 1st two 16-bit words starting at the 15th byte.</li>
|
||||
</ul>
|
||||
<h3>Transmit Checksum Offloading</h3>
|
||||
<p>For partial checksum offloading, for the TX path, the software can specify where in the frame the checksum calculation is to start, where the result should be inserted, and a seed value. The checksum is calculated from the start point through the end of frame.</p>
|
||||
<p>For full checksum offloading, for the TX path, the software just need to enable Full Checksum offload in the appropriate AXI4-Stream Control word on a per packet basis.</p>
|
||||
<p>The checksum offloading settings are sent in the transmit AXI4 Stream control words. The relevant control word fields are described in brief below. Refer to the Axi Ethernet hardware specification for more details.</p>
|
||||
<h4>AXI4-Stream Control Word 0:</h4>
|
||||
<pre>
|
||||
Bits 1-0 : Transmit Checksum Enable: 01 - Partial checsum offload,
|
||||
10 - Full checksum offload
|
||||
00 - No checksum offloading
|
||||
11 - Not used, reserved
|
||||
Bits 27-2 : Reserved
|
||||
Bits 31-28 : Used for AXI4-Stream Control Mode flag
|
||||
*</pre><h4>AXI4-Stream Control Word 1:</h4>
|
||||
<pre>
|
||||
Bits 31-16 (MSB): Transmit Checksum Calculation Starting Point: Offset
|
||||
in the frame where checksum calculation should begin.
|
||||
Relevant only for partial checksum offloading.
|
||||
Bits 15-0 (LSB): Transmit Checksum Insertion Point: Frame offset where
|
||||
the computed checksum value is stored, which should be
|
||||
in the TCP or UDP header.
|
||||
Relevant only for partial checksum offloading.
|
||||
</pre><h4>AXI4-Stream Control Word 2:</h4>
|
||||
<pre>
|
||||
Bits 31-16 (MSB): Reserved
|
||||
Bits 0-15 (LSB): Transmit Checksum Calculation Initial Value: Checksum
|
||||
seed value.
|
||||
Relevant only for partial checksum offloading.
|
||||
*</pre><h3>Receive Checksum Offloading</h3>
|
||||
<p>For partial checksum offload on the RX path, the 15th byte to end of frame is check summed. This range of bytes is the entire Ethernet payload (for non-VLAN frames).</p>
|
||||
<p>For full checksum offload on the RX path, both the IP and TCP checksums are validated if the packet meets the specified conditions.</p>
|
||||
<p>The checksum offloading information is sent in the receive AXI4-Stream status words. There are 4 relevant status words available. However only the relevant status words are described in brief below. Refer to the Axi Ethernet hardware specification for more details.</p>
|
||||
<h4>AXI4-Stream Status Word 0:</h4>
|
||||
<pre>
|
||||
Bits 31-28 (MSB): Always 0x5 to represent receive status frame
|
||||
Bits 27-16 : Undefined
|
||||
Bits 15-0 (LSB): MCAST_ADR_U. Upper 16 bits of the multicast
|
||||
destination address of the frame.</pre><pre>*</p><h4>AXI4-Stream Status Word 1:</h4>
|
||||
</pre><pre>
|
||||
*</pre><p> Bits 31-0 : MCAST_ADR_L. The lower 32 bits of the multicast destination address.</p>
|
||||
<h4>AXI4-Stream Status Word 2:</h4>
|
||||
<p>Bits 5-3 : Specifies the receive full checksum status. This is relevant only for full checksum offloading. 000 -> Neither the IP header nor the TCP/UDP checksums were checked. 001 -> The IP header checksum was checked and was correct. The TCP/UDP checksum was not checked. 010 -> Both the IP header checksum and the TCP checksum were checked and were correct. 011 -> Both the IP header checksum and the UDP checksum were checked and were correct. 100 -> Reserved. 101 -> The IP header checksum was checked and was incorrect. The TCP/UDP checksum was not checked. 110 -> The IP header checksum was checked and is correct but the TCP checksum was checked and was incorrect. 111 -> The IP header checksum was checked and is correct but the UDP checksum was checked and was incorrect.</p>
|
||||
<h4>AXI4-Stream Status Word 3:</h4>
|
||||
<p>Bits 31-16 : T_L_TPID. This is the value of 13th and 14th byte of the frame. Bits 15-0 : Receive Raw Checksum: Computed checksum value</p>
|
||||
<h4>AXI4-Stream Status Word 3:</h4>
|
||||
<p>Bits 31-16 : VLAN_TAG. Value of 15th and 16th byte of the frame. Bits 15-0 : RX_BYTECNT. Received frame length.</p>
|
||||
<h2>Extended multicast</h2>
|
||||
<p>(XAE_EXT_MULTICAST_OPTION): Allow and perform address filtering more than 4 multicast addresses. Hardware requires to enable promiscuous mode (XAE_PROMISCUOUS_OPTION) and disable legacy multicast mode (XAE_MULTICAST_OPTION) for this feature to work.</p>
|
||||
<h2>Extended VLAN</h2>
|
||||
<h3>TX/RX VLAN stripping</h3>
|
||||
<p>(XAE_EXT_[T|R]XVLAN_STRP_OPTION) handles transmit/receive one VLAN tag stripping in Ethernet frames. To enable this option, hardware requires to build with this feature and enable (XAE_FCS_INSERT_OPTION), (XAE_FCS_STRP_OPTION) and disable (XAE_VLAN_OPTION). Supports three modes, -XAE_VSTRP_NONE : no stripping -XAE_VSTRP_ALL : strip one tag from all frames -XAE_VSTRP_SELECT : strip one tag from selected frames</p>
|
||||
<h3>TX/RX VLAN translation</h3>
|
||||
<p>(XATE_EXT_[T|R]XVLAN_TRAN_OPTION) handles transmit/receive one VLAN tag translation in Ethernet frames. To enable this option, hardware requires to build with this feature and enable (XATE_FCS_INSERT_OPTION), (XAE_FCS_STRP_OPTION), and disable (XAE_VLAN_OPTION).</p>
|
||||
<h3>TX/RX VLAN tagging</h3>
|
||||
<p>(XAE_EXT_[T|R]XVLAN_TAG_OPTION) adds transmit/receive one VLAN tag in Ethernet frames. To enable this option, hardware requires to build with this feature and enable (XAE_FCS_INSERT_OPTION), (XAE_FCS_STRP_OPTION), (XAE_JUMBO_OPTION) and disable (XAE_VLAN_OPTION). Support four modes, -XAE_VTAG_NONE : no tagging -XAE_VTAG_ALL : tag all frames -XAE_VTAG_EXISTED : tag already tagged frames -XAE_VTAG_SELECT : tag selected already tagged frames</p>
|
||||
<h2>PHY Communication</h2>
|
||||
<p>Prior to PHY access, the MDIO clock must be setup. This driver will set a safe default that should work with AXI4-Lite bus speeds of up to 150 MHz and keep the MDIO clock below 2.5 MHz. If the user wishes faster access to the PHY then the clock divisor can be set to a different value (see <a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6" title="XAxiEthernet_PhySetMdioDivisor sets the MDIO clock divisor in the Axi Ethernet,specified by InstanceP...">XAxiEthernet_PhySetMdioDivisor()</a>).</p>
|
||||
<p>MII register access is performed through the functions XAxiEthernet_PhyRead() and XAxiEthernet_PhyWrite().</p>
|
||||
<h2>Link Sync</h2>
|
||||
<p>When the device is used in a multi speed environment, the link speed must be explicitly set using <a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9" title="XAxiEthernet_SetOperatingSpeed sets the current operating link speed. ">XAxiEthernet_SetOperatingSpeed()</a> and must match the speed PHY has negotiated. If the speeds are mismatched, then the MAC will not pass traffic.</p>
|
||||
<p>The application/OS software may use the AutoNegotiation interrupt to be notified when the PHY has completed auto-negotiation.</p>
|
||||
<h2>Asserts</h2>
|
||||
<p>Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that users leave asserts on during development. For deployment use -DNDEBUG compiler switch to remove assert code.</p>
|
||||
<h2>Driver Errata</h2>
|
||||
<ul>
|
||||
<li>A dropped receive frame indication may be reported by the driver after calling <a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb" title="XAxiEthernet_Stop gracefully stops the Axi Ethernet device as follows: ">XAxiEthernet_Stop()</a> followed by <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe" title="XAxiEthernet_Start starts the Axi Ethernet device as follows: ">XAxiEthernet_Start()</a>. This can occur if a frame is arriving when stop is called.</li>
|
||||
<li>On Rx with checksum offloading enabled and FCS/PAD stripping disabled, FCS and PAD data will be included in the checksum result.</li>
|
||||
<li>On Tx with checksum offloading enabled and auto FCS insertion disabled, the user calculated FCS will be included in the checksum result.</li>
|
||||
</ul>
|
||||
<dl class="section note"><dt>Note</dt><dd></dd></dl>
|
||||
<p>Xilinx drivers are typically composed of two components, one is the driver and the other is the adapter. The driver is independent of OS and processor and is intended to be highly portable. The adapter is OS-specific and facilitates communication between the driver and an OS. <br />
|
||||
<br />
|
||||
This driver is intended to be RTOS and processor independent. Any needs for dynamic memory management, threads or thread mutual exclusion, or cache control must be satisfied by the layer above this driver.</p>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><pre> Ver Who Date Changes
|
||||
----- ---- -------- ---------------------------------------------------------
|
||||
1.00a asa 6/30/10 First release based on the ll temac driver
|
||||
1.01a asa 12/10/10 Added macros XAxiEthernet_IsRxFullCsum and
|
||||
XAxiEthernet_IsTxFullCsum for supporting full checksum
|
||||
offload. The full checksum offload is only supported in
|
||||
newer versions of the core, please refer to the core
|
||||
HW datasheet.
|
||||
1.02a asa 2/16/11 Inserted a delay in the driver function
|
||||
XAxiEthernet_Reset in file <a class="el" href="xaxiethernet_8c.html">xaxiethernet.c</a>. This is done
|
||||
because immediately after a core reset none of the
|
||||
AxiEthernet registers are accessible for some duration.
|
||||
Changed the value of XAE_LOOPS_TO_COME_OUT_OF_RST to
|
||||
10000 in file <a class="el" href="xaxiethernet__hw_8h.html">xaxiethernet_hw.h</a>.</pre><pre> 2.00a asa 8/29/11 A new major version of AxiEthernet driver is being
|
||||
released to accomodate the change in avb software. The
|
||||
AxiEthernet hardware v3_00_a has the latest avb
|
||||
hardware which needs a corresponding change in avb
|
||||
software (released in examples/avb folder). This change
|
||||
in avb software is not backwards compatible (which
|
||||
means this avb software will not work with older
|
||||
axiethernet hardware).
|
||||
Hence a new major version of axiethernet is being
|
||||
released.
|
||||
Added defines for Ability Reg, Identification Reg, Rx max
|
||||
Frame and Tx Max Frame registers.
|
||||
Changed define for TEMAC RGMII/SGMII Config (PHYC) Reg.</pre><pre> 3.00a asa 4/10/12 A new major version of AxiEthernet is being released to
|
||||
accomodate the change in AVB example. From AxiEthernet
|
||||
core version 3.01a onwards the AVB implementation has
|
||||
changed. The AVB module is now a part of AxiEthernet IP.
|
||||
Because of this change, the AVB example works only
|
||||
when promiscuous mode is not enabled (unlike earlier
|
||||
implementation where promiscuous mode was required for
|
||||
AVB example to work). Hence the file xavb_example.c is
|
||||
changed so that the core is not put in promiscuous mode.
|
||||
Also since AVB is a part of AxiEthernet some of the
|
||||
register mappings in xavb_hw.h has changed.
|
||||
These changes are not backward compatible which means
|
||||
this changed example will not work for previous versions
|
||||
of cores.
|
||||
Hence a new major version of axiethernet is being
|
||||
released.
|
||||
3.01a srt 02/03/13 - Added support for SGMII mode (CR 676793)</p><ul>
|
||||
<li>Added support for IPI designs (CR 698249)
|
||||
02/14/13 - Added support for Zynq (CR 681136)
|
||||
3.02a srt 04/13/13 - Removed Warnings (CR 704998).
|
||||
04/24/13 - Modified parameter *_SGMII_PHYADDR to *_PHYADDR, the
|
||||
config parameter C_PHYADDR applies to SGMII/1000BaseX
|
||||
modes of operation
|
||||
04/24/13 - Added support for 1000BaseX mode in examples (_util.c)
|
||||
(CR 704195)
|
||||
04/24/13 - Added support for RGMII mode in examples (_util.c)
|
||||
3.02a srt 08/06/13 - Fixed CR 727634:
|
||||
Modified FifoHandler() function logic of FIFO
|
||||
interrupt example to reflect the bit changes in
|
||||
the Interrupt Status Register as per the latest
|
||||
AXI FIFO stream IP.</li>
|
||||
<li>Fixed CR 721141:
|
||||
Added support to handle multiple instances of
|
||||
AxiEthernet FIFO interface (CR 721141)</li>
|
||||
<li>Fixed CR 717949:
|
||||
Configures external Marvel 88E1111 PHY based on the
|
||||
AXI Ethernet physical interface type and allows to
|
||||
operate in specific interface mode without changing
|
||||
jumpers on the Microblaze boards. This change is in
|
||||
example_util.c
|
||||
3.02a adk 15/11/13 - Fixed CR 761035 removed dependency with fifo in MDD file
|
||||
4.0 adk 19/12/13 - Updated as per the New Tcl API's
|
||||
asa 30/01/14 - Added defines for 1588 registers and bit masks
|
||||
Added config parameter for SGMII over LVDS</li>
|
||||
</ul>
|
||||
</pre><pre> 4.1 adk 21/04/14 - Fixed CR:780537 Changes are Made in the file
|
||||
axiethernet test-app tcl
|
||||
4.2 adk 08/08/14 - Fixed CR:810643 SDK generated 'xparamters.h' erroneously
|
||||
generated with errors due to part of '#define' misplaced
|
||||
changes are made in the driver tcl file.
|
||||
4.3 adk 29/10/14 - Added support for generating parameters for SGMII/1000BaseX
|
||||
modes When IP is configured with the PCS/PMA core.
|
||||
Changes are made in the driver tcl file (CR 828796).
|
||||
4.4 adk 8/1/15 - Fixed TCL errors when axiethernet is configured with the
|
||||
Axi stream fifo (CR 835605). Changes are made in the
|
||||
driver tcl file.
|
||||
5.0 adk 13/06/15 - Updated the driver tcl for Hier IP(To support User parameters).
|
||||
5.0 adk 28/07/15 - Fixed CR:870631 AXI Ethernet with FIFO will fail to
|
||||
Create the BSP if the interrupt pin on the FIFO is unconnected
|
||||
</pre> </div></div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
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<div class="textblock">Here is a list of all modules:</div><div class="directory">
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<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><a class="el" href="group__axiethernet__v5__0.html" target="_self">Axiethernet_v5_0</a></td><td class="desc">The APIs in this file takes care of the primary functionalities of the driver </td></tr>
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140
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/struct_x_axi_ethernet.html
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<div class="title">XAxiEthernet Struct Reference<div class="ingroups"><a class="el" href="group__axiethernet__v5__0.html">Axiethernet_v5_0</a></div></div> </div>
|
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<div class="contents">
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
||||
<div class="textblock"><p>The calling code is required to use a unique instance of this structure for every Axi Ethernet device used in the system. A reference to a structure of this type is then passed to the driver API functions. </p>
|
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</div><h2 class="groupheader">Field Documentation</h2>
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<a class="anchor" id="adda2f024038f99905bb2ca8ab85854eb"></a>
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<td class="memname"><a class="el" href="struct_x_axi_ethernet___config.html">XAxiEthernet_Config</a> XAxiEthernet::Config</td>
|
||||
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||||
</div><div class="memdoc">
|
||||
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||||
<p>Hardware configuration. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">XAxiEthernet_AddExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90">XAxiEthernet_CfgInitialize()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaab45f6c7a4440bc3f58d4ff971e6be7b">XAxiEthernet_ClearBadFrmRcvOption()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">XAxiEthernet_ClearExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">XAxiEthernet_ClearTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga41049ca22799d42d1279461be627c72e">XAxiEthernet_DisableControlFrameLenCheck()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga08b7db7c5a837de18afceb58230351b3">XAxiEthernet_DumpExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga8b71bcdc8be6ae5d6364c59ea0f53aab">XAxiEthernet_EnableControlFrameLenCheck()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga6932bd79a08811085a47ad1357a4ef89">XAxiEthernet_GetExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaa5b70a456ac18505132f61f596428ab7">XAxiEthernet_GetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga369290833088c56abf0a967f16233266">XAxiEthernet_GetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga8e8caa9c4ac753744bd08ebf103877c3">XAxiEthernet_GetOperatingSpeed()</a>, <a class="el" href="group__axiethernet__v5__0.html#gade4816d9067e13fbac2ceb66cf32360d">XAxiEthernet_GetRgmiiStatus()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab7d57eaf1bb97c34a92cc5e2c8600075">XAxiEthernet_GetSgmiiStatus()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga498bdb032a67313102ac7dee10ae8e7e">XAxiEthernet_GetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab13721145a4632d987bd858483c00011">XAxiEthernet_GetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#gafb2a0cbe2263410d25caa0e87428a6d7">XAxiEthernet_GetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga9d375eb39bb3a8f724123aa9a9585e47">XAxiEthernet_GetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga00d242e51aeec92bf07528bbf58709ea">XAxiEthernet_GetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">XAxiEthernet_MulticastAdd()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">XAxiEthernet_MulticastClear()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac95ba7bcd0c537eec1787f5ea49488df">XAxiEthernet_MulticastGet()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6">XAxiEthernet_PhySetMdioDivisor()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">XAxiEthernet_Reset()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">XAxiEthernet_SendPausePacket()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga3db57c4a261afc854985297afed2373b">XAxiEthernet_SetBadFrmRcvOption()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">XAxiEthernet_SetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">XAxiEthernet_SetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9">XAxiEthernet_SetOperatingSpeed()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">XAxiEthernet_SetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">XAxiEthernet_SetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">XAxiEthernet_SetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">XAxiEthernet_SetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">XAxiEthernet_SetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start()</a>, and <a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">XAxiEthernet_Stop()</a>.</p>
|
||||
|
||||
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|
||||
</div>
|
||||
<a class="anchor" id="adebe741501e7c32e56ea5f4b62f6c125"></a>
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||||
<div class="memitem">
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||||
<td class="memname">u32 XAxiEthernet::Flags</td>
|
||||
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||||
</table>
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||||
</div><div class="memdoc">
|
||||
|
||||
<p>Internal driver flags. </p>
|
||||
|
||||
</div>
|
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</div>
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||||
<a class="anchor" id="a36f21814635085cc6476a7cb835e4c34"></a>
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<div class="memitem">
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<td class="memname">u32 XAxiEthernet::IsReady</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Device is initialized and ready. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">XAxiEthernet_AddExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90">XAxiEthernet_CfgInitialize()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">XAxiEthernet_ClearExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">XAxiEthernet_ClearTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga6932bd79a08811085a47ad1357a4ef89">XAxiEthernet_GetExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaa5b70a456ac18505132f61f596428ab7">XAxiEthernet_GetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga369290833088c56abf0a967f16233266">XAxiEthernet_GetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga8e8caa9c4ac753744bd08ebf103877c3">XAxiEthernet_GetOperatingSpeed()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaf48b8f321b842bfb139b473ad7185874">XAxiEthernet_GetOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#gade4816d9067e13fbac2ceb66cf32360d">XAxiEthernet_GetRgmiiStatus()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab7d57eaf1bb97c34a92cc5e2c8600075">XAxiEthernet_GetSgmiiStatus()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga498bdb032a67313102ac7dee10ae8e7e">XAxiEthernet_GetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab13721145a4632d987bd858483c00011">XAxiEthernet_GetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#gafb2a0cbe2263410d25caa0e87428a6d7">XAxiEthernet_GetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga9d375eb39bb3a8f724123aa9a9585e47">XAxiEthernet_GetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga00d242e51aeec92bf07528bbf58709ea">XAxiEthernet_GetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">XAxiEthernet_MulticastAdd()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">XAxiEthernet_MulticastClear()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac95ba7bcd0c537eec1787f5ea49488df">XAxiEthernet_MulticastGet()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6">XAxiEthernet_PhySetMdioDivisor()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">XAxiEthernet_Reset()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">XAxiEthernet_SendPausePacket()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">XAxiEthernet_SetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">XAxiEthernet_SetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9">XAxiEthernet_SetOperatingSpeed()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">XAxiEthernet_SetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">XAxiEthernet_SetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">XAxiEthernet_SetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">XAxiEthernet_SetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">XAxiEthernet_SetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start()</a>, and <a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">XAxiEthernet_Stop()</a>.</p>
|
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<a class="anchor" id="a7a1dcb16fe62fb0f570ec6e13bd78958"></a>
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<td class="memname">u32 XAxiEthernet::IsStarted</td>
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</div><div class="memdoc">
|
||||
|
||||
<p>Device is currently started. </p>
|
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|
||||
<p>Referenced by <a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">XAxiEthernet_AddExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">XAxiEthernet_ClearExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">XAxiEthernet_ClearTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">XAxiEthernet_MulticastAdd()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">XAxiEthernet_MulticastClear()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">XAxiEthernet_SendPausePacket()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">XAxiEthernet_SetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">XAxiEthernet_SetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">XAxiEthernet_SetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">XAxiEthernet_SetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">XAxiEthernet_SetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">XAxiEthernet_SetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">XAxiEthernet_SetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start()</a>, and <a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">XAxiEthernet_Stop()</a>.</p>
|
||||
|
||||
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|
||||
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<td class="memname">u32 XAxiEthernet::Options</td>
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||||
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|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Current options word. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaf48b8f321b842bfb139b473ad7185874">XAxiEthernet_GetOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">XAxiEthernet_Reset()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions()</a>, and <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start()</a>.</p>
|
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="headertitle">
|
||||
<div class="title">XAxiEthernet_Config Struct Reference<div class="ingroups"><a class="el" href="group__axiethernet__v5__0.html">Axiethernet_v5_0</a></div></div> </div>
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<div class="contents">
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
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Data Fields</h2></td></tr>
|
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<tr class="memitem:a80c732270af2737df3ebed73fd28c630"><td class="memItemLeft" align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_ethernet___config.html#a80c732270af2737df3ebed73fd28c630">TemacType</a></td></tr>
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<tr class="separator:a80c732270af2737df3ebed73fd28c630"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h2 class="groupheader">Field Documentation</h2>
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<a class="anchor" id="a7413799b4caffd89c43aba985e5e79f9"></a>
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<div class="memproto">
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||||
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<td class="memname">u8 XAxiEthernet_Config::Avb</td>
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||||
</div><div class="memdoc">
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||||
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||||
<p>Avb option. </p>
|
||||
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||||
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<a class="anchor" id="a444f9516f617d023dae367c84c989946"></a>
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<td class="memname">u32 XAxiEthernet_Config::AxiDevBaseAddress</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>AxiDevBaseAddress is the base address of the device attached to the Axi Ethernet's AXI4-Stream interface. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a58df9c31ad87109bd294fb26a8af9630"></a>
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||||
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||||
<div class="memproto">
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||||
<tr>
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||||
<td class="memname">int XAxiEthernet_Config::AxiDevType</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>AxiDevType is the type of device attached to the Axi Ethernet's AXI4-Stream interface. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="abc5e20aa42c6e50b6ecf9a5d6a10871f"></a>
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||||
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||||
<div class="memproto">
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||||
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||||
<td class="memname">u8 XAxiEthernet_Config::AxiDmaRxIntr</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Axi DMA RX interrupt ID (unused if FIFO) </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a8f3e9c24d55f2867bbc152922a645b9e"></a>
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||||
<div class="memitem">
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||||
<div class="memproto">
|
||||
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||||
<tr>
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||||
<td class="memname">u8 XAxiEthernet_Config::AxiDmaTxIntr</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Axi DMA TX interrupt ID (unused if FIFO) </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="af31660d94a9387980b5288dd86c136a8"></a>
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||||
<div class="memitem">
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||||
<div class="memproto">
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||||
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|
||||
<tr>
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<td class="memname">u8 XAxiEthernet_Config::AxiFifoIntr</td>
|
||||
</tr>
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||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>AxiFifoIntr interrupt ID (unused if DMA) </p>
|
||||
|
||||
</div>
|
||||
</div>
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||||
<a class="anchor" id="a227cd48d8ffc0fc86c735c91a1f1d590"></a>
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||||
<div class="memitem">
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||||
<div class="memproto">
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||||
<table class="memname">
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||||
<tr>
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||||
<td class="memname">u32 XAxiEthernet_Config::BaseAddress</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>BaseAddress is the physical base address of the device's registers. </p>
|
||||
|
||||
<p>Referenced by <a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">XAxiEthernet_AddExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90">XAxiEthernet_CfgInitialize()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaab45f6c7a4440bc3f58d4ff971e6be7b">XAxiEthernet_ClearBadFrmRcvOption()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">XAxiEthernet_ClearExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">XAxiEthernet_ClearTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga41049ca22799d42d1279461be627c72e">XAxiEthernet_DisableControlFrameLenCheck()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga08b7db7c5a837de18afceb58230351b3">XAxiEthernet_DumpExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga8b71bcdc8be6ae5d6364c59ea0f53aab">XAxiEthernet_EnableControlFrameLenCheck()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga6932bd79a08811085a47ad1357a4ef89">XAxiEthernet_GetExtMulticastGroup()</a>, <a class="el" href="group__axiethernet__v5__0.html#gaa5b70a456ac18505132f61f596428ab7">XAxiEthernet_GetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga369290833088c56abf0a967f16233266">XAxiEthernet_GetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga8e8caa9c4ac753744bd08ebf103877c3">XAxiEthernet_GetOperatingSpeed()</a>, <a class="el" href="group__axiethernet__v5__0.html#gade4816d9067e13fbac2ceb66cf32360d">XAxiEthernet_GetRgmiiStatus()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab7d57eaf1bb97c34a92cc5e2c8600075">XAxiEthernet_GetSgmiiStatus()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga498bdb032a67313102ac7dee10ae8e7e">XAxiEthernet_GetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab13721145a4632d987bd858483c00011">XAxiEthernet_GetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#gafb2a0cbe2263410d25caa0e87428a6d7">XAxiEthernet_GetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga9d375eb39bb3a8f724123aa9a9585e47">XAxiEthernet_GetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga00d242e51aeec92bf07528bbf58709ea">XAxiEthernet_GetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">XAxiEthernet_MulticastAdd()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">XAxiEthernet_MulticastClear()</a>, <a class="el" href="group__axiethernet__v5__0.html#gac95ba7bcd0c537eec1787f5ea49488df">XAxiEthernet_MulticastGet()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6">XAxiEthernet_PhySetMdioDivisor()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">XAxiEthernet_Reset()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">XAxiEthernet_SendPausePacket()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga3db57c4a261afc854985297afed2373b">XAxiEthernet_SetBadFrmRcvOption()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">XAxiEthernet_SetMacAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">XAxiEthernet_SetMacPauseAddress()</a>, <a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9">XAxiEthernet_SetOperatingSpeed()</a>, <a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">XAxiEthernet_SetTpid()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">XAxiEthernet_SetVidTable()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">XAxiEthernet_SetVStripMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">XAxiEthernet_SetVTagMode()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">XAxiEthernet_SetVTagValue()</a>, <a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start()</a>, and <a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">XAxiEthernet_Stop()</a>.</p>
|
||||
|
||||
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|
||||
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||||
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<td class="memname">u16 XAxiEthernet_Config::DeviceId</td>
|
||||
</tr>
|
||||
</table>
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||||
</div><div class="memdoc">
|
||||
|
||||
<p>DeviceId is the unique ID of the device. </p>
|
||||
|
||||
</div>
|
||||
</div>
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||||
<a class="anchor" id="a4fabde2681b16e5d8b314d4d3eb8b496"></a>
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<td class="memname">u8 XAxiEthernet_Config::EnableSgmiiOverLvds</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Enable LVDS option. </p>
|
||||
|
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||||
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<a class="anchor" id="af57dac13f3ab7814f417d8fbc7863f10"></a>
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||||
<td class="memname">u8 XAxiEthernet_Config::ExtMcast</td>
|
||||
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|
||||
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|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Extend multicast indication. </p>
|
||||
|
||||
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|
||||
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||||
<a class="anchor" id="aa1e84825e2de8a79bed03619d6acecfa"></a>
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<td class="memname">u8 XAxiEthernet_Config::PhyType</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>PhyType indicates which type of PHY interface is used (MII, GMII, RGMII, etc. </p>
|
||||
|
||||
</div>
|
||||
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|
||||
<a class="anchor" id="add9dfe4169f1812e6a442507d33d8ad6"></a>
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<td class="memname">u8 XAxiEthernet_Config::RxCsum</td>
|
||||
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||||
</table>
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||||
</div><div class="memdoc">
|
||||
|
||||
<p>RxCsum indicates that the device has checksum offload on the Rx channel or not. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a4e2b86637eb13ac65e7cbc42e6d5ad1a"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::RxVlanStrp</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>RX VLAN stripping indication. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a337886aa86b2bb17992b4679f1f346c8"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::RxVlanTag</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>RX VLAN tagging indication. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a7acfb6bb40497766e396671f39e3624c"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::RxVlanTran</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>RX VLAN Translation indication. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="aedf2130b6fe42d536313f334de21256a"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::Stats</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Statistics gathering option. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a9fccedcffde8615cf4f23d95e7702600"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::TemacIntr</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Axi Ethernet interrupt ID. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a80c732270af2737df3ebed73fd28c630"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::TemacType</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>Temac Type can have 3 possible values. </p>
|
||||
<p>They are 0 for SoftTemac at 10/100 Mbps, 1 for SoftTemac at 10/100/1000 Mbps and 2 for Vitex6 Hard Temac </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a2139dd5ce6832f0ae9211dd5fa759178"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::TxCsum</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>TxCsum indicates that the device has checksum offload on the Tx channel or not. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a3d9add2497a3896d1b4b53beb46bea30"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::TxVlanStrp</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>TX VLAN stripping indication. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a4458731e2bc3fcbf5d88199971bf8330"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::TxVlanTag</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>TX VLAN tagging indication. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
<a class="anchor" id="a938f96ffecf9cbdb5cce6991fb120db4"></a>
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 XAxiEthernet_Config::TxVlanTran</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div><div class="memdoc">
|
||||
|
||||
<p>TX VLAN Translation indication. </p>
|
||||
|
||||
</div>
|
||||
</div>
|
||||
</div><!-- contents -->
|
||||
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
|
||||
<ul>
|
||||
<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
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XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/xaxiethernet_8c.html
Executable file
95
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/xaxiethernet_8c.html
Executable file
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<head>
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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|
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<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
||||
<li><a href="globals.html"><span>APIs</span></a></li>
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<li><a href="files.html"><span>File List</span></a></li>
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<ul>
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_1ff0eac5fa99cf4a993b122112036ce1.html">axiethernet</a></li><li class="navelem"><a class="el" href="dir_d5bafecaac8ef1b6802342c4ed874229.html">src</a></li> </ul>
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|
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<a href="#func-members">Functions</a> </div>
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|
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<div class="title">xaxiethernet.c File Reference</div> </div>
|
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<table class="memberdecls">
|
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
|
||||
<tr class="memitem:ga73871df4ff59ae908c63c51db94f1a90"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90">XAxiEthernet_CfgInitialize</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, <a class="el" href="struct_x_axi_ethernet___config.html">XAxiEthernet_Config</a> *CfgPtr, u32 EffectiveAddress)</td></tr>
|
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<tr class="separator:ga73871df4ff59ae908c63c51db94f1a90"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2cfa48d42e55238f6f30aff6d658e4fe"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga2cfa48d42e55238f6f30aff6d658e4fe"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga4e952a55f342f176ba9ec2b49e2e47cb"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">XAxiEthernet_Stop</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga4e952a55f342f176ba9ec2b49e2e47cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga091a291d11f394e3eaf0b79195666d9f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">XAxiEthernet_Reset</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga091a291d11f394e3eaf0b79195666d9f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab2298b2b1af89cf0f0a78d4fda03ed7f"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">XAxiEthernet_SetMacAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
||||
<tr class="separator:gab2298b2b1af89cf0f0a78d4fda03ed7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaa5b70a456ac18505132f61f596428ab7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaa5b70a456ac18505132f61f596428ab7">XAxiEthernet_GetMacAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
||||
<tr class="separator:gaa5b70a456ac18505132f61f596428ab7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae3265620b9d9b86643abe5ff5e2b7d79"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Options)</td></tr>
|
||||
<tr class="separator:gae3265620b9d9b86643abe5ff5e2b7d79"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad3e7253d626c02a96ac35f981ac11ba2"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Options)</td></tr>
|
||||
<tr class="separator:gad3e7253d626c02a96ac35f981ac11ba2"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaf48b8f321b842bfb139b473ad7185874"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaf48b8f321b842bfb139b473ad7185874">XAxiEthernet_GetOptions</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:gaf48b8f321b842bfb139b473ad7185874"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga8e8caa9c4ac753744bd08ebf103877c3"><td class="memItemLeft" align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga8e8caa9c4ac753744bd08ebf103877c3">XAxiEthernet_GetOperatingSpeed</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga8e8caa9c4ac753744bd08ebf103877c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab2d0106f26a1a2e1f2b902dc0a2822c9"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9">XAxiEthernet_SetOperatingSpeed</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 Speed)</td></tr>
|
||||
<tr class="separator:gab2d0106f26a1a2e1f2b902dc0a2822c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga3db57c4a261afc854985297afed2373b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga3db57c4a261afc854985297afed2373b">XAxiEthernet_SetBadFrmRcvOption</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga3db57c4a261afc854985297afed2373b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaab45f6c7a4440bc3f58d4ff971e6be7b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaab45f6c7a4440bc3f58d4ff971e6be7b">XAxiEthernet_ClearBadFrmRcvOption</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:gaab45f6c7a4440bc3f58d4ff971e6be7b"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga41049ca22799d42d1279461be627c72e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga41049ca22799d42d1279461be627c72e">XAxiEthernet_DisableControlFrameLenCheck</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
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<tr class="separator:ga41049ca22799d42d1279461be627c72e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8b71bcdc8be6ae5d6364c59ea0f53aab"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga8b71bcdc8be6ae5d6364c59ea0f53aab">XAxiEthernet_EnableControlFrameLenCheck</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
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<tr class="separator:ga8b71bcdc8be6ae5d6364c59ea0f53aab"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga2b33bc77237bf039c02d4619a811aed6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6">XAxiEthernet_PhySetMdioDivisor</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 Divisor)</td></tr>
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<tr class="separator:ga2b33bc77237bf039c02d4619a811aed6"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div><!-- contents -->
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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<li class="footer">Copyright © 2015 Xilinx Inc. All rights reserved.</li>
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</body>
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</html>
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256
XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/xaxiethernet_8h.html
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<div id="projectname">axiethernet
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</div>
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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</td>
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_1ff0eac5fa99cf4a993b122112036ce1.html">axiethernet</a></li><li class="navelem"><a class="el" href="dir_d5bafecaac8ef1b6802342c4ed874229.html">src</a></li> </ul>
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<a href="#func-members">Functions</a> </div>
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<div class="title">xaxiethernet.h File Reference</div> </div>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
|
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_ethernet___config.html">XAxiEthernet_Config</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a></td></tr>
|
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
|
||||
<tr class="memitem:ga6c513f6bb939a705f56da5c826d9ec63"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6c513f6bb939a705f56da5c826d9ec63">XAxiEthernet_IsStarted</a>(InstancePtr)   (((InstancePtr)->IsStarted == XIL_COMPONENT_IS_STARTED) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga6c513f6bb939a705f56da5c826d9ec63"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga6fa193e8b9cf3c2807d328829903bf6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6fa193e8b9cf3c2807d328829903bf6c">XAxiEthernet_IsDma</a>(InstancePtr)   (((InstancePtr)->Config.AxiDevType == XPAR_AXI_DMA) ? TRUE: FALSE)</td></tr>
|
||||
<tr class="separator:ga6fa193e8b9cf3c2807d328829903bf6c"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaaedd2fe4a2b3d24152c3f32160e8f994"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaaedd2fe4a2b3d24152c3f32160e8f994">XAxiEthernet_IsFifo</a>(InstancePtr)   (((InstancePtr)->Config.AxiDevType == XPAR_AXI_FIFO) ? TRUE: FALSE)</td></tr>
|
||||
<tr class="separator:gaaedd2fe4a2b3d24152c3f32160e8f994"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gace643555d4c75d40b1ddee9dbd814a74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gace643555d4c75d40b1ddee9dbd814a74">XAxiEthernet_AxiDevBaseAddress</a>(InstancePtr)   ((InstancePtr)->Config.AxiDevBaseAddress)</td></tr>
|
||||
<tr class="separator:gace643555d4c75d40b1ddee9dbd814a74"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae5c91a283a8b79c5e0735588ed8064ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gae5c91a283a8b79c5e0735588ed8064ec">XAxiEthernet_IsRecvFrameDropped</a>(InstancePtr)</td></tr>
|
||||
<tr class="separator:gae5c91a283a8b79c5e0735588ed8064ec"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga310edb175e98c8e42fd2ad7d0c89318f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga310edb175e98c8e42fd2ad7d0c89318f">XAxiEthernet_IsRxPartialCsum</a>(InstancePtr)    ((((InstancePtr)->Config.RxCsum) == 0x01) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga310edb175e98c8e42fd2ad7d0c89318f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga6e44788bbc239e6cea83d1e07ddb65ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6e44788bbc239e6cea83d1e07ddb65ed">XAxiEthernet_IsTxPartialCsum</a>(InstancePtr)   ((((InstancePtr)->Config.TxCsum) == 0x01) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga6e44788bbc239e6cea83d1e07ddb65ed"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gafada00dabb696100996b896e83d6c2bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gafada00dabb696100996b896e83d6c2bd">XAxiEthernet_IsRxFullCsum</a>(InstancePtr)    ((((InstancePtr)->Config.RxCsum) == 0x02) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:gafada00dabb696100996b896e83d6c2bd"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga8d1defd403ed40f023650e1e44651c88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga8d1defd403ed40f023650e1e44651c88">XAxiEthernet_IsTxFullCsum</a>(InstancePtr)   ((((InstancePtr)->Config.TxCsum) == 0x02) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga8d1defd403ed40f023650e1e44651c88"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gac94a4ec88dd7b33f7c2e1366c6313d53"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac94a4ec88dd7b33f7c2e1366c6313d53">XAxiEthernet_GetPhysicalInterface</a>(InstancePtr)    ((InstancePtr)->Config.PhyType)</td></tr>
|
||||
<tr class="separator:gac94a4ec88dd7b33f7c2e1366c6313d53"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga56664c785ad43b4458a1109d3a5b3bc5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga56664c785ad43b4458a1109d3a5b3bc5">XAxiEthernet_GetIntStatus</a>(InstancePtr)   <a class="el" href="group__axiethernet__v5__0.html#ga136faa5126867cb31bb12cec43fb20a2">XAxiEthernet_ReadReg</a>((InstancePtr)->Config.BaseAddress, <a class="el" href="group__axiethernet__v5__0.html#ga03ae297b3ba90f6f4b7ebe468519e55a">XAE_IS_OFFSET</a>)</td></tr>
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||||
<tr class="separator:ga56664c785ad43b4458a1109d3a5b3bc5"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gab5476b0e04b0ecd8f9fd027f90ea648f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab5476b0e04b0ecd8f9fd027f90ea648f">XAxiEthernet_IntEnable</a>(InstancePtr, Mask)</td></tr>
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||||
<tr class="separator:gab5476b0e04b0ecd8f9fd027f90ea648f"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6357e97582bc0e064c5b169d212e41df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6357e97582bc0e064c5b169d212e41df">XAxiEthernet_IntDisable</a>(InstancePtr, Mask)</td></tr>
|
||||
<tr class="separator:ga6357e97582bc0e064c5b169d212e41df"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga492b674e8d7584ed5e73e2b1a886bcc3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga492b674e8d7584ed5e73e2b1a886bcc3">XAxiEthernet_IntPending</a>(InstancePtr)   <a class="el" href="group__axiethernet__v5__0.html#ga136faa5126867cb31bb12cec43fb20a2">XAxiEthernet_ReadReg</a>((InstancePtr)->Config.BaseAddress, <a class="el" href="group__axiethernet__v5__0.html#ga2479ff05e515d76dd37d9f179026d038">XAE_IP_OFFSET</a>)</td></tr>
|
||||
<tr class="separator:ga492b674e8d7584ed5e73e2b1a886bcc3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaaaef83a7f1fe4d8ca117cf6bc80500a8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaaaef83a7f1fe4d8ca117cf6bc80500a8">XAxiEthernet_IntClear</a>(InstancePtr, Mask)</td></tr>
|
||||
<tr class="separator:gaaaef83a7f1fe4d8ca117cf6bc80500a8"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga51c2a30cc98f11355ce3639139b41d8a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga51c2a30cc98f11355ce3639139b41d8a">XAxiEthernet_IsExtFuncCap</a>(InstancePtr)</td></tr>
|
||||
<tr class="separator:ga51c2a30cc98f11355ce3639139b41d8a"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab62015adb15bebd496a5346e3877af55"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab62015adb15bebd496a5346e3877af55">XAxiEthernet_IsExtMcastEnable</a>(InstancePtr)</td></tr>
|
||||
<tr class="separator:gab62015adb15bebd496a5346e3877af55"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga751c51d9ed918ca9dd556d98187eb76e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga751c51d9ed918ca9dd556d98187eb76e">XAxiEthernet_IsExtMcast</a>(InstancePtr)   (((InstancePtr)->Config.ExtMcast) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga751c51d9ed918ca9dd556d98187eb76e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga92ea2563addd13a5d3008a0bd9d069bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga92ea2563addd13a5d3008a0bd9d069bc">XAxiEthernet_IsTxVlanStrp</a>(InstancePtr)   (((InstancePtr)->Config.TxVlanStrp) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga92ea2563addd13a5d3008a0bd9d069bc"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga4764b3156c37e0b505c4df69b105b770"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga4764b3156c37e0b505c4df69b105b770">XAxiEthernet_IsRxVlanStrp</a>(InstancePtr)   (((InstancePtr)->Config.RxVlanStrp) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga4764b3156c37e0b505c4df69b105b770"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaac1bbeb5294915665aae439a33e3b887"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaac1bbeb5294915665aae439a33e3b887">XAxiEthernet_IsTxVlanTran</a>(InstancePtr)   (((InstancePtr)->Config.TxVlanTran) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:gaac1bbeb5294915665aae439a33e3b887"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga04ad5f292476ee8d62a2cacc66bf8767"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga04ad5f292476ee8d62a2cacc66bf8767">XAxiEthernet_IsRxVlanTran</a>(InstancePtr)   (((InstancePtr)->Config.RxVlanTran) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga04ad5f292476ee8d62a2cacc66bf8767"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2d75475a1e85f44562fd614960744b23"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2d75475a1e85f44562fd614960744b23">XAxiEthernet_IsTxVlanTag</a>(InstancePtr)   (((InstancePtr)->Config.TxVlanTag) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga2d75475a1e85f44562fd614960744b23"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga16debcb3a008c09bc8c4e29764310cae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga16debcb3a008c09bc8c4e29764310cae">XAxiEthernet_IsRxVlanTag</a>(InstancePtr)   (((InstancePtr)->Config.RxVlanTag) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga16debcb3a008c09bc8c4e29764310cae"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga6ee4e2b95cc8d84e227f51e28ff07901"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6ee4e2b95cc8d84e227f51e28ff07901">XAxiEthernet_GetTemacType</a>(InstancePtr)   ((InstancePtr)->Config.TemacType)</td></tr>
|
||||
<tr class="separator:ga6ee4e2b95cc8d84e227f51e28ff07901"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaa09f91114abaefee6e94e8a5f48923e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaa09f91114abaefee6e94e8a5f48923e7">XAxiEthernet_IsAvbConfigured</a>(InstancePtr)   (((InstancePtr)->Config.Avb) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:gaa09f91114abaefee6e94e8a5f48923e7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaf20d2f840ee7c6defacb6e1a478b38a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaf20d2f840ee7c6defacb6e1a478b38a7">XAxiEthernet_IsSgmiiOverLvdsEnabled</a>(InstancePtr)   (((InstancePtr)->Config.EnableSgmiiOverLvds) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:gaf20d2f840ee7c6defacb6e1a478b38a7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2e75a48d11c00b0c39339bd2f2461bdc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2e75a48d11c00b0c39339bd2f2461bdc">XAxiEthernet_IsStatsConfigured</a>(InstancePtr)   (((InstancePtr)->Config.Stats) ? TRUE : FALSE)</td></tr>
|
||||
<tr class="separator:ga2e75a48d11c00b0c39339bd2f2461bdc"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Configuration options</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>The following are device configuration options.</p>
|
||||
<p>See the <em>XAxiEthernet_SetOptions</em>, <em>XAxiEthernet_ClearOptions</em> and <em>XAxiEthernet_GetOptions</em> routines for information on how to use options.</p>
|
||||
<p>The default state of the options are also noted below. </p>
|
||||
</div></td></tr>
|
||||
<tr class="memitem:ga85d541107aad56649d63d548813e1091"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga85d541107aad56649d63d548813e1091">XAE_PROMISC_OPTION</a>   0x00000001</td></tr>
|
||||
<tr class="separator:ga85d541107aad56649d63d548813e1091"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga0c81a1ba1412a469773217a168902aa2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga0c81a1ba1412a469773217a168902aa2">XAE_JUMBO_OPTION</a>   0x00000002</td></tr>
|
||||
<tr class="separator:ga0c81a1ba1412a469773217a168902aa2"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaaacd508700a0767d156cf47e71e1ea76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaaacd508700a0767d156cf47e71e1ea76">XAE_VLAN_OPTION</a>   0x00000004</td></tr>
|
||||
<tr class="separator:gaaacd508700a0767d156cf47e71e1ea76"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gace9786d16960daabfdb803388b4ff0f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gace9786d16960daabfdb803388b4ff0f3">XAE_FLOW_CONTROL_OPTION</a>   0x00000008</td></tr>
|
||||
<tr class="separator:gace9786d16960daabfdb803388b4ff0f3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae274295c74b82214342722ee5b5d9392"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gae274295c74b82214342722ee5b5d9392">XAE_FCS_STRIP_OPTION</a>   0x00000010</td></tr>
|
||||
<tr class="separator:gae274295c74b82214342722ee5b5d9392"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga9b828349795f783755ab6fd9413f6ff9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga9b828349795f783755ab6fd9413f6ff9">XAE_FCS_INSERT_OPTION</a>   0x00000020</td></tr>
|
||||
<tr class="separator:ga9b828349795f783755ab6fd9413f6ff9"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga7f163c38fd07679c8a358c843a52f19e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga7f163c38fd07679c8a358c843a52f19e">XAE_LENTYPE_ERR_OPTION</a>   0x00000040</td></tr>
|
||||
<tr class="separator:ga7f163c38fd07679c8a358c843a52f19e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1e81b6f5f677ed0370507c117b565b20"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga1e81b6f5f677ed0370507c117b565b20">XAE_TRANSMITTER_ENABLE_OPTION</a>   0x00000080</td></tr>
|
||||
<tr class="separator:ga1e81b6f5f677ed0370507c117b565b20"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga027d60f8fd28b519cad51e450b71c07b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga027d60f8fd28b519cad51e450b71c07b">XAE_RECEIVER_ENABLE_OPTION</a>   0x00000100</td></tr>
|
||||
<tr class="separator:ga027d60f8fd28b519cad51e450b71c07b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaed55b7962f8aab228e2c41be4154a834"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaed55b7962f8aab228e2c41be4154a834">XAE_BROADCAST_OPTION</a>   0x00000200</td></tr>
|
||||
<tr class="separator:gaed55b7962f8aab228e2c41be4154a834"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gabf6e17b27602db32c134aaf5afdd33dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gabf6e17b27602db32c134aaf5afdd33dd">XAE_MULTICAST_OPTION</a>   0x00000400</td></tr>
|
||||
<tr class="separator:gabf6e17b27602db32c134aaf5afdd33dd"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga200a4ee26fb655cce6de8edc7a3cc6b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga200a4ee26fb655cce6de8edc7a3cc6b9">XAE_EXT_MULTICAST_OPTION</a>   0x00000800</td></tr>
|
||||
<tr class="separator:ga200a4ee26fb655cce6de8edc7a3cc6b9"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaa8451191982023f578cda79fca48b190"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaa8451191982023f578cda79fca48b190">XAE_EXT_TXVLAN_TRAN_OPTION</a>   0x00001000</td></tr>
|
||||
<tr class="separator:gaa8451191982023f578cda79fca48b190"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga1cef34ccc21b501cf2f5d0efe22392bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga1cef34ccc21b501cf2f5d0efe22392bd">XAE_EXT_RXVLAN_TRAN_OPTION</a>   0x00002000</td></tr>
|
||||
<tr class="separator:ga1cef34ccc21b501cf2f5d0efe22392bd"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab4a430ee8f463578c6d55f527a56cd0b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab4a430ee8f463578c6d55f527a56cd0b">XAE_EXT_TXVLAN_TAG_OPTION</a>   0x00004000</td></tr>
|
||||
<tr class="separator:gab4a430ee8f463578c6d55f527a56cd0b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gafd0f2f2b21a02e3b8c8a11a86085c0c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gafd0f2f2b21a02e3b8c8a11a86085c0c4">XAE_EXT_RXVLAN_TAG_OPTION</a>   0x00008000</td></tr>
|
||||
<tr class="separator:gafd0f2f2b21a02e3b8c8a11a86085c0c4"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2957a816e7ff90ff5d53bfe30eb7bfec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2957a816e7ff90ff5d53bfe30eb7bfec">XAE_EXT_TXVLAN_STRP_OPTION</a>   0x00010000</td></tr>
|
||||
<tr class="separator:ga2957a816e7ff90ff5d53bfe30eb7bfec"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
</table><table class="memberdecls">
|
||||
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
|
||||
Typedefs</h2></td></tr>
|
||||
<tr class="memitem:gad8601786fc7884f68bf37c3474dddcf3"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gad8601786fc7884f68bf37c3474dddcf3">XAxiEthernet</a></td></tr>
|
||||
<tr class="separator:gad8601786fc7884f68bf37c3474dddcf3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
</table><table class="memberdecls">
|
||||
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
|
||||
Functions</h2></td></tr>
|
||||
<tr class="memitem:ga73871df4ff59ae908c63c51db94f1a90"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga73871df4ff59ae908c63c51db94f1a90">XAxiEthernet_CfgInitialize</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, <a class="el" href="struct_x_axi_ethernet___config.html">XAxiEthernet_Config</a> *CfgPtr, u32 EffectiveAddress)</td></tr>
|
||||
<tr class="separator:ga73871df4ff59ae908c63c51db94f1a90"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga2cfa48d42e55238f6f30aff6d658e4fe"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2cfa48d42e55238f6f30aff6d658e4fe">XAxiEthernet_Start</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga2cfa48d42e55238f6f30aff6d658e4fe"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga4e952a55f342f176ba9ec2b49e2e47cb"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga4e952a55f342f176ba9ec2b49e2e47cb">XAxiEthernet_Stop</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga4e952a55f342f176ba9ec2b49e2e47cb"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga091a291d11f394e3eaf0b79195666d9f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga091a291d11f394e3eaf0b79195666d9f">XAxiEthernet_Reset</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga091a291d11f394e3eaf0b79195666d9f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga781a4d89a7a3a9d59ac8921ba66b353d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_ethernet___config.html">XAxiEthernet_Config</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga781a4d89a7a3a9d59ac8921ba66b353d">XAxiEthernet_LookupConfig</a> (u16 DeviceId)</td></tr>
|
||||
<tr class="separator:ga781a4d89a7a3a9d59ac8921ba66b353d"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae3265620b9d9b86643abe5ff5e2b7d79"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gae3265620b9d9b86643abe5ff5e2b7d79">XAxiEthernet_SetOptions</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Options)</td></tr>
|
||||
<tr class="separator:gae3265620b9d9b86643abe5ff5e2b7d79"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gad3e7253d626c02a96ac35f981ac11ba2"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gad3e7253d626c02a96ac35f981ac11ba2">XAxiEthernet_ClearOptions</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Options)</td></tr>
|
||||
<tr class="separator:gad3e7253d626c02a96ac35f981ac11ba2"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaf48b8f321b842bfb139b473ad7185874"><td class="memItemLeft" align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaf48b8f321b842bfb139b473ad7185874">XAxiEthernet_GetOptions</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:gaf48b8f321b842bfb139b473ad7185874"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab2298b2b1af89cf0f0a78d4fda03ed7f"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab2298b2b1af89cf0f0a78d4fda03ed7f">XAxiEthernet_SetMacAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
||||
<tr class="separator:gab2298b2b1af89cf0f0a78d4fda03ed7f"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaa5b70a456ac18505132f61f596428ab7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaa5b70a456ac18505132f61f596428ab7">XAxiEthernet_GetMacAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
||||
<tr class="separator:gaa5b70a456ac18505132f61f596428ab7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga99c4e06d4db500ab7bf6bc20853330e2"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">XAxiEthernet_SetMacPauseAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
||||
<tr class="separator:ga99c4e06d4db500ab7bf6bc20853330e2"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga369290833088c56abf0a967f16233266"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga369290833088c56abf0a967f16233266">XAxiEthernet_GetMacPauseAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
||||
<tr class="separator:ga369290833088c56abf0a967f16233266"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae513f052386deaf8c5994b768f9647ce"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">XAxiEthernet_SendPausePacket</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 PauseValue)</td></tr>
|
||||
<tr class="separator:gae513f052386deaf8c5994b768f9647ce"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab7d57eaf1bb97c34a92cc5e2c8600075"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab7d57eaf1bb97c34a92cc5e2c8600075">XAxiEthernet_GetSgmiiStatus</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 *SpeedPtr)</td></tr>
|
||||
<tr class="separator:gab7d57eaf1bb97c34a92cc5e2c8600075"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gade4816d9067e13fbac2ceb66cf32360d"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gade4816d9067e13fbac2ceb66cf32360d">XAxiEthernet_GetRgmiiStatus</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 *SpeedPtr, int *IsFullDuplexPtr, int *IsLinkUpPtr)</td></tr>
|
||||
<tr class="separator:gade4816d9067e13fbac2ceb66cf32360d"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga8e8caa9c4ac753744bd08ebf103877c3"><td class="memItemLeft" align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga8e8caa9c4ac753744bd08ebf103877c3">XAxiEthernet_GetOperatingSpeed</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga8e8caa9c4ac753744bd08ebf103877c3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab2d0106f26a1a2e1f2b902dc0a2822c9"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab2d0106f26a1a2e1f2b902dc0a2822c9">XAxiEthernet_SetOperatingSpeed</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 Speed)</td></tr>
|
||||
<tr class="separator:gab2d0106f26a1a2e1f2b902dc0a2822c9"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga3db57c4a261afc854985297afed2373b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga3db57c4a261afc854985297afed2373b">XAxiEthernet_SetBadFrmRcvOption</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
||||
<tr class="separator:ga3db57c4a261afc854985297afed2373b"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gaab45f6c7a4440bc3f58d4ff971e6be7b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gaab45f6c7a4440bc3f58d4ff971e6be7b">XAxiEthernet_ClearBadFrmRcvOption</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
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<tr class="separator:gaab45f6c7a4440bc3f58d4ff971e6be7b"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga41049ca22799d42d1279461be627c72e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga41049ca22799d42d1279461be627c72e">XAxiEthernet_DisableControlFrameLenCheck</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
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<tr class="separator:ga41049ca22799d42d1279461be627c72e"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga8b71bcdc8be6ae5d6364c59ea0f53aab"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga8b71bcdc8be6ae5d6364c59ea0f53aab">XAxiEthernet_EnableControlFrameLenCheck</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
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<tr class="separator:ga8b71bcdc8be6ae5d6364c59ea0f53aab"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b33bc77237bf039c02d4619a811aed6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2b33bc77237bf039c02d4619a811aed6">XAxiEthernet_PhySetMdioDivisor</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 Divisor)</td></tr>
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<tr class="separator:ga2b33bc77237bf039c02d4619a811aed6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac186de218bc1df3afe9e1c91c6b749b6"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">XAxiEthernet_MulticastAdd</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr, int Entry)</td></tr>
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||||
<tr class="separator:gac186de218bc1df3afe9e1c91c6b749b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac95ba7bcd0c537eec1787f5ea49488df"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac95ba7bcd0c537eec1787f5ea49488df">XAxiEthernet_MulticastGet</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr, int Entry)</td></tr>
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<tr class="separator:gac95ba7bcd0c537eec1787f5ea49488df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1db86bd14ba6b769f6fdf34c0e277c10"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">XAxiEthernet_MulticastClear</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, int Entry)</td></tr>
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<tr class="separator:ga1db86bd14ba6b769f6fdf34c0e277c10"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga2d692528035485610c1bbf6e3fbb4a84"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">XAxiEthernet_SetTpid</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 Tpid, u8 Entry)</td></tr>
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||||
<tr class="separator:ga2d692528035485610c1bbf6e3fbb4a84"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga338bb9b51764235ed6969faa58503455"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">XAxiEthernet_ClearTpid</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 Entry)</td></tr>
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<tr class="separator:ga338bb9b51764235ed6969faa58503455"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga498bdb032a67313102ac7dee10ae8e7e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga498bdb032a67313102ac7dee10ae8e7e">XAxiEthernet_GetTpid</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 *TpidPtr, u8 Entry)</td></tr>
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<tr class="separator:ga498bdb032a67313102ac7dee10ae8e7e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga44f51417734b0ca355da2e87a67aa0a3"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">XAxiEthernet_SetVTagMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Mode, int Dir)</td></tr>
|
||||
<tr class="separator:ga44f51417734b0ca355da2e87a67aa0a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga9d375eb39bb3a8f724123aa9a9585e47"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga9d375eb39bb3a8f724123aa9a9585e47">XAxiEthernet_GetVTagMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 *ModePtr, int Dir)</td></tr>
|
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<tr class="separator:ga9d375eb39bb3a8f724123aa9a9585e47"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga95198cfb6e93a13c115c7c6610a68ded"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">XAxiEthernet_SetVStripMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Mode, int Dir)</td></tr>
|
||||
<tr class="separator:ga95198cfb6e93a13c115c7c6610a68ded"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gafb2a0cbe2263410d25caa0e87428a6d7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gafb2a0cbe2263410d25caa0e87428a6d7">XAxiEthernet_GetVStripMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 *ModePtr, int Dir)</td></tr>
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<tr class="separator:gafb2a0cbe2263410d25caa0e87428a6d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga43d59456dc8e08f671745c70e48e9a59"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">XAxiEthernet_SetVTagValue</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 VTagValue, int Dir)</td></tr>
|
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<tr class="separator:ga43d59456dc8e08f671745c70e48e9a59"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga00d242e51aeec92bf07528bbf58709ea"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga00d242e51aeec92bf07528bbf58709ea">XAxiEthernet_GetVTagValue</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 *VTagValuePtr, int Dir)</td></tr>
|
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<tr class="separator:ga00d242e51aeec92bf07528bbf58709ea"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga4f860a127fcc5756c2dc62337eb1b934"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">XAxiEthernet_SetVidTable</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Entry, u32 Vid, u8 Strip, u8 Tag, int Dir)</td></tr>
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<tr class="separator:ga4f860a127fcc5756c2dc62337eb1b934"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab13721145a4632d987bd858483c00011"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab13721145a4632d987bd858483c00011">XAxiEthernet_GetVidTable</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Entry, u32 *VidPtr, u8 *StripPtr, u8 *TagPtr, int Dir)</td></tr>
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<tr class="separator:gab13721145a4632d987bd858483c00011"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gac6e848552b34aa85f6801ab269521cf3"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">XAxiEthernet_AddExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
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<tr class="separator:gac6e848552b34aa85f6801ab269521cf3"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gab4a3a1fdf74706efe50812be6ec78839"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">XAxiEthernet_ClearExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
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<tr class="separator:gab4a3a1fdf74706efe50812be6ec78839"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6932bd79a08811085a47ad1357a4ef89"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6932bd79a08811085a47ad1357a4ef89">XAxiEthernet_GetExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
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<tr class="separator:ga6932bd79a08811085a47ad1357a4ef89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga08b7db7c5a837de18afceb58230351b3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga08b7db7c5a837de18afceb58230351b3">XAxiEthernet_DumpExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
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<tr class="separator:ga08b7db7c5a837de18afceb58230351b3"><td class="memSeparator" colspan="2"> </td></tr>
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<div class="title">xaxiethernet_control.c File Reference</div> </div>
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Functions</h2></td></tr>
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<tr class="memitem:gac186de218bc1df3afe9e1c91c6b749b6"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac186de218bc1df3afe9e1c91c6b749b6">XAxiEthernet_MulticastAdd</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr, int Entry)</td></tr>
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<tr class="separator:gac186de218bc1df3afe9e1c91c6b749b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac95ba7bcd0c537eec1787f5ea49488df"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac95ba7bcd0c537eec1787f5ea49488df">XAxiEthernet_MulticastGet</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr, int Entry)</td></tr>
|
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<tr class="separator:gac95ba7bcd0c537eec1787f5ea49488df"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1db86bd14ba6b769f6fdf34c0e277c10"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga1db86bd14ba6b769f6fdf34c0e277c10">XAxiEthernet_MulticastClear</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, int Entry)</td></tr>
|
||||
<tr class="separator:ga1db86bd14ba6b769f6fdf34c0e277c10"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga99c4e06d4db500ab7bf6bc20853330e2"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga99c4e06d4db500ab7bf6bc20853330e2">XAxiEthernet_SetMacPauseAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
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||||
<tr class="separator:ga99c4e06d4db500ab7bf6bc20853330e2"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga369290833088c56abf0a967f16233266"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga369290833088c56abf0a967f16233266">XAxiEthernet_GetMacPauseAddress</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
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<tr class="separator:ga369290833088c56abf0a967f16233266"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gae513f052386deaf8c5994b768f9647ce"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gae513f052386deaf8c5994b768f9647ce">XAxiEthernet_SendPausePacket</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 PauseValue)</td></tr>
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<tr class="separator:gae513f052386deaf8c5994b768f9647ce"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gab7d57eaf1bb97c34a92cc5e2c8600075"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab7d57eaf1bb97c34a92cc5e2c8600075">XAxiEthernet_GetSgmiiStatus</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 *SpeedPtr)</td></tr>
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||||
<tr class="separator:gab7d57eaf1bb97c34a92cc5e2c8600075"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gade4816d9067e13fbac2ceb66cf32360d"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gade4816d9067e13fbac2ceb66cf32360d">XAxiEthernet_GetRgmiiStatus</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 *SpeedPtr, int *IsFullDuplexPtr, int *IsLinkUpPtr)</td></tr>
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<tr class="separator:gade4816d9067e13fbac2ceb66cf32360d"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga2d692528035485610c1bbf6e3fbb4a84"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga2d692528035485610c1bbf6e3fbb4a84">XAxiEthernet_SetTpid</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 Tpid, u8 Entry)</td></tr>
|
||||
<tr class="separator:ga2d692528035485610c1bbf6e3fbb4a84"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga338bb9b51764235ed6969faa58503455"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga338bb9b51764235ed6969faa58503455">XAxiEthernet_ClearTpid</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 Entry)</td></tr>
|
||||
<tr class="separator:ga338bb9b51764235ed6969faa58503455"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga498bdb032a67313102ac7dee10ae8e7e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga498bdb032a67313102ac7dee10ae8e7e">XAxiEthernet_GetTpid</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u16 *TpidPtr, u8 Entry)</td></tr>
|
||||
<tr class="separator:ga498bdb032a67313102ac7dee10ae8e7e"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga44f51417734b0ca355da2e87a67aa0a3"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga44f51417734b0ca355da2e87a67aa0a3">XAxiEthernet_SetVTagMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Mode, int Dir)</td></tr>
|
||||
<tr class="separator:ga44f51417734b0ca355da2e87a67aa0a3"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga9d375eb39bb3a8f724123aa9a9585e47"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga9d375eb39bb3a8f724123aa9a9585e47">XAxiEthernet_GetVTagMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 *ModePtr, int Dir)</td></tr>
|
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<tr class="separator:ga9d375eb39bb3a8f724123aa9a9585e47"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga95198cfb6e93a13c115c7c6610a68ded"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga95198cfb6e93a13c115c7c6610a68ded">XAxiEthernet_SetVStripMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Mode, int Dir)</td></tr>
|
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<tr class="separator:ga95198cfb6e93a13c115c7c6610a68ded"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:gafb2a0cbe2263410d25caa0e87428a6d7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gafb2a0cbe2263410d25caa0e87428a6d7">XAxiEthernet_GetVStripMode</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u8 *ModePtr, int Dir)</td></tr>
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<tr class="separator:gafb2a0cbe2263410d25caa0e87428a6d7"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:ga43d59456dc8e08f671745c70e48e9a59"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga43d59456dc8e08f671745c70e48e9a59">XAxiEthernet_SetVTagValue</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 VTagValue, int Dir)</td></tr>
|
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<tr class="separator:ga43d59456dc8e08f671745c70e48e9a59"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga00d242e51aeec92bf07528bbf58709ea"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga00d242e51aeec92bf07528bbf58709ea">XAxiEthernet_GetVTagValue</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 *VTagValuePtr, int Dir)</td></tr>
|
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<tr class="separator:ga00d242e51aeec92bf07528bbf58709ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4f860a127fcc5756c2dc62337eb1b934"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga4f860a127fcc5756c2dc62337eb1b934">XAxiEthernet_SetVidTable</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Entry, u32 Vid, u8 Strip, u8 Tag, int Dir)</td></tr>
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<tr class="separator:ga4f860a127fcc5756c2dc62337eb1b934"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gab13721145a4632d987bd858483c00011"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab13721145a4632d987bd858483c00011">XAxiEthernet_GetVidTable</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, u32 Entry, u32 *VidPtr, u8 *StripPtr, u8 *TagPtr, int Dir)</td></tr>
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<tr class="separator:gab13721145a4632d987bd858483c00011"><td class="memSeparator" colspan="2"> </td></tr>
|
||||
<tr class="memitem:gac6e848552b34aa85f6801ab269521cf3"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gac6e848552b34aa85f6801ab269521cf3">XAxiEthernet_AddExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
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<tr class="separator:gac6e848552b34aa85f6801ab269521cf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab4a3a1fdf74706efe50812be6ec78839"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#gab4a3a1fdf74706efe50812be6ec78839">XAxiEthernet_ClearExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
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<tr class="separator:gab4a3a1fdf74706efe50812be6ec78839"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga6932bd79a08811085a47ad1357a4ef89"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga6932bd79a08811085a47ad1357a4ef89">XAxiEthernet_GetExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr, void *AddressPtr)</td></tr>
|
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<tr class="separator:ga6932bd79a08811085a47ad1357a4ef89"><td class="memSeparator" colspan="2"> </td></tr>
|
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<tr class="memitem:ga08b7db7c5a837de18afceb58230351b3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga08b7db7c5a837de18afceb58230351b3">XAxiEthernet_DumpExtMulticastGroup</a> (<a class="el" href="struct_x_axi_ethernet.html">XAxiEthernet</a> *InstancePtr)</td></tr>
|
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<tr class="separator:ga08b7db7c5a837de18afceb58230351b3"><td class="memSeparator" colspan="2"> </td></tr>
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<a href="#define-members">Macros</a> </div>
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<div class="title">xaxiethernet_hw.h File Reference</div> </div>
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Macros</h2></td></tr>
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<tr class="memitem:ga136faa5126867cb31bb12cec43fb20a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga136faa5126867cb31bb12cec43fb20a2">XAxiEthernet_ReadReg</a>(BaseAddress, RegOffset)   (Xil_In32(((BaseAddress) + (RegOffset))))</td></tr>
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<tr class="separator:ga136faa5126867cb31bb12cec43fb20a2"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr class="memitem:ga048aa7d7b16bc7fa5e85071bd16147aa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga048aa7d7b16bc7fa5e85071bd16147aa">XAxiEthernet_WriteReg</a>(BaseAddress, RegOffset, Data)   Xil_Out32(((BaseAddress) + (RegOffset)), (Data))</td></tr>
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<tr class="separator:ga048aa7d7b16bc7fa5e85071bd16147aa"><td class="memSeparator" colspan="2"> </td></tr>
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||||
<tr><td colspan="2"><div class="groupHeader">Axi Ethernet registers offset</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Reset and Address Filter (RAF) Register bit definitions.</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>These bits are associated with the XAE_RAF_OFFSET register. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Transmit Pause Frame Register (TPF) bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Transmit Inter-Frame Gap Adjustement Register (TFGP) bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Interrupt Status/Enable/Mask Registers bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>The bit definition of these three interrupt registers are the same.</p>
|
||||
<p>These bits are associated with the XAE_IS_OFFSET, XAE_IP_OFFSET, and XAE_IE_OFFSET registers. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">TPID Register (TPID) bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Receive Configuration Word 1 (RCW1) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Transmitter Configuration (TC) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Flow Control Configuration (FCC) Register Bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Ethernet MAC Mode Configuration (EMMC) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">RGMII/SGMII Configuration (PHYC) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">MDIO Management Configuration (MC) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">MDIO Management Control Register (MCR) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">MDIO Interrupt Enable/Mask/Status Registers bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>The bit definition of these three interrupt registers are the same.</p>
|
||||
<p>These bits are associated with the XAE_IS_OFFSET, XAE_IP_OFFSET, and XAE_IE_OFFSET registers. </p>
|
||||
</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Axi Ethernet Unicast Address Register Word 1 (UAW1) Register Bit</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupText"><p>definitions </p>
|
||||
</div></td></tr>
|
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<tr><td colspan="2"><div class="groupHeader">Filter Mask Index (FMI) Register bit definitions</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Extended multicast buffer descriptor bit mask</div></td></tr>
|
||||
<tr><td colspan="2"><div class="groupHeader">Axi Ethernet Multicast Address Register Word 1 (MAW1)</div></td></tr>
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||||
<tr><td colspan="2"><div class="groupHeader">Other Constant definitions used in the driver</div></td></tr>
|
||||
<tr class="memitem:ga9c879203604f0d99effc88d231fd3709"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga9c879203604f0d99effc88d231fd3709">XAE_RST_DELAY_LOOPCNT_VAL</a>   200</td></tr>
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<div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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<li><a href="index.html"><span>Overview</span></a></li>
|
||||
<li><a href="annotated.html"><span>Data Structures</span></a></li>
|
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<li><a href="globals.html"><span>APIs</span></a></li>
|
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<li><a href="files.html"><span>File List</span></a></li>
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|
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<a href="#func-members">Functions</a> </div>
|
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<div class="title">xaxiethernet_sinit.c File Reference</div> </div>
|
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|
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|
||||
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Functions</h2></td></tr>
|
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<tr class="memitem:ga781a4d89a7a3a9d59ac8921ba66b353d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_ethernet___config.html">XAxiEthernet_Config</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="group__axiethernet__v5__0.html#ga781a4d89a7a3a9d59ac8921ba66b353d">XAxiEthernet_LookupConfig</a> (u16 DeviceId)</td></tr>
|
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|
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<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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|
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|
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|
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|
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XilinxProcessorIPLib/drivers/axiethernet/doc/html/api/xlogo_bg.gif
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66
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<tr style="height: 56px;">
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|
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|
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<div id="projectname">axipcie
|
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|
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|
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<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icona"><span class="icon">C</span></span><a class="el" href="struct_x_axi_pcie.html" target="_self">XAxiPcie</a></td><td class="desc">The <a class="el" href="struct_x_axi_pcie.html" title="The XAxiPcie driver instance data. ">XAxiPcie</a> driver instance data </td></tr>
|
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<tr id="row_1_"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icona"><span class="icon">C</span></span><a class="el" href="struct_x_axi_pcie___bar_addr.html" target="_self">XAxiPcie_BarAddr</a></td><td class="desc">The user is required to use this strucuture when reading or writing translation vector between local bus BARs and AXI PCIe BARs </td></tr>
|
||||
<tr id="row_2_" class="even"><td class="entry"><span style="width:16px;display:inline-block;"> </span><span class="icona"><span class="icon">C</span></span><a class="el" href="struct_x_axi_pcie___config.html" target="_self">XAxiPcie_Config</a></td><td class="desc">This typedef contains IP hardware configuration information </td></tr>
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|
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|
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</ul>
|
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</div>
|
||||
</body>
|
||||
</html>
|
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68
XilinxProcessorIPLib/drivers/axipcie/doc/html/api/classes.html
Executable file
68
XilinxProcessorIPLib/drivers/axipcie/doc/html/api/classes.html
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|
|
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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|
||||
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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<div class="contents">
|
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<div class="qindex"><a class="qindex" href="#letter_X">X</a></div>
|
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<table style="margin: 10px; white-space: nowrap;" align="center" width="95%" border="0" cellspacing="0" cellpadding="0">
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|
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<ul>
|
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|
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</ul>
|
||||
</div>
|
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</body>
|
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</html>
|
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XilinxProcessorIPLib/drivers/axipcie/doc/html/api/dynsections.js
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96
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|
|
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|
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|
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|
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|
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|
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$(linkObj).addClass('closed').removeClass('opened');
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
$(img).attr('src',src.substring(0,src.length-10)+'open.png');
|
||||
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|
||||
}
|
||||
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