stv0g/embeddedsw
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

canfd_v1_0: Update CanFd Data swaping issue when EDL is Zero.

Browse source 
This patch updated the canfd Data swaping issue and updated the
AFRID and AFRMASK offsets to correct values.

Signed-off-by: naga sureshkumar relli <nagasure@xilinx.com>
This commit is contained in:
naga sureshkumar relli 2015-05-18 14:09:23 +05:30 • committed by Nava kishore Manne
parent 318320f485
commit db67e30577
10 changed files with 83 additions and 52 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
XilinxProcessorIPLib/drivers/canfd/data/canfd.tcl
View file

@ -29,11 +29,21 @@
# this Software without prior written authorization from Xilinx.
#
###############################################################################
#
# MODIFICATION HISTORY:
#
# Ver Who Date Changes
# ---- ----- ------- -----------------------------
# 1.0 nsk 15/05/15 Updated as per RTL. TxBuffer
# Can be configurable(8,16,32).
#
###############################################################################
#uses "xillib.tcl"
proc generate {drv_handle} {
xdefine_include_file $drv_handle "xparameters.h" "XCanfd" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_CAN_RX_DPTH" "C_CAN_TX_DPTH" "RX_MODE" "NUM_OF_RX_MB_BUF"
xdefine_config_file $drv_handle "xcanfd_g.c" "XCanFd" "DEVICE_ID" "C_BASEADDR" "RX_MODE" "NUM_OF_RX_MB_BUF"
xdefine_include_file $drv_handle "xparameters.h" "XCanfd" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_CAN_RX_DPTH" "C_CAN_TX_DPTH" "RX_MODE" "NUM_OF_RX_MB_BUF" "NUM_OF_TX_BUF"
xdefine_config_file $drv_handle "xcanfd_g.c" "XCanFd" "DEVICE_ID" "C_BASEADDR" "RX_MODE" "NUM_OF_RX_MB_BUF" "NUM_OF_TX_BUF"
xdefine_canonical_xpars $drv_handle "xparameters.h" "Canfd" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_CAN_RX_DPTH" "C_CAN_TX_DPTH" "RX_MODE" "NUM_OF_RX_MB_BUF"
xdefine_canonical_xpars $drv_handle "xparameters.h" "Canfd" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_CAN_RX_DPTH" "C_CAN_TX_DPTH" "RX_MODE" "NUM_OF_RX_MB_BUF" "NUM_OF_TX_BUF"
}

2
XilinxProcessorIPLib/drivers/canfd/examples/xcanfd_intr_example.c
View file

@ -54,7 +54,7 @@
*
* Ver Who Date Changes
* ----- ----- -------- -----------------------------------------------
* 1.00a nsk 06/04/15 First release
* 1.0 nsk 06/04/15 First release
*
* </pre>
*

2
XilinxProcessorIPLib/drivers/canfd/examples/xcanfd_polled_example.c
View file

@ -51,7 +51,7 @@
*
* Ver Who Date Changes
* ----- ----- -------- -----------------------------------------------
* 1.00a nsk 06/04/2015 First release
* 1.0 nsk 06/04/15 First release
*
* </pre>
*

40
XilinxProcessorIPLib/drivers/canfd/src/xcanfd.c
View file

@ -42,7 +42,10 @@
*
* Ver Who Date Changes
* ----- ---- -------- -------------------------------------------------------
* 1.00a nsk 06/04/15 First release
* 1.0 nsk 06/04/15 First release
* 1.0 nsk 15/05/15 Updated Correct AFRID and AFRMSK Registers.
* Modified DataSwaping when EDL is Zero.
* (CR 861772)
*
* </pre>
******************************************************************************/
@ -114,6 +117,7 @@ int XCanFd_CfgInitialize(XCanFd *InstancePtr, XCanFd_Config *ConfigPtr,
InstancePtr->CanFdConfig.DeviceId = ConfigPtr->DeviceId;
InstancePtr->CanFdConfig.Rx_Mode = ConfigPtr->Rx_Mode;
InstancePtr->CanFdConfig.NumofRxMbBuf = ConfigPtr->NumofRxMbBuf;
InstancePtr->CanFdConfig.NumofTxBuf = ConfigPtr->NumofTxBuf;
/*
* Set all handlers to stub values, let user configure this data later.
@ -135,7 +139,7 @@ int XCanFd_CfgInitialize(XCanFd *InstancePtr, XCanFd_Config *ConfigPtr,
/**
*
* This function returns enabled acceptance filters. Use XCANFD_AFR_UAF*_MASK
* defined in xcanfd_l.h to interpret the returned value. If no acceptance
* defined in xcanfd_hw.h to interpret the returned value. If no acceptance
* filters are enabled then all received frames are stored in the RX FIFO.
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
@ -549,11 +553,13 @@ int XCanFd_Addto_Queue(XCanFd *InstancePtr, u32 *FramePtr,u32 *TxBufferNumber)
/* Legacy CAN Frames */
for (Len = 0;Len < Dlc;Len += 4) {
OutValue = Xil_EndianSwap32(
FramePtr[2+DwIndex]);
XCanFd_WriteReg(
InstancePtr->CanFdConfig.BaseAddress,
(XCANFD_TXDW_OFFSET(
FreeTxBuffer)+(Len)),
FramePtr[2+DwIndex]);
OutValue);
DwIndex++;
}
}
@ -692,6 +698,7 @@ u32 XCanFd_Recv_Mailbox(XCanFd *InstancePtr, u32 *FramePtr)
u32 Dlc;
u32 Len;
u32 NofRcsReg=0;
u32 Mask;
/*
* Core status bit in Receive Control Status Register starts from 16
* th bit Location.
@ -757,8 +764,10 @@ u32 XCanFd_Recv_Mailbox(XCanFd *InstancePtr, u32 *FramePtr)
DwIndex++;
}
}
Result ^= (1 << CoreStatusBit);
XCanFd_WriteReg(InstancePtr->CanFdConfig.
Mask = Result & 0xFFFF;
Result &= 1<<CoreStatusBit;
Result |= Mask;
XCanFd_WriteReg(InstancePtr->CanFdConfig.
BaseAddress,
XCANFD_RCS_OFFSET(NoCtrlStatus),Result);
return XST_SUCCESS;
@ -1072,7 +1081,7 @@ void XCanFd_AcceptFilterDisable(XCanFd *InstancePtr, u32 FilterIndexMask)
*
* This function sets values to the Acceptance Filter Mask Register (AFMR) and
* Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter.
* Use XCANFD_IDR_* defined in xcanfd_l.h to create the values to set the filter.
* Use XCANFD_IDR_* defined in xcanfd_hw.h to create the values to set the filter.
* Read xcanfd.h and device specification for details.
*
* This function should be called only after:
@ -1082,8 +1091,8 @@ void XCanFd_AcceptFilterDisable(XCanFd *InstancePtr, u32 FilterIndexMask)
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
* @param FilterIndex defines which Acceptance Filter Mask and ID Register
* to set. Use any single XCANFD_AFR_UAF*_MASK value.ranges from 0
* - 31
* to set. Use any single XCANFD_AFR_UAF*_MASK value.ranges from 1
* - 32
* @param MaskValue is the value to write to the chosen Acceptance Filter
* Mask Register.
* @param IdValue is the value to write to the chosen Acceptance Filter
@ -1117,12 +1126,12 @@ int XCanFd_AcceptFilterSet(XCanFd *InstancePtr, u32 FilterIndex,
if ((EnabledFilters & FilterIndex) == FilterIndex) {
return XST_FAILURE;
}
FilterIndex--;
XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress,
XCANFD_AFMR_OFFSET(FilterIndex),MaskValue);
XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress,
XCANFD_AFMR_OFFSET(FilterIndex-1),MaskValue);
XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress,
XCANFD_AFIDR_OFFSET(FilterIndex-1),IdValue);
XCANFD_AFIDR_OFFSET(FilterIndex),IdValue);
return XST_SUCCESS;
@ -1132,7 +1141,7 @@ int XCanFd_AcceptFilterSet(XCanFd *InstancePtr, u32 FilterIndex,
/**
*
* This function reads the values of the Acceptance Filter Mask and ID Register
* for the specified Acceptance Filter. Use XCANFD_IDR_* defined in xcanfd_l.h to
* for the specified Acceptance Filter. Use XCANFD_IDR_* defined in xcanfd_hw.h to
* interpret the values. Read xcanfd.h and device specification for details.
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
@ -1157,7 +1166,9 @@ void XCanFd_AcceptFilterGet(XCanFd *InstancePtr, u32 FilterIndex,
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(FilterIndex < XCANFD_NOOF_AFR);
Xil_AssertVoid((FilterIndex > 0) ||(FilterIndex <= 32));
FilterIndex--;
*MaskValue = XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress,
XCANFD_AFMR_OFFSET(FilterIndex));
@ -1357,7 +1368,8 @@ int XCanFd_GetFreeBuffer(XCanFd *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
for (AvailBuffer = 0;AvailBuffer <= 31;AvailBuffer++) {
for (AvailBuffer = 0;AvailBuffer <= InstancePtr->CanFdConfig.NumofTxBuf;
AvailBuffer++) {
if (InstancePtr->FreeBuffStatus[AvailBuffer]!= 1) {
return AvailBuffer;

28
XilinxProcessorIPLib/drivers/canfd/src/xcanfd.h
View file

@ -173,7 +173,7 @@ exclusion
*
* <b>Building the driver</b>
*
* The XCanFd driver is composed of several source files. This allows the user to
* The XCanFd driver is composed of several source files.This allows the user to
* build and link only those parts of the driver that are necessary.
* <br><br>
*
@ -183,8 +183,15 @@ exclusion
*
* Ver Who Date Changes
* ----- ---- -------- -------------------------------------------------------
* 1.00a nsk 06/04/15 First release
*
* 1.0 nsk 06/04/15 First release
* 1.0 nsk 15/05/15 Updated xcanfd.c for correct AFRID and AFRMSK Registers
* Updated xcanfd.c and xcanfd.h to get configurable
* TxBuffers in XCanFd_Config Struct and
* XCanFd_GetFreeBuffer().
* Modified XCANFD_BTR_TS1_MASK in xcanfd_hw.h.
* Updated xcanfd.c while sending data when EDL is Zero.
* Updated driver tcl file to get configurable TxBuffers.
* (CR 861772).
* </pre>
*
******************************************************************************/
@ -199,7 +206,7 @@ extern "C" {
/***************************** Include Files *********************************/
#include "xstatus.h"
#include "xcanfd_l.h"
#include "xcanfd_hw.h"
/************************** Constant Definitions *****************************/
@ -234,6 +241,7 @@ typedef struct {
u32 BaseAddress; /**< Register base address */
u32 Rx_Mode; /**< 1-Mailbox 0-sequential */
u32 NumofRxMbBuf; /**< Number of RxBuffers */
u32 NumofTxBuf; /**< Number of TxBuffers */
} XCanFd_Config;
/*****************************************************************************/
@ -269,7 +277,7 @@ typedef void (*XCanFd_ErrorHandler) (void *CallBackRef, u32 ErrorMask);
* when setting the callback functions, and passed back to the
* upper layer when the callback is invoked.
* @param Mask is a bit mask indicating the pending interrupts. Its value
* equals 'OR'ing one or more XCANFD_IXR_* defined in xcanfd_l.h
* equals 'OR'ing one or more XCANFD_IXR_* defined in xcanfd_hw.h
******************************************************************************/
typedef void (*XCanFd_EventHandler) (void *CallBackRef, u32 Mask);
@ -637,7 +645,7 @@ typedef struct {
/**
*
* This function reads Error Status value from Error Status Register (ESR). Use
* the XCANFD_ESR_* constants defined in xcanfd_l.h to interpret the returned value.
* the XCANFD_ESR_* constants defined in xcanfd_hw.h to interpret the returned value.
*
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
@ -654,7 +662,7 @@ typedef struct {
/**
*
* This function returns Status value from Status Register (SR). Use the
* XCANFD_SR_* constants defined in xcanfd_l.h to interpret the returned value.
* XCANFD_SR_* constants defined in xcanfd_hw.h to interpret the returned value.
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
*
@ -670,7 +678,7 @@ typedef struct {
/**
*
* This function clears Error Status bit(s) previously set in Error
* Status Register (ESR). Use the XCANFD_ESR_* constants defined in xcanfd_l.h to
* Status Register (ESR). Use the XCANFD_ESR_* constants defined in xcanfd_hw.h to
* create the value to pass in. If a bit was cleared in Error Status Register
* before this function is called, it will not be touched.
*
@ -780,7 +788,7 @@ typedef struct {
/**
*
* This routine returns enabled interrupt(s). Use the XCANFD_IXR_* constants
* defined in xcanfd_l.h to interpret the returned value.
* defined in xcanfd_hw.h to interpret the returned value.
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
*
@ -796,7 +804,7 @@ typedef struct {
/**
*
* This routine returns interrupt status read from Interrupt Status Register.
* Use the XCANFD_IXR_* constants defined in xcanfd_l.h to interpret the returned
* Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to interpret the returned
* value.
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.

2
XilinxProcessorIPLib/drivers/canfd/src/xcanfd_config.c
View file

@ -41,7 +41,7 @@
*
* Ver Who Date Changes
* ----- ---- -------- -------------------------------------------------------
* 1.00a nsk 06/04/15 First release
* 1.0 nsk 06/04/15 First release
*
* </pre>
******************************************************************************/

13
XilinxProcessorIPLib/drivers/canfd/src/xcanfd_l.h → XilinxProcessorIPLib/drivers/canfd/src/xcanfd_hw.h
View file

@ -32,7 +32,7 @@
/*****************************************************************************/
/**
*
* @file xcanfd_l.h
* @file xcanfd_hw.h
*
* This header file contains the identifiers and basic driver functions (or
* macros) that can be used to access the device. Other driver functions
@ -43,15 +43,16 @@
*
* Ver Who Date Changes
* ----- ---- ---------- -----------------------------------------------
* 1.00a nsk 06/04/2015 First release
*
* 1.0 nsk 06/04/2015 First release
* 1.0 nsk 15/05/2015 Modified XCANFD_BTR_TS1_MASK
* (CR 861772).
*
* </pre>
*
******************************************************************************/
#ifndef XCANFD_L_H /* prevent circular inclusions */
#define XCANFD_L_H /* by using protection macros */
#ifndef XCANFD_HW_H /* prevent circular inclusions */
#define XCANFD_HW_H /* by using protection macros */
#ifdef __cplusplus
extern "C" {
@ -690,7 +691,7 @@ extern "C" {
#define XCANFD_BTR_SJW_SHIFT 16 /**< Sync Jump Width Shift */
#define XCANFD_BTR_TS2_MASK 0x00001F00 /**< Time Segment 2 Mask */
#define XCANFD_BTR_TS2_SHIFT 8 /**< Time Segment 2 Shift */
#define XCANFD_BTR_TS1_MASK 0x0000001F /**< Time Segment 1 Mask */
#define XCANFD_BTR_TS1_MASK 0x0000003F /**< Time Segment 1 Mask */
#define XCANFD_F_BRPR_TDCMASK 0x00001F00 /**< Tranceiver Delay
compensation Offset Mask */
#define XCANFD_F_BRPR_TDC_ENABLE_MASK 0x00010000 /**< Tranceiver Delay

28
XilinxProcessorIPLib/drivers/canfd/src/xcanfd_intr.c
View file

@ -41,8 +41,8 @@
*
* Ver Who Date Changes
* ----- ---- --------- -----------------------------------------------
* 1.00a nsk 06/04/15 First release
* 1.0 nsk 06/04/15 First release
*
* </pre>
*
******************************************************************************/
@ -70,13 +70,13 @@
/**
*
* This routine enables interrupt(s). Use the XCANFD_IXR_* constants defined in
* xcanfd_l.h to create the bit-mask to enable interrupts.
* xcanfd_hw.h to create the bit-mask to enable interrupts.
*
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
* @param Mask is the mask to enable. Bit positions of 1 will be enabled.
* Bit positions of 0 will keep the previous setting. This mask is
* formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_l.h.
* formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.
*
* @return None.
*
@ -147,7 +147,7 @@ u32 XCanFd_SetRxIntrWatermark(XCanFd *InstancePtr, u8 Threshold)
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
* @param Mask is the mask to enable. Bit positions of 1 will be enabled.
* Bit positions of 0 will keep the previous setting. This mask is
* formed by OR'ing XCANFD_IETRS_OFFSET* bits defined in xcanfd_l.h.
* formed by OR'ing XCANFD_IETRS_OFFSET* bits defined in xcanfd_hw.h.
*
* @return None.
*
@ -177,7 +177,7 @@ void XCanFd_InterruptEnable_ReadyRqt(XCanFd *InstancePtr, u32 Mask)
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
* @param Mask is the mask to enable. Bit positions of 1 will be enabled.
* Bit positions of 0 will keep the previous setting. This mask is
* formed by OR'ing XCANFD_IETCS_OFFSET* bits defined in xcanfd_l.h.
* formed by OR'ing XCANFD_IETCS_OFFSET* bits defined in xcanfd_hw.h.
*
* @return None.
*
@ -207,7 +207,7 @@ void XCanFd_InterruptEnable_CancelRqt(XCanFd *InstancePtr, u32 Mask)
* @param Mask is the mask to disable. Bit positions of 1 will be
* disabled. Bit positions of 0 will keep the previous setting.
* This mask is formed by AND'ing XCANFD_IETRS_OFFSET* bits
* defined in xcanfd_l.h.
* defined in xcanfd_hw.h.
*
* @return None.
*
@ -237,7 +237,7 @@ void XCanFd_InterruptDisable_ReadyRqt(XCanFd *InstancePtr, u32 Mask)
* @param Mask is the mask to disable. Bit positions of 1 will be
* disabled. Bit positions of 0 will keep the previous setting.
* This mask is formed by AND'ing XCANFD_IETCS_OFFSET* bits defined in
* xcanfd_l.h.
* xcanfd_hw.h.
*
* @return None.
*
@ -266,8 +266,8 @@ void XCanFd_InterruptDisable_CancelRqt(XCanFd *InstancePtr, u32 Mask)
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
* @param Mask is the mask to disable. Bit positions of 1 will be
* disabled. Bit positions of 0 will keep the previous setting.
* This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits defined
* in xcanfd_l.h.
* This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits
* defined in xcanfd_hw.h.
* @param RxBuffNumber has two values
* if 0 -> Access RxBufferFull0 Reg
* else -> Access RxBufferFull1 Reg
@ -312,7 +312,7 @@ void XCanFd_InterruptEnable_RxBuffFull(XCanFd *InstancePtr,
* @param Mask is the mask to disable. Bit positions of 1 will be
* disabled. Bit positions of 0 will keep the previous setting.
* This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits
* defined in xcanfd_l.h.
* defined in xcanfd_hw.h.
*
*@param RxBuffNumber has two values
* if 0 -> Access RxBufferFull0 Reg.
@ -355,13 +355,13 @@ void XCanFd_InterruptDisable_RxBuffFull(XCanFd *InstancePtr,
/**
*
* This routine disables interrupt(s). Use the XCANFD_IXR_* constants defined in
* xcanfd_l.h to create the bit-mask to disable interrupt(s).
* xcanfd_hw.h to create the bit-mask to disable interrupt(s).
*
* @param InstancePtr is a pointer to the XCanFd instance to be worked on.
* @param Mask is the mask to disable. Bit positions of 1 will be
* disabled. Bit positions of 0 will keep the previous setting.
* This mask is formed by OR'ing XCANFD_IXR_* bits defined in
* xcanfd_l.h.
* xcanfd_hw.h.
*
* @return None.
*
@ -395,7 +395,7 @@ void XCanFd_InterruptDisable(XCanFd *InstancePtr, u32 Mask)
* @param Mask is the mask to clear. Bit positions of 1 will be cleared.
* Bit positions of 0 will not change the previous interrupt
* status. This mask is formed by OR'ing XCANFD_IXR_* bits defined
* in xcanfd_l.h.
* in xcanfd_hw.h.
*
* @note None.
*

2
XilinxProcessorIPLib/drivers/canfd/src/xcanfd_selftest.c
View file

@ -43,7 +43,7 @@
*
* Ver Who Date Changes
* ----- ---- -------- ------------------------------------------------------
* 1.00a nsk 06/04/15 First release
* 1.0 nsk 06/04/15 First release
*
* </pre>
*

2
XilinxProcessorIPLib/drivers/canfd/src/xcanfd_sinit.c
View file

@ -54,7 +54,7 @@
*
* Ver Who Date Changes
* ----- ----- -------- -----------------------------------------------
* 1.00a nsk 06/03/15 First release
* 1.0 nsk 06/03/15 First release
*
*
* </pre>