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v_deinterlacer: Update tcl to include model parameters

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Updated the tcl and mdd files to define model parameters.
Updated the code to use new parameters instead of hard-coded
values defined earlier

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
This commit is contained in:
Rohit Consul 2015-06-04 05:49:44 +08:00 • committed by Nava kishore Manne
parent b35e6556b3
commit de7b447b0e
4 changed files with 28 additions and 7 deletions
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1
XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.mdd
View file

@ -11,6 +11,7 @@ BEGIN driver v_deinterlacer
OPTION supported_peripherals = (v_deinterlacer_v5_0 );
OPTION driver_state = ACTIVE;
OPTION DEPENDS = (video_common_v1_1);
OPTION copyfiles = all;
OPTION name = v_deinterlacer;
OPTION version = 5.0;

10
XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.tcl
View file

@ -10,14 +10,18 @@ proc generate {drv_handle} {
"NUM_INSTANCES" \
"DEVICE_ID" \
"C_S_AXI_AXILITES_BASEADDR" \
"C_S_AXI_AXILITES_HIGHADDR"
"C_S_AXI_AXILITES_HIGHADDR" \
"MAX_DATA_WIDTH"
xdefine_config_file $drv_handle "xv_deinterlacer_g.c" "XV_deinterlacer" \
"DEVICE_ID" \
"C_S_AXI_AXILITES_BASEADDR"
"C_S_AXI_AXILITES_BASEADDR" \
"MAX_DATA_WIDTH"
xdefine_canonical_xpars $drv_handle "xparameters.h" "XV_deinterlacer" \
"DEVICE_ID" \
"C_S_AXI_AXILITES_BASEADDR" \
"C_S_AXI_AXILITES_HIGHADDR"
"C_S_AXI_AXILITES_HIGHADDR" \
"MAX_DATA_WIDTH"
}

6
XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.c
View file

@ -7,6 +7,7 @@
/***************************** Include Files *********************************/
#include "xv_deinterlacer.h"
#include "string.h"
/************************** Function Implementation *************************/
#ifndef __linux__
@ -14,6 +15,11 @@ int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr, XV_deinterlacer_
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(ConfigPtr != NULL);
/* Setup the instance */
(void)memset((void *)InstancePtr, 0, sizeof(XV_deinterlacer));
(void)memcpy((void *)&(InstancePtr->Config), (const void *)ConfigPtr,
sizeof(XV_deinterlacer_Config));
InstancePtr->Axilites_BaseAddress = ConfigPtr->Axilites_BaseAddress;
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;

18
XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.h
View file

@ -38,15 +38,25 @@ typedef uint8_t u8;
typedef uint16_t u16;
typedef uint32_t u32;
#else
/**
* This typedef contains configuration information for the DEINT core.
* Each core instance should have a configuration structure
* associated.
*/
typedef struct {
u16 DeviceId;
u32 Axilites_BaseAddress;
u16 DeviceId; /**< Unique ID of device */
u32 Axilites_BaseAddress; /**< The base address of the core instance. */
int MaxDataWidth; /**< Maximum Data width of each channel */
} XV_deinterlacer_Config;
#endif
/**
* Driver instance data. An instance must be allocated for each core in use.
*/
typedef struct {
u32 Axilites_BaseAddress;
u32 IsReady;
XV_deinterlacer_Config Config; /**< Hardware Configuration */
u32 Axilites_BaseAddress; /**< The base address of the core instance. */
u32 IsReady; /**< Device is initialized and ready */
} XV_deinterlacer;
/***************** Macros (Inline Functions) Definitions *********************/