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qspipsu: Increase setup and hold time

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Increase the setup and hold time of qspi to accomodate for a worst case
of ~15ns with ref clk of 300MHz.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
This commit is contained in:
Harini Katakam 2015-10-07 10:26:58 +05:30 • committed by Nava kishore Manne
parent 3c80ca4b5b
commit ed027bf4b9
1 changed files with 2 additions and 2 deletions
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4
XilinxProcessorIPLib/drivers/qspipsu/src/xqspipsu.h
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@ -201,8 +201,8 @@ typedef struct {
#define XQSPIPSU_SELECT_MODE_DUALSPI 0x2U
#define XQSPIPSU_SELECT_MODE_QUADSPI 0x4U
#define XQSPIPSU_GENFIFO_CS_SETUP 0x04U
#define XQSPIPSU_GENFIFO_CS_HOLD 0x03U
#define XQSPIPSU_GENFIFO_CS_SETUP 0x05U
#define XQSPIPSU_GENFIFO_CS_HOLD 0x04U
#define XQSPIPSU_CLK_ACTIVE_LOW_OPTION 0x2U
#define XQSPIPSU_CLK_PHASE_1_OPTION 0x4U