uartns550: Clock Divisor Enhancement
This patch fixes the bug in uart clock divisor when setting baud rate. Signed-off-by: naga sureshkumar relli <nagasure@xilinx.com>
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4 changed files with 25 additions and 6 deletions
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@ -62,6 +62,13 @@
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* XUartNs550_CfgInitialize function. Removed compiler
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* warnings for unused variables in the
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* XUartNs550_StubHandler.
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* 3.3 nsk 04/13/15 Clock Divisor Enhancement. i.e when odd clock given
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* as input clock, say 31.725MHz and Baud as 1000000
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* then divisor = (31725000) / (1000000 * 16), This returns
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* 1.9828, since this is integer math, it becomes 1.
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* Which is almost half of the necessary value. so
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* we are truncating it to nearest integer. in our
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* case 1.9828 rounded to 2.
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* </pre>
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*
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*****************************************************************************/
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@ -648,16 +655,19 @@ int XUartNs550_SetBaudRate(XUartNs550 *InstancePtr, u32 BaudRate)
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* rater based upon the input clock frequency and a baud clock prescaler
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* of 16
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*/
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Divisor = InstancePtr->InputClockHz / (BaudRate * 16UL);
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Divisor = ((InstancePtr->InputClockHz +((BaudRate * 16UL)/2)) /
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(BaudRate * 16UL));
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/*
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* check for too much error between the baud rate that will be generated
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* using the divisor and the expected baud rate, integer division also
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* truncates always positive
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*/
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TargetRate = Divisor * BaudRate * 16UL;
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Error = InstancePtr->InputClockHz - TargetRate;
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if (TargetRate < InstancePtr->InputClockHz) {
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Error = InstancePtr->InputClockHz - TargetRate;
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} else {
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Error = TargetRate - InstancePtr->InputClockHz;
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}
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/*
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* Error has total error now compute the percentage multiplied by 100 to
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* avoid floating point calculations, should be less than 3% as per
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@ -159,6 +159,7 @@
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* 3.2 adk 15/10/14 Fixed CR:824444 changes are made in the example file
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* xuartns550_intr_example.c.
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* 3.2 adk 15/10/14 Fixed CR:826435 changes are made in the driver tcl file.
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* 3.3 nsk 04/13/15 Fixed CR:857013 changes are made in xuartns550.c
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* </pre>
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*
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*****************************************************************************/
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@ -49,6 +49,13 @@
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* 2.00a ktn 10/20/09 Converted all register accesses to 32 bit access.
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* Updated to use HAL Processor APIs. _m is removed from the
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* name of all the macro definitions.
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* 3.3 nsk 04/13/15 Clock Divisor Enhancement. i.e when odd clock given
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* as inputclock, say 31.725MHz and Baud as 1000000
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* then divisor = (31725000) / (1000000 * 16), This returns
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* 1.9828, since this is integer math, it becomes 1.
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* Which is almost half of the necessary value. so
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* we are truncating it to nearest integer. in our
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* case 1.9828 rounded to 2.
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* </pre>
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*
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******************************************************************************/
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@ -158,8 +165,8 @@ void XUartNs550_SetBaud(u32 BaseAddress, u32 InputClockHz, u32 BaudRate)
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* rater based upon the input clock frequency and a baud clock prescaler
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* of 16
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*/
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Divisor = InputClockHz / (BaudRate * 16UL);
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Divisor = ((InputClockHz +((BaudRate * 16UL)/2)) /
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(BaudRate * 16UL));
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/*
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* Get the least significant and most significant bytes of the divisor
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* so they can be written to 2 byte registers
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@ -50,6 +50,7 @@
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* 2.00a ktn 10/20/09 Converted all register accesses to 32 bit access.
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* Updated to use HAL Processor APIs. _m is removed from the
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* name of all the macro definitions.
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* 3.3 nsk 04/13/15 Fixed CR:857013 changes are made in xuartns550_l.c
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* </pre>
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*
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******************************************************************************/
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