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uartps_v3_1 : Created new v3.1 of uartps.

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This patch creates new uartps_v3_1 driver.

Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
This commit is contained in:
Venkata Naga Sai Krishna Kolapalli 2015-04-20 11:23:22 +05:30 • committed by Nava kishore Manne
parent 8fc5ca745a
commit f43b10aa77
20 changed files with 5064 additions and 0 deletions
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52
XilinxProcessorIPLib/drivers/uartps/data/uartps.mdd Executable file
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###############################################################################
#
# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
#
###############################################################################
OPTION psf_version = 2.1;
BEGIN driver uartps
OPTION supported_peripherals = (ps7_uart psu_uart);
OPTION driver_state = ACTIVE;
OPTION copyfiles = all;
OPTION VERSION = 3.1;
OPTION NAME = uartps;
BEGIN INTERFACE stdin
PROPERTY header = xuartps_hw.h;
FUNCTION name = inbyte, value = XUartPs_RecvByte;
END INTERFACE
BEGIN INTERFACE stdout
PROPERTY header = xuartps_hw.h;
FUNCTION name = outbyte, value = XUartPs_SendByte;
END INTERFACE
END driver

51
XilinxProcessorIPLib/drivers/uartps/data/uartps.tcl Executable file
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###############################################################################
#
# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
#
###############################################################################
##############################################################################
#
# Modification History
#
# Ver Who Date Changes
# ----- ---- -------- -----------------------------------------------
# 1.00a sdm 11/22/11 Created
#
##############################################################################
#uses "xillib.tcl"
proc generate {drv_handle} {
::hsi::utils::define_zynq_include_file $drv_handle "xparameters.h" "XUartPs" "NUM_INSTANCES" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_S_AXI_HIGHADDR" "C_UART_CLK_FREQ_HZ" "C_HAS_MODEM"
::hsi::utils::define_zynq_config_file $drv_handle "xuartps_g.c" "XUartPs" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_UART_CLK_FREQ_HZ" "C_HAS_MODEM"
::hsi::utils::define_zynq_canonical_xpars $drv_handle "xparameters.h" "XUartPs" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_S_AXI_HIGHADDR" "C_UART_CLK_FREQ_HZ" "C_HAS_MODEM"
}

45
XilinxProcessorIPLib/drivers/uartps/data/uartps_header.h Normal file
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/******************************************************************************
*
* Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
#ifndef UARTPS_HEADER_H /* prevent circular inclusions */
#define UARTPS_HEADER_H /* by using protection macros */
#include "xil_types.h"
#include "xil_assert.h"
#include "xstatus.h"
int UartPsPolledExample(u16 DeviceId);
int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr,
u16 DeviceId, u16 UartIntrId);
#endif

206
XilinxProcessorIPLib/drivers/uartps/data/uartps_tapp.tcl Executable file
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###############################################################################
#
# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
#
###############################################################################
###############################################################################
# MODIFICATION HISTORY:
# Ver Who Date Changes
# -------- ------ -------- ------------------------------------
# 2.0 adk 12/10/13 Updated as per the New Tcl API's
##############################################################################
# Uses $XILINX_EDK/bin/lib/xillib_sw.tcl
# -----------------------------------------------------------------
# Software Project Types (swproj):
# 0 : MemoryTest - Calls basic memorytest routines from common driver dir
# 1 : PeripheralTest - Calls any existing polled_example and/or selftest
# -----------------------------------------------------------------
# -----------------------------------------------------------------
# TCL Procedures:
# -----------------------------------------------------------------
proc gen_include_files {swproj mhsinst} {
if {$swproj == 0} {
return
}
if {$swproj == 1} {
set stdout [common::get_property CONFIG.STDOUT [hsi::get_os]]
set isStdout [string match $stdout $mhsinst]
if {${isStdout} == 0} {
set inc_file_lines { xuartps.h uartps_header.h }
return $inc_file_lines
}
return ""
}
}
proc gen_src_files {swproj mhsinst} {
if {$swproj == 0} {
return ""
}
if {$swproj == 1} {
set stdout [common::get_property CONFIG.STDOUT [hsi::get_os]]
set isStdout [string match $stdout $mhsinst]
if {${isStdout} == 0} {
set inc_file_lines {examples/xuartps_intr_example.c examples/xuartps_polled_example.c data/uartps_header.h }
return $inc_file_lines
}
}
return ""
}
proc gen_testfunc_def {swproj mhsinst} {
return ""
}
proc gen_init_code {swproj mhsinst} {
set stdout [common::get_property CONFIG.STDOUT [hsi::get_os]]
set isStdout [string match $stdout $mhsinst]
set ipname [common::get_property NAME $mhsinst]
if {${isStdout} == 0} {
if {$swproj == 1} {
set decl " static XUartPs ${ipname};"
set inc_file_lines $decl
return $inc_file_lines
}
return ""
}
}
proc gen_testfunc_call {swproj mhsinst} {
set ipname [common::get_property NAME $mhsinst]
set testfunc_call ""
if {$swproj == 0} {
return $testfunc_call
}
set stdout [common::get_property CONFIG.STDOUT [hsi::get_os]]
set isStdout [string match $stdout $mhsinst]
if {${isStdout} == 1} {
append testfunc_call "
/*
* Peripheral Test will not be run for ${ipname}
* because it has been selected as the STDOUT device
*/
"
return $testfunc_call
}
set deviceid [::hsi::utils::get_ip_param_name $mhsinst "DEVICE_ID"]
set stdout [common::get_property CONFIG.STDOUT [hsi::get_os]]
if { $stdout == "" || $stdout == "none" } {
set hasStdout 0
} else {
set hasStdout 1
}
set isintr [::hsi::utils::is_ip_interrupting_current_proc $mhsinst]
set intcvar intc
if {${hasStdout} == 0} {
append testfunc_call "
{
int Status;
Status = UartPsPolledExample(${deviceid});
}"
if {$isintr == 1} {
set intr_id "XPAR_${ipname}_INTR"
set intr_id [string toupper $intr_id]
append testfunc_call "
{
int Status;
Status = UartPsIntrExample(&${intcvar}, &${ipname}, \\
${deviceid}, \\
${intr_id});
}"
}
} else {
append testfunc_call "
{
int Status;
print(\"\\r\\nRunning UartPsPolledExample() for ${ipname}...\\r\\n\");
Status = UartPsPolledExample(${deviceid});
if (Status == 0) {
print(\"UartPsPolledExample PASSED\\r\\n\");
}
else {
print(\"UartPsPolledExample FAILED\\r\\n\");
}
}"
if {$isintr == 1} {
set intr_id "XPAR_${ipname}_INTR"
set intr_id [string toupper $intr_id]
append testfunc_call "
{
int Status;
print(\"\\r\\n Running Interrupt Test for ${ipname}...\\r\\n\");
Status = UartPsIntrExample(&${intcvar}, &${ipname}, \\
${deviceid}, \\
${intr_id});
if (Status == 0) {
print(\"UartPsIntrExample PASSED\\r\\n\");
}
else {
print(\"UartPsIntrExample FAILED\\r\\n\");
}
}"
}
}
return $testfunc_call
}

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XilinxProcessorIPLib/drivers/uartps/examples/index.html Executable file
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
<html>
<head>
<meta http-equiv="Content-Language" content="en-us">
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<title>Driver example applications</title>
<link rel="stylesheet" type="text/css" href="../help.css">
</head>
<body bgcolor="#FFFFFF">
<h1> Example Applications for the driver uartps_v2_2 </h1>
<HR>
<ul>
<li>xuartps_hello_world_example.c <a href="xuartps_hello_world_example.c">(source)</a> </li>
<li>xuartps_intr_example.c <a href="xuartps_intr_example.c">(source)</a> </li>
<li>xuartps_low_echo_example.c <a href="xuartps_low_echo_example.c">(source)</a> </li>
<li>xuartps_polled_example.c <a href="xuartps_polled_example.c">(source)</a> </li>
<li>xuartps_selftest_example.c <a href="xuartps_selftest_example.c">(source)</a> </li>
</ul>
<p><font face="Times New Roman" color="#800000">Copyright <20> 1995-2014 Xilinx, Inc. All rights reserved.</font></p>
</body>
</html>

164
XilinxProcessorIPLib/drivers/uartps/examples/xuartps_hello_world_example.c Normal file
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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xuartps_hello_world_example.c
*
* This file contains a design example using the XUartPs driver in polled mode
*
* The example uses the default setting in the XUartPs driver:
* . baud rate 9600
* . 8 bit data
* . 1 stop bit
* . no parity
*
* @note
* This example requires an external SchmartModule connected to the pins for
* the device to display the 'Hello World' message onto a hyper-terminal.
*
* MODIFICATION HISTORY:
* <pre>
* Ver Who Date Changes
* ----- ------ -------- -------------------------------------------------
* 1.00a drg/jz 01/13/10 First Release
* 1.04a hk 22/04/13 Changed the baud rate in the example to 115200.
* Fix for CR#707879
*
* </pre>
******************************************************************************/
/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xuartps.h"
/************************** Constant Definitions *****************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
int UartPsHelloWorldExample(u16 DeviceId);
/************************** Variable Definitions *****************************/
XUartPs Uart_Ps; /* The instance of the UART Driver */
/*****************************************************************************/
/**
*
* Main function to call the Hello World example.
*
* @param None
*
* @return
* - XST_FAILURE if the Test Failed .
* - A non-negative number indicating the number of characters
* sent.
*
* @note None
*
******************************************************************************/
int main(void)
{
int Status;
/*
* Run the Hello World example , specify the the Device ID that is
* generated in xparameters.h
*/
Status = UartPsHelloWorldExample(UART_DEVICE_ID);
return Status;
}
/****************************************************************************/
/**
*
* This function sends 'Hello World' to an external terminal in polled mode.
* The purpose of this function is to illustrate how to use the XUartPs driver.
*
*
* @param DeviceId is the unique ID for the device from hardware build.
*
* @return
* - XST_FAILURE if the UART driver could not be initialized
* successfully.
* - A non-negative number indicating the number of characters
* sent.
*
* @note None.
*
****************************************************************************/
int UartPsHelloWorldExample(u16 DeviceId)
{
u8 HelloWorld[] = "Hello World";
int SentCount = 0;
int Status;
XUartPs_Config *Config;
/*
* Initialize the UART driver so that it's ready to use
* Look up the configuration in the config table and then initialize it.
*/
Config = XUartPs_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XUartPs_CfgInitialize(&Uart_Ps, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
XUartPs_SetBaudRate(&Uart_Ps, 115200);
while (SentCount < (sizeof(HelloWorld) - 1)) {
/*
* Transmit the data
*/
SentCount += XUartPs_Send(&Uart_Ps,
&HelloWorld[SentCount], 1);
}
return SentCount;
}

454
XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c Normal file
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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_intr_example.c
*
* This file contains a design example using the XUartPs driver in interrupt
* mode. It sends data and expects to receive the same data through the device
* using the local loopback mode.
*
*
* @note
* The example contains an infinite loop such that if interrupts are not
* working it may hang.
*
* MODIFICATION HISTORY:
* <pre>
* Ver Who Date Changes
* ----- ------ -------- ----------------------------------------------
* 1.00a drg/jz 01/13/10 First Release
* 1.00a sdm 05/25/11 Modified the example for supporting Peripheral tests
* in SDK
* 1.03a sg 07/16/12 Updated the example for CR 666306. Modified
* the device ID to use the first Device Id
* and increased the receive timeout to 8
* Removed the printf at the start of the main
* Put the device normal mode at the end of the example
*
*
* </pre>
****************************************************************************/
/***************************** Include Files *******************************/
#include "xparameters.h"
#include "xuartps.h"
#include "xscugic.h"
#include "xil_exception.h"
#include "xil_printf.h"
/************************** Constant Definitions **************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
#define UART_INT_IRQ_ID XPAR_XUARTPS_1_INTR
/*
* The following constant controls the length of the buffers to be sent
* and received with the UART,
*/
#define TEST_BUFFER_SIZE 100
/**************************** Type Definitions ******************************/
/************************** Function Prototypes *****************************/
int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr,
u16 DeviceId, u16 UartIntrId);
static int SetupInterruptSystem(XScuGic *IntcInstancePtr,
XUartPs *UartInstancePtr,
u16 UartIntrId);
void Handler(void *CallBackRef, u32 Event, unsigned int EventData);
/************************** Variable Definitions ***************************/
XUartPs UartPs ; /* Instance of the UART Device */
XScuGic InterruptController; /* Instance of the Interrupt Controller */
/*
* The following buffers are used in this example to send and receive data
* with the UART.
*/
static u8 SendBuffer[TEST_BUFFER_SIZE]; /* Buffer for Transmitting Data */
static u8 RecvBuffer[TEST_BUFFER_SIZE]; /* Buffer for Receiving Data */
/*
* The following counters are used to determine when the entire buffer has
* been sent and received.
*/
volatile int TotalReceivedCount;
volatile int TotalSentCount;
int TotalErrorCount;
/**************************************************************************/
/**
*
* Main function to call the Uart interrupt example.
*
* @param None
*
* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful
*
* @note None
*
**************************************************************************/
#ifndef TESTAPP_GEN
int main(void)
{
int Status;
/*
* Run the UartPs Interrupt example, specify the the Device ID
*/
Status = UartPsIntrExample(&InterruptController, &UartPs,
UART_DEVICE_ID, UART_INT_IRQ_ID);
if (Status != XST_SUCCESS) {
xil_printf("UART Interrupt Example Test Failed\r\n");
return XST_FAILURE;
}
xil_printf("Successfully ran UART Interrupt Example Test\r\n");
return XST_SUCCESS;
}
#endif
/**************************************************************************/
/**
*
* This function does a minimal test on the UartPS device and driver as a
* design example. The purpose of this function is to illustrate
* how to use the XUartPs driver.
*
* This function sends data and expects to receive the same data through the
* device using the local loopback mode.
*
* This function uses interrupt mode of the device.
*
* @param IntcInstPtr is a pointer to the instance of the Scu Gic driver.
* @param UartInstPtr is a pointer to the instance of the UART driver
* which is going to be connected to the interrupt controller.
* @param DeviceId is the device Id of the UART device and is typically
* XPAR_<UARTPS_instance>_DEVICE_ID value from xparameters.h.
* @param UartIntrId is the interrupt Id and is typically
* XPAR_<UARTPS_instance>_INTR value from xparameters.h.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note
*
* This function contains an infinite loop such that if interrupts are not
* working it may never return.
*
**************************************************************************/
int UartPsIntrExample(XScuGic *IntcInstPtr, XUartPs *UartInstPtr,
u16 DeviceId, u16 UartIntrId)
{
int Status;
XUartPs_Config *Config;
int Index;
u32 IntrMask;
int BadByteCount = 0;
/*
* Initialize the UART driver so that it's ready to use
* Look up the configuration in the config table, then initialize it.
*/
Config = XUartPs_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XUartPs_CfgInitialize(UartInstPtr, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Check hardware build
*/
Status = XUartPs_SelfTest(UartInstPtr);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect the UART to the interrupt subsystem such that interrupts
* can occur. This function is application specific.
*/
Status = SetupInterruptSystem(IntcInstPtr, UartInstPtr, UartIntrId);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Setup the handlers for the UART that will be called from the
* interrupt context when data has been sent and received, specify
* a pointer to the UART driver instance as the callback reference
* so the handlers are able to access the instance data
*/
XUartPs_SetHandler(UartInstPtr, (XUartPs_Handler)Handler, UartInstPtr);
/*
* Enable the interrupt of the UART so interrupts will occur, setup
* a local loopback so data that is sent will be received.
*/
IntrMask =
XUARTPS_IXR_TOUT | XUARTPS_IXR_PARITY | XUARTPS_IXR_FRAMING |
XUARTPS_IXR_OVER | XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXFULL |
XUARTPS_IXR_RXOVR;
XUartPs_SetInterruptMask(UartInstPtr, IntrMask);
XUartPs_SetOperMode(UartInstPtr, XUARTPS_OPER_MODE_LOCAL_LOOP);
/*
* Set the receiver timeout. If it is not set, and the last few bytes
* of data do not trigger the over-water or full interrupt, the bytes
* will not be received. By default it is disabled.
*
* The setting of 8 will timeout after 8 x 4 = 32 character times.
* Increase the time out value if baud rate is high, decrease it if
* baud rate is low.
*/
XUartPs_SetRecvTimeout(UartInstPtr, 8);
/*
* Initialize the send buffer bytes with a pattern and the
* the receive buffer bytes to zero to allow the receive data to be
* verified
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = (Index % 26) + 'A';
RecvBuffer[Index] = 0;
}
/*
* Start receiving data before sending it since there is a loopback,
* ignoring the number of bytes received as the return value since we
* know it will be zero
*/
XUartPs_Recv(UartInstPtr, RecvBuffer, TEST_BUFFER_SIZE);
/*
* Send the buffer using the UART and ignore the number of bytes sent
* as the return value since we are using it in interrupt mode.
*/
XUartPs_Send(UartInstPtr, SendBuffer, TEST_BUFFER_SIZE);
/*
* Wait for the entire buffer to be received, letting the interrupt
* processing work in the background, this function may get locked
* up in this loop if the interrupts are not working correctly.
*/
while (1) {
if ((TotalSentCount == TEST_BUFFER_SIZE) &&
(TotalReceivedCount == TEST_BUFFER_SIZE)) {
break;
}
}
/*
* Verify the entire receive buffer was successfully received
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
if (RecvBuffer[Index] != SendBuffer[Index]) {
BadByteCount++;
}
}
/*
* Set the UART in Normal Mode
*/
XUartPs_SetOperMode(UartInstPtr, XUARTPS_OPER_MODE_NORMAL);
/*
* If any bytes were not correct, return an error
*/
if (BadByteCount != 0) {
return XST_FAILURE;
}
return XST_SUCCESS;
}
/**************************************************************************/
/**
*
* This function is the handler which performs processing to handle data events
* from the device. It is called from an interrupt context. so the amount of
* processing should be minimal.
*
* This handler provides an example of how to handle data for the device and
* is application specific.
*
* @param CallBackRef contains a callback reference from the driver,
* in this case it is the instance pointer for the XUartPs driver.
* @param Event contains the specific kind of event that has occurred.
* @param EventData contains the number of bytes sent or received for sent
* and receive events.
*
* @return None.
*
* @note None.
*
***************************************************************************/
void Handler(void *CallBackRef, u32 Event, unsigned int EventData)
{
/*
* All of the data has been sent
*/
if (Event == XUARTPS_EVENT_SENT_DATA) {
TotalSentCount = EventData;
}
/*
* All of the data has been received
*/
if (Event == XUARTPS_EVENT_RECV_DATA) {
TotalReceivedCount = EventData;
}
/*
* Data was received, but not the expected number of bytes, a
* timeout just indicates the data stopped for 8 character times
*/
if (Event == XUARTPS_EVENT_RECV_TOUT) {
TotalReceivedCount = EventData;
}
/*
* Data was received with an error, keep the data but determine
* what kind of errors occurred
*/
if (Event == XUARTPS_EVENT_RECV_ERROR) {
TotalReceivedCount = EventData;
TotalErrorCount++;
}
}
/*****************************************************************************/
/**
*
* This function sets up the interrupt system so interrupts can occur for the
* Uart. This function is application-specific. The user should modify this
* function to fit the application.
*
* @param IntcInstancePtr is a pointer to the instance of the INTC.
* @param UartInstancePtr contains a pointer to the instance of the UART
* driver which is going to be connected to the interrupt
* controller.
* @param UartIntrId is the interrupt Id and is typically
* XPAR_<UARTPS_instance>_INTR value from xparameters.h.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
****************************************************************************/
static int SetupInterruptSystem(XScuGic *IntcInstancePtr,
XUartPs *UartInstancePtr,
u16 UartIntrId)
{
int Status;
#ifndef TESTAPP_GEN
XScuGic_Config *IntcConfig; /* Config for interrupt controller */
/*
* Initialize the interrupt controller driver
*/
IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
if (NULL == IntcConfig) {
return XST_FAILURE;
}
Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
IntcConfig->CpuBaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect the interrupt controller interrupt handler to the
* hardware interrupt handling logic in the processor.
*/
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
(Xil_ExceptionHandler) XScuGic_InterruptHandler,
IntcInstancePtr);
#endif
/*
* Connect a device driver handler that will be called when an
* interrupt for the device occurs, the device driver handler
* performs the specific interrupt processing for the device
*/
Status = XScuGic_Connect(IntcInstancePtr, UartIntrId,
(Xil_ExceptionHandler) XUartPs_InterruptHandler,
(void *) UartInstancePtr);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Enable the interrupt for the device
*/
XScuGic_Enable(IntcInstancePtr, UartIntrId);
#ifndef TESTAPP_GEN
/*
* Enable interrupts
*/
Xil_ExceptionEnable();
#endif
return XST_SUCCESS;
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
* @file xuartps_low_echo_example.c
*
* This file contains a design example using the hardware interface.
*
* First, certain character sequence is output onto the terminal. Then any
* characters typed in are echoed back, for letters, cases are switched.
* An 'ESC' character terminates the execution of the example.
*
* This example requires an external SchmartModule to be connected to the
* appropriate pins for the device through a daughter board. The test uses
* the default settings of the device:
* . baud rate of 9600
* . 8 bits data
* . 1 stop bit
* . no parity
*
* @note
* The test hangs if communication channel from the user terminal to the device
* is broken.
*
* MODIFICATION HISTORY:
* <pre>
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------------
* 1.00a drg/jz 01/13/10 First release
* </pre>
****************************************************************************/
/***************************** Include Files *******************************/
#include "xparameters.h"
#include "xstatus.h"
#include "xil_types.h"
#include "xil_assert.h"
#include "xuartps_hw.h"
/************************** Constant Definitions ***************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define UART_BASEADDR XPAR_XUARTPS_0_BASEADDR
#define UART_CLOCK_HZ XPAR_XUARTPS_0_CLOCK_HZ
/*
* The following constant controls the length of the buffers to be sent
* and received with the device. This constant must be 32 bytes or less so the
* entire buffer will fit into the TX and RX FIFOs of the device.
*/
#define TEST_BUFFER_SIZE 16
#define CHAR_ESC 0x1b /* 'ESC' character is used as terminator */
/**************************** Type Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *******************/
/************************** Function Prototypes ****************************/
int UartPsEchoExample(u32 UartBaseAddress);
/************************** Variable Definitions ***************************/
/*
* The following buffers are used in this example to send and receive data
* with the UART.
*/
u8 SendBuffer[TEST_BUFFER_SIZE]; /* Buffer for Transmitting Data */
/***************************************************************************/
/**
*
* Main function to call the Uart Echo example.
*
* @param None
*
* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful
*
* @note None
*
****************************************************************************/
int main(void)
{
int Status;
/*
* Run the Uart Echo example , specify the Base Address that is
* generated in xparameters.h
*/
Status = UartPsEchoExample(UART_BASEADDR);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
return XST_SUCCESS;
}
/**************************************************************************/
/**
*
* This function does a minimal test on the UART device using the hardware
* interface.
*
* @param UartBaseAddress is the base address of the device
*
* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful
*
* @note None.
*
**************************************************************************/
int UartPsEchoExample(u32 UartBaseAddress)
{
int Index;
u32 Running;
u8 RecvChar;
u32 CntrlRegister;
CntrlRegister = XUartPs_ReadReg(UartBaseAddress, XUARTPS_CR_OFFSET);
/*
* Enable TX and RX for the device
*/
XUartPs_WriteReg(UartBaseAddress, XUARTPS_CR_OFFSET,
((CntrlRegister & ~XUARTPS_CR_EN_DIS_MASK) |
XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN));
/*
* Initialize the send buffer bytes with a pattern to send and the
* the receive buffer bytes to zero
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = Index + '0';
}
/*
* Send the entire transmit buffer.
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
/*
* Wait until there is space in TX FIFO
*/
while (XUartPs_IsTransmitFull(UartBaseAddress));
/*
* Write the byte into the TX FIFO
*/
XUartPs_WriteReg(UartBaseAddress, XUARTPS_FIFO_OFFSET,
SendBuffer[Index]);
}
Running = TRUE;
while (Running) {
/*
* Wait until there is data
*/
while (!XUartPs_IsReceiveData(UartBaseAddress));
RecvChar = XUartPs_ReadReg(UartBaseAddress,
XUARTPS_FIFO_OFFSET);
/* Change the capitalization */
if (('a' <= RecvChar) && ('z' >= RecvChar)) {
/* Convert the Capital letter to a small. */
RecvChar = RecvChar - 'a' + 'A';
}
else if (('A' <= RecvChar) && ('Z' >= RecvChar)) {
/* Convert the small letter to a Capital. */
RecvChar = RecvChar - 'A' + 'a';
}
else if (CHAR_ESC == RecvChar) {
Running = FALSE;
}
/* Echo the character back */
XUartPs_WriteReg(UartBaseAddress, XUARTPS_FIFO_OFFSET,
RecvChar);
}
return XST_SUCCESS;
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_polled_example.c
*
* This file contains an example using the XUartPs driver in polled mode.
*
* This function sends data and expects to receive the data thru the device
* using the local loopback mode.
*
* @note
* If the device does not work properly, the example may hang.
*
* MODIFICATION HISTORY:
* <pre>
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00a drg/jz 01/13/10 First Release
* 1.03a sg 07/16/12 Modified the device ID to use the first Device Id
* Removed the printf at the start of the main
* </pre>
******************************************************************************/
/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xuartps.h"
#include "xil_printf.h"
/************************** Constant Definitions *****************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
/*
* The following constant controls the length of the buffers to be sent
* and received with the device, this constant must be 32 bytes or less since
* only as much as FIFO size data can be sent or received in polled mode.
*/
#define TEST_BUFFER_SIZE 32
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
int UartPsPolledExample(u16 DeviceId);
/************************** Variable Definitions *****************************/
XUartPs Uart_PS; /* Instance of the UART Device */
/*
* The following buffers are used in this example to send and receive data
* with the UART.
*/
static u8 SendBuffer[TEST_BUFFER_SIZE]; /* Buffer for Transmitting Data */
static u8 RecvBuffer[TEST_BUFFER_SIZE]; /* Buffer for Receiving Data */
/*****************************************************************************/
/**
*
* Main function to call the Uart Polled mode example.
*
* @param None
*
* @return XST_SUCCESS if succesful, otherwise XST_FAILURE
*
* @note None
*
******************************************************************************/
#ifndef TESTAPP_GEN
int main(void)
{
int Status;
/*
* Run the Uart_PS polled example , specify the the Device ID that is
* generated in xparameters.h
*/
Status = UartPsPolledExample(UART_DEVICE_ID);
if (Status != XST_SUCCESS) {
xil_printf("UART Polled Mode Example Test Failed\r\n");
return XST_FAILURE;
}
xil_printf("Successfully ran UART Polled Mode Example Test\r\n");
return XST_SUCCESS;
}
#endif
/*****************************************************************************/
/**
*
* This function does a minimal test on the XUartPs device in polled mode.
*
* This function sends data and expects to receive the data thru the UART
* using the local loopback mode.
*
*
* @param DeviceId is the unique device id from hardware build.
*
* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful
*
* @note
* This function polls the UART, it may hang if the hardware is not
* working correctly.
*
****************************************************************************/
int UartPsPolledExample(u16 DeviceId)
{
int Status;
XUartPs_Config *Config;
unsigned int SentCount;
unsigned int ReceivedCount;
u16 Index;
u32 LoopCount = 0;
/*
* Initialize the UART driver so that it's ready to use.
* Look up the configuration in the config table, then initialize it.
*/
Config = XUartPs_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XUartPs_CfgInitialize(&Uart_PS, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Check hardware build.
*/
Status = XUartPs_SelfTest(&Uart_PS);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Use local loopback mode.
*/
XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_LOCAL_LOOP);
/*
* Initialize the send buffer bytes with a pattern and zero out
* the receive buffer.
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = '0' + Index;
RecvBuffer[Index] = 0;
}
/*
* Block sending the buffer.
*/
SentCount = XUartPs_Send(&Uart_PS, SendBuffer, TEST_BUFFER_SIZE);
if (SentCount != TEST_BUFFER_SIZE) {
return XST_FAILURE;
}
/*
* Wait while the UART is sending the data so that we are guaranteed
* to get the data the 1st time we call receive, otherwise this function
* may enter receive before the data has arrived
*/
while (XUartPs_IsSending(&Uart_PS)) {
LoopCount++;
}
/*
* Block receiving the buffer.
*/
ReceivedCount = 0;
while (ReceivedCount < TEST_BUFFER_SIZE) {
ReceivedCount +=
XUartPs_Recv(&Uart_PS, &RecvBuffer[ReceivedCount],
(TEST_BUFFER_SIZE - ReceivedCount));
}
/*
* Check the receive buffer against the send buffer and verify the
* data was correctly received
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
if (SendBuffer[Index] != RecvBuffer[Index]) {
return XST_FAILURE;
}
}
/*
* Restore to normal mode.
*/
XUartPs_SetOperMode(&Uart_PS, XUARTPS_OPER_MODE_NORMAL);
return XST_SUCCESS;
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_selftest_example.c
*
* This file contains an example using the XUartPs driver to do self test
* on the device.
*
* @note
*
* None
*
* MODIFICATION HISTORY:
* <pre>
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00a drg/jz 01/13/10 First Release
* 1.03a sg 08/14/12 Updated the example for CR 666306. Modified
* the device ID to use the first Device Id
* Removed the printf at the start of the main
* </pre>
******************************************************************************/
/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xuartps.h"
#include "xil_printf.h"
/************************** Constant Definitions *****************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
int UartPsSelfTestExample(u16 DeviceId);
/************************** Variable Definitions *****************************/
XUartPs Uart_Ps; /* Instance of the UART Device */
/*****************************************************************************/
/**
*
* Main function to call the example.
*
* @param None
*
* @return XST_SUCCESS if succesful, otherwise XST_FAILURE
*
* @note None
*
******************************************************************************/
int main(void)
{
int Status;
/*
* Run the selftest example
*/
Status = UartPsSelfTestExample(UART_DEVICE_ID);
if (Status != XST_SUCCESS) {
xil_printf("UART Selftest Example Failed\r\n");
return XST_FAILURE;
}
xil_printf("Successfully ran UART Selftest Example\r\n");
return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function does a minimal test on the XUartPs driver.
*
*
* @param DeviceId is the XPAR_<UARTPS_instance>_DEVICE_ID value from
* xparameters.h
*
* @return XST_SUCCESS if succesful, otherwise XST_FAILURE
*
* @note None
*
****************************************************************************/
int UartPsSelfTestExample(u16 DeviceId)
{
int Status;
XUartPs_Config *Config;
/*
* Initialize the UART driver so that it's ready to use
* Look up the configuration in the config table,
* then initialize it.
*/
Config = XUartPs_LookupConfig(DeviceId);
if (NULL == Config) {
return XST_FAILURE;
}
Status = XUartPs_CfgInitialize(&Uart_Ps, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Perform a self-test to check hardware build.
*/
Status = XUartPs_SelfTest(&Uart_Ps);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
return XST_SUCCESS;
}

40
XilinxProcessorIPLib/drivers/uartps/src/Makefile Normal file
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COMPILER=
ARCHIVER=
CP=cp
COMPILER_FLAGS=
EXTRA_COMPILER_FLAGS=
LIB=libxil.a
CC_FLAGS = $(COMPILER_FLAGS)
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
RELEASEDIR=../../../lib
INCLUDEDIR=../../../include
INCLUDES=-I./. -I${INCLUDEDIR}
OUTS = *.o
LIBSOURCES:=*.c
INCLUDEFILES:=*.h
OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
libs: banner xuartps_libs clean
%.o: %.c
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
banner:
echo "Compiling uartps"
xuartps_libs: ${OBJECTS}
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
.PHONY: include
include: xuartps_includes
xuartps_includes:
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
clean:
rm -rf ${OBJECTS}

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/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps.c
*
* This file contains the implementation of the interface functions for XUartPs
* driver. Refer to the header file xuartps.h for more detailed information.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ----------------------------------------------
* 1.00 drg/jz 01/13/10 First Release
* 2.2 hk 06/23/14 SW reset of RX and TX should be done when changing
* baud rate. CR# 804281.
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
* </pre>
*
*****************************************************************************/
/***************************** Include Files ********************************/
#include "xstatus.h"
#include "xuartps.h"
#include "xil_io.h"
/************************** Constant Definitions ****************************/
/* The following constant defines the amount of error that is allowed for
* a specified baud rate. This error is the difference between the actual
* baud rate that will be generated using the specified clock and the
* desired baud rate.
*/
#define XUARTPS_MAX_BAUD_ERROR_RATE 3U /* max % error allowed */
/**************************** Type Definitions ******************************/
/***************** Macros (Inline Functions) Definitions ********************/
/************************** Function Prototypes *****************************/
static void XUartPs_StubHandler(void *CallBackRef, u32 Event,
u32 ByteCount);
u32 XUartPs_SendBuffer(XUartPs *InstancePtr);
u32 XUartPs_ReceiveBuffer(XUartPs *InstancePtr);
/************************** Variable Definitions ****************************/
/****************************************************************************/
/**
*
* Initializes a specific XUartPs instance such that it is ready to be used.
* The data format of the device is setup for 8 data bits, 1 stop bit, and no
* parity by default. The baud rate is set to a default value specified by
* Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. The
* receive FIFO threshold is set for 8 bytes. The default operating mode of the
* driver is polled mode.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param Config is a reference to a structure containing information
* about a specific XUartPs driver.
* @param EffectiveAddr is the device base address in the virtual memory
* address space. The caller is responsible for keeping the address
* mapping from EffectiveAddr to the device physical base address
* unchanged once this function is invoked. Unexpected errors may
* occur if the address mapping changes after this function is
* called. If address translation is not used, pass in the physical
* address instead.
*
* @return
*
* - XST_SUCCESS if initialization was successful
* - XST_UART_BAUD_ERROR if the baud rate is not possible because
* the inputclock frequency is not divisible with an acceptable
* amount of error
*
* @note
*
* The default configuration for the UART after initialization is:
*
* - 19,200 bps or XPAR_DFT_BAUDRATE if defined
* - 8 data bits
* - 1 stop bit
* - no parity
* - FIFO's are enabled with a receive threshold of 8 bytes
* - The RX timeout is enabled with a timeout of 1 (4 char times)
*
* All interrupts are disabled.
*
*****************************************************************************/
s32 XUartPs_CfgInitialize(XUartPs *InstancePtr,
XUartPs_Config * Config, u32 EffectiveAddr)
{
s32 Status;
u32 ModeRegister;
u32 BaudRate;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Config != NULL);
/*
* Setup the driver instance using passed in parameters
*/
InstancePtr->Config.BaseAddress = EffectiveAddr;
InstancePtr->Config.InputClockHz = Config->InputClockHz;
InstancePtr->Config.ModemPinsConnected = Config->ModemPinsConnected;
/*
* Initialize other instance data to default values
*/
InstancePtr->Handler = XUartPs_StubHandler;
InstancePtr->SendBuffer.NextBytePtr = NULL;
InstancePtr->SendBuffer.RemainingBytes = 0U;
InstancePtr->SendBuffer.RequestedBytes = 0U;
InstancePtr->ReceiveBuffer.NextBytePtr = NULL;
InstancePtr->ReceiveBuffer.RemainingBytes = 0U;
InstancePtr->ReceiveBuffer.RequestedBytes = 0U;
/*
* Flag that the driver instance is ready to use
*/
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
/*
* Set the default baud rate here, can be changed prior to
* starting the device
*/
BaudRate = (u32)XUARTPS_DFT_BAUDRATE;
Status = XUartPs_SetBaudRate(InstancePtr, BaudRate);
if (Status != (s32)XST_SUCCESS) {
InstancePtr->IsReady = 0U;
} else {
/*
* Set up the default data format: 8 bit data, 1 stop bit, no
* parity
*/
ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
/*
* Mask off what's already there
*/
ModeRegister &= (~((u32)XUARTPS_MR_CHARLEN_MASK |
(u32)XUARTPS_MR_STOPMODE_MASK |
(u32)XUARTPS_MR_PARITY_MASK));
/*
* Set the register value to the desired data format
*/
ModeRegister |= ((u32)XUARTPS_MR_CHARLEN_8_BIT |
(u32)XUARTPS_MR_STOPMODE_1_BIT |
(u32)XUARTPS_MR_PARITY_NONE);
/*
* Write the mode register out
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
ModeRegister);
/*
* Set the RX FIFO trigger at 8 data bytes.
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_RXWM_OFFSET, 0x08U);
/*
* Set the RX timeout to 1, which will be 4 character time
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_RXTOUT_OFFSET, 0x01U);
/*
* Disable all interrupts, polled mode is the default
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
XUARTPS_IXR_MASK);
Status = XST_SUCCESS;
}
return Status;
}
/****************************************************************************/
/**
*
* This functions sends the specified buffer using the device in either
* polled or interrupt driven mode. This function is non-blocking, if the device
* is busy sending data, it will return and indicate zero bytes were sent.
* Otherwise, it fills the TX FIFO as much as it can, and return the number of
* bytes sent.
*
* In a polled mode, this function will only send as much data as TX FIFO can
* buffer. The application may need to call it repeatedly to send the entire
* buffer.
*
* In interrupt mode, this function will start sending the specified buffer,
* then the interrupt handler will continue sending data until the entire
* buffer has been sent. A callback function, as specified by the application,
* will be called to indicate the completion of sending.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param BufferPtr is pointer to a buffer of data to be sent.
* @param NumBytes contains the number of bytes to be sent. A value of
* zero will stop a previous send operation that is in progress
* in interrupt mode. Any data that was already put into the
* transmit FIFO will be sent.
*
* @return The number of bytes actually sent.
*
* @note
*
* The number of bytes is not asserted so that this function may be called with
* a value of zero to stop an operation that is already in progress.
* <br><br>
*
*****************************************************************************/
u32 XUartPs_Send(XUartPs *InstancePtr, u8 *BufferPtr,
u32 NumBytes)
{
u32 BytesSent;
/*
* Asserts validate the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(BufferPtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Disable the UART transmit interrupts to allow this call to stop a
* previous operation that may be interrupt driven.
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
(XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_TXFULL));
/*
* Setup the buffer parameters
*/
InstancePtr->SendBuffer.RequestedBytes = NumBytes;
InstancePtr->SendBuffer.RemainingBytes = NumBytes;
InstancePtr->SendBuffer.NextBytePtr = BufferPtr;
/*
* Transmit interrupts will be enabled in XUartPs_SendBuffer(), after
* filling the TX FIFO.
*/
BytesSent = XUartPs_SendBuffer(InstancePtr);
return BytesSent;
}
/****************************************************************************/
/**
*
* This function attempts to receive a specified number of bytes of data
* from the device and store it into the specified buffer. This function works
* for both polled or interrupt driven modes. It is non-blocking.
*
* In a polled mode, this function will only receive the data already in the
* RX FIFO. The application may need to call it repeatedly to receive the
* entire buffer. Polled mode is the default mode of operation for the device.
*
* In interrupt mode, this function will start the receiving, if not the entire
* buffer has been received, the interrupt handler will continue receiving data
* until the entire buffer has been received. A callback function, as specified
* by the application, will be called to indicate the completion of the
* receiving or error conditions.
*
* @param InstancePtr is a pointer to the XUartPs instance
* @param BufferPtr is pointer to buffer for data to be received into
* @param NumBytes is the number of bytes to be received. A value of zero
* will stop a previous receive operation that is in progress in
* interrupt mode.
*
* @return The number of bytes received.
*
* @note
*
* The number of bytes is not asserted so that this function may be called
* with a value of zero to stop an operation that is already in progress.
*
*****************************************************************************/
u32 XUartPs_Recv(XUartPs *InstancePtr,
u8 *BufferPtr, u32 NumBytes)
{
u32 ReceivedCount;
u32 ImrRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(BufferPtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Disable all the interrupts.
* This stops a previous operation that may be interrupt driven
*/
ImrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_IMR_OFFSET);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
XUARTPS_IXR_MASK);
/*
* Setup the buffer parameters
*/
InstancePtr->ReceiveBuffer.RequestedBytes = NumBytes;
InstancePtr->ReceiveBuffer.RemainingBytes = NumBytes;
InstancePtr->ReceiveBuffer.NextBytePtr = BufferPtr;
/*
* Receive the data from the device
*/
ReceivedCount = XUartPs_ReceiveBuffer(InstancePtr);
/*
* Restore the interrupt state
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IER_OFFSET,
ImrRegister);
return ReceivedCount;
}
/****************************************************************************/
/*
*
* This function sends a buffer that has been previously specified by setting
* up the instance variables of the instance. This function is an internal
* function for the XUartPs driver such that it may be called from a shell
* function that sets up the buffer or from an interrupt handler.
*
* This function sends the specified buffer in either polled or interrupt
* driven modes. This function is non-blocking.
*
* In a polled mode, this function only sends as much data as the TX FIFO
* can buffer. The application may need to call it repeatedly to send the
* entire buffer.
*
* In interrupt mode, this function starts the sending of the buffer, if not
* the entire buffer has been sent, then the interrupt handler continues the
* sending until the entire buffer has been sent. A callback function, as
* specified by the application, will be called to indicate the completion of
* sending.
*
* @param InstancePtr is a pointer to the XUartPs instance
*
* @return The number of bytes actually sent
*
* @note None.
*
*****************************************************************************/
u32 XUartPs_SendBuffer(XUartPs *InstancePtr)
{
u32 SentCount = 0U;
u32 ImrRegister;
/*
* If the TX FIFO is full, send nothing.
* Otherwise put bytes into the TX FIFO unil it is full, or all of the
* data has been put into the FIFO.
*/
while ((!XUartPs_IsTransmitFull(InstancePtr->Config.BaseAddress)) &&
(InstancePtr->SendBuffer.RemainingBytes > SentCount)) {
/*
* Fill the FIFO from the buffer
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_FIFO_OFFSET,
((u32)InstancePtr->SendBuffer.
NextBytePtr[SentCount]));
/*
* Increment the send count.
*/
SentCount++;
}
/*
* Update the buffer to reflect the bytes that were sent from it
*/
InstancePtr->SendBuffer.NextBytePtr += SentCount;
InstancePtr->SendBuffer.RemainingBytes -= SentCount;
/*
* If interrupts are enabled as indicated by the receive interrupt, then
* enable the TX FIFO empty interrupt, so further action can be taken
* for this sending.
*/
ImrRegister =
XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_IMR_OFFSET);
if (((ImrRegister & XUARTPS_IXR_RXFULL) != (u32)0) ||
((ImrRegister & XUARTPS_IXR_RXEMPTY) != (u32)0)||
((ImrRegister & XUARTPS_IXR_RXOVR) != (u32)0)) {
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_IER_OFFSET,
ImrRegister | (u32)XUARTPS_IXR_TXEMPTY);
}
return SentCount;
}
/****************************************************************************/
/*
*
* This function receives a buffer that has been previously specified by setting
* up the instance variables of the instance. This function is an internal
* function, and it may be called from a shell function that sets up the buffer
* or from an interrupt handler.
*
* This function attempts to receive a specified number of bytes from the
* device and store it into the specified buffer. This function works for
* either polled or interrupt driven modes. It is non-blocking.
*
* In polled mode, this function only receives as much data as in the RX FIFO.
* The application may need to call it repeatedly to receive the entire buffer.
* Polled mode is the default mode for the driver.
*
* In interrupt mode, this function starts the receiving, if not the entire
* buffer has been received, the interrupt handler will continue until the
* entire buffer has been received. A callback function, as specified by the
* application, will be called to indicate the completion of the receiving or
* error conditions.
*
* @param InstancePtr is a pointer to the XUartPs instance
*
* @return The number of bytes received.
*
* @note None.
*
*****************************************************************************/
u32 XUartPs_ReceiveBuffer(XUartPs *InstancePtr)
{
u32 CsrRegister;
u32 ReceivedCount = 0U;
/*
* Read the Channel Status Register to determine if there is any data in
* the RX FIFO
*/
CsrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_SR_OFFSET);
/*
* Loop until there is no more data in RX FIFO or the specified
* number of bytes has been received
*/
while((ReceivedCount < InstancePtr->ReceiveBuffer.RemainingBytes)&&
(((CsrRegister & XUARTPS_SR_RXEMPTY) == (u32)0))){
InstancePtr->ReceiveBuffer.NextBytePtr[ReceivedCount] =
XUartPs_ReadReg(InstancePtr->Config.
BaseAddress,
XUARTPS_FIFO_OFFSET);
ReceivedCount++;
CsrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_SR_OFFSET);
}
/*
* Update the receive buffer to reflect the number of bytes just
* received
*/
if(InstancePtr->ReceiveBuffer.NextBytePtr != NULL){
InstancePtr->ReceiveBuffer.NextBytePtr += ReceivedCount;
}
InstancePtr->ReceiveBuffer.RemainingBytes -= ReceivedCount;
return ReceivedCount;
}
/*****************************************************************************/
/**
*
* Sets the baud rate for the device. Checks the input value for
* validity and also verifies that the requested rate can be configured to
* within the maximum error range specified by XUARTPS_MAX_BAUD_ERROR_RATE.
* If the provided rate is not possible, the current setting is unchanged.
*
* @param InstancePtr is a pointer to the XUartPs instance
* @param BaudRate to be set
*
* @return
* - XST_SUCCESS if everything configured as expected
* - XST_UART_BAUD_ERROR if the requested rate is not available
* because there was too much error
*
* @note None.
*
*****************************************************************************/
s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate)
{
u32 IterBAUDDIV; /* Iterator for available baud divisor values */
u32 BRGR_Value; /* Calculated value for baud rate generator */
u32 CalcBaudRate; /* Calculated baud rate */
u32 BaudError; /* Diff between calculated and requested baud rate */
u32 Best_BRGR = 0U; /* Best value for baud rate generator */
u8 Best_BAUDDIV = 0U; /* Best value for baud divisor */
u32 Best_Error = 0xFFFFFFFFU;
u32 PercentError;
u32 ModeReg;
u32 InputClk;
/*
* Asserts validate the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertNonvoid(BaudRate <= (u32)XUARTPS_MAX_RATE);
Xil_AssertNonvoid(BaudRate >= (u32)XUARTPS_MIN_RATE);
/*
* Make sure the baud rate is not impossilby large.
* Fastest possible baud rate is Input Clock / 2.
*/
if ((BaudRate * 2) > InstancePtr->Config.InputClockHz) {
return XST_UART_BAUD_ERROR;
}
/*
* Check whether the input clock is divided by 8
*/
ModeReg = XUartPs_ReadReg( InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
InputClk = InstancePtr->Config.InputClockHz;
if(ModeReg & XUARTPS_MR_CLKSEL) {
InputClk = InstancePtr->Config.InputClockHz / 8;
}
/*
* Determine the Baud divider. It can be 4to 254.
* Loop through all possible combinations
*/
for (IterBAUDDIV = 4; IterBAUDDIV < 255; IterBAUDDIV++) {
/*
* Calculate the value for BRGR register
*/
BRGR_Value = InputClk / (BaudRate * (IterBAUDDIV + 1));
/*
* Calculate the baud rate from the BRGR value
*/
CalcBaudRate = InputClk/ (BRGR_Value * (IterBAUDDIV + 1));
/*
* Avoid unsigned integer underflow
*/
if (BaudRate > CalcBaudRate) {
BaudError = BaudRate - CalcBaudRate;
}
else {
BaudError = CalcBaudRate - BaudRate;
}
/*
* Find the calculated baud rate closest to requested baud rate.
*/
if (Best_Error > BaudError) {
Best_BRGR = BRGR_Value;
Best_BAUDDIV = IterBAUDDIV;
Best_Error = BaudError;
}
}
/*
* Make sure the best error is not too large.
*/
PercentError = (Best_Error * 100) / BaudRate;
if (XUARTPS_MAX_BAUD_ERROR_RATE < PercentError) {
return XST_UART_BAUD_ERROR;
}
/*
* Disable TX and RX to avoid glitches when setting the baud rate.
*/
XUartPs_DisableUart(InstancePtr);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_BAUDGEN_OFFSET, Best_BRGR);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_BAUDDIV_OFFSET, Best_BAUDDIV);
/*
* RX and TX SW reset
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_CR_OFFSET,
XUARTPS_CR_TXRST | XUARTPS_CR_RXRST);
/*
* Enable device
*/
XUartPs_EnableUart(InstancePtr);
InstancePtr->BaudRate = BaudRate;
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function is a stub handler that is the default handler such that if the
* application has not set the handler when interrupts are enabled, this
* function will be called.
*
* @param CallBackRef is unused by this function.
* @param Event is unused by this function.
* @param ByteCount is unused by this function.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void XUartPs_StubHandler(void *CallBackRef, u32 Event,
u32 ByteCount)
{
(void *) CallBackRef;
(void) Event;
(void) ByteCount;
/*
* Assert occurs always since this is a stub and should never be called
*/
Xil_AssertVoidAlways();
}

509
XilinxProcessorIPLib/drivers/uartps/src/xuartps.h Normal file
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@ -0,0 +1,509 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps.h
*
* This driver supports the following features:
*
* - Dynamic data format (baud rate, data bits, stop bits, parity)
* - Polled mode
* - Interrupt driven mode
* - Transmit and receive FIFOs (32 byte FIFO depth)
* - Access to the external modem control lines
*
* <b>Initialization & Configuration</b>
*
* The XUartPs_Config structure is used by the driver to configure itself.
* Fields inside this structure are properties of XUartPs based on its hardware
* build.
*
* To support multiple runtime loading and initialization strategies employed
* by various operating systems, the driver instance can be initialized in the
* following way:
*
* - XUartPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
* configuration structure provided by the caller. If running in a system
* with address translation, the parameter EffectiveAddr should be the
* virtual address.
*
* <b>Baud Rate</b>
*
* The UART has an internal baud rate generator, which furnishes the baud rate
* clock for both the receiver and the transmitter. Ther input clock frequency
* can be either the master clock or the master clock divided by 8, configured
* through the mode register.
*
* Accompanied with the baud rate divider register, the baud rate is determined
* by:
* <pre>
* baud_rate = input_clock / (bgen * (bdiv + 1)
* </pre>
* where bgen is the value of the baud rate generator, and bdiv is the value of
* baud rate divider.
*
* <b>Interrupts</b>
*
* The FIFOs are not flushed when the driver is initialized, but a function is
* provided to allow the user to reset the FIFOs if desired.
*
* The driver defaults to no interrupts at initialization such that interrupts
* must be enabled if desired. An interrupt is generated for one of the
* following conditions.
*
* - A change in the modem signals
* - Data in the receive FIFO for a configuable time without receiver activity
* - A parity error
* - A framing error
* - An overrun error
* - Transmit FIFO is full
* - Transmit FIFO is empty
* - Receive FIFO is full
* - Receive FIFO is empty
* - Data in the receive FIFO equal to the receive threshold
*
* The application can control which interrupts are enabled using the
* XUartPs_SetInterruptMask() function.
*
* In order to use interrupts, it is necessary for the user to connect the
* driver interrupt handler, XUartPs_InterruptHandler(), to the interrupt
* system of the application. A separate handler should be provided by the
* application to communicate with the interrupt system, and conduct
* application specific interrupt handling. An application registers its own
* handler through the XUartPs_SetHandler() function.
*
* <b>Data Transfer</b>
*
* The functions, XUartPs_Send() and XUartPs_Recv(), are provided in the
* driver to allow data to be sent and received. They can be used in either
* polled or interrupt mode.
*
* @note
*
* The default configuration for the UART after initialization is:
*
* - 9,600 bps or XPAR_DFT_BAUDRATE if defined
* - 8 data bits
* - 1 stop bit
* - no parity
* - FIFO's are enabled with a receive threshold of 8 bytes
* - The RX timeout is enabled with a timeout of 1 (4 char times)
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ----------------------------------------------
* 1.00a drg/jz 01/12/10 First Release
* 1.00a sdm 09/27/11 Fixed compiler warnings and also a bug
* in XUartPs_SetFlowDelay where the value was not
* being written to the register.
* 1.01a sdm 12/20/11 Removed the InputClockHz parameter from the XUartPs
* instance structure and the driver is updated to use
* InputClockHz parameter from the XUartPs_Config config
* structure.
* Added a parameter to XUartPs_Config structure which
* specifies whether the user has selected Modem pins
* to be connected to MIO or FMIO.
* Added the tcl file to generate the xparameters.h
* 1.02a sg 05/16/12 Changed XUARTPS_RXWM_MASK to 0x3F for CR 652540 fix.
* 1.03a sg 07/16/12 Updated XUARTPS_FORMAT_7_BITS and XUARTPS_FORMAT_6_BITS
* with the correct values for CR 666724
* Added defines for XUARTPS_IXR_TOVR, XUARTPS_IXR_TNFUL
* and XUARTPS_IXR_TTRIG.
* Modified the name of these defines
* XUARTPS_MEDEMSR_DCDX to XUARTPS_MODEMSR_DDCD
* XUARTPS_MEDEMSR_RIX to XUARTPS_MODEMSR_TERI
* XUARTPS_MEDEMSR_DSRX to XUARTPS_MODEMSR_DDSR
* XUARTPS_MEDEMSR_CTSX to XUARTPS_MODEMSR_DCTS
* 1.05a hk 08/22/13 Added API for uart reset and related
* constant definitions.
* 2.0 hk 03/07/14 Version number revised.
* 2.1 hk 04/16/14 Change XUARTPS_MAX_RATE to 921600. CR# 780625.
* 2.2 hk 06/23/14 SW reset of RX and TX should be done when changing
* baud rate. CR# 804281.
* 3.0 vm 12/09/14 Modified source code according to misrac guideline.
* Support for Zynq Ultrascale Mp added.
*
* </pre>
*
*****************************************************************************/
#ifndef XUARTPS_H /* prevent circular inclusions */
#define XUARTPS_H /* by using protection macros */
#ifdef __cplusplus
extern "C" {
#endif
/***************************** Include Files ********************************/
#include "xil_types.h"
#include "xil_assert.h"
#include "xstatus.h"
#include "xuartps_hw.h"
/************************** Constant Definitions ****************************/
/*
* The following constants indicate the max and min baud rates and these
* numbers are based only on the testing that has been done. The hardware
* is capable of other baud rates.
*/
#define XUARTPS_MAX_RATE 921600U
#define XUARTPS_MIN_RATE 110U
#define XUARTPS_DFT_BAUDRATE 115200U /* Default baud rate */
/** @name Configuration options
* @{
*/
/**
* These constants specify the options that may be set or retrieved
* with the driver, each is a unique bit mask such that multiple options
* may be specified. These constants indicate the available options
* in active state.
*
*/
#define XUARTPS_OPTION_SET_BREAK 0x0080U /**< Starts break transmission */
#define XUARTPS_OPTION_STOP_BREAK 0x0040U /**< Stops break transmission */
#define XUARTPS_OPTION_RESET_TMOUT 0x0020U /**< Reset the receive timeout */
#define XUARTPS_OPTION_RESET_TX 0x0010U /**< Reset the transmitter */
#define XUARTPS_OPTION_RESET_RX 0x0008U /**< Reset the receiver */
#define XUARTPS_OPTION_ASSERT_RTS 0x0004U /**< Assert the RTS bit */
#define XUARTPS_OPTION_ASSERT_DTR 0x0002U /**< Assert the DTR bit */
#define XUARTPS_OPTION_SET_FCM 0x0001U /**< Turn on flow control mode */
/*@}*/
/** @name Channel Operational Mode
*
* The UART can operate in one of four modes: Normal, Local Loopback, Remote
* Loopback, or automatic echo.
*
* @{
*/
#define XUARTPS_OPER_MODE_NORMAL (u8)0x00U /**< Normal Mode */
#define XUARTPS_OPER_MODE_AUTO_ECHO (u8)0x01U /**< Auto Echo Mode */
#define XUARTPS_OPER_MODE_LOCAL_LOOP (u8)0x02U /**< Local Loopback Mode */
#define XUARTPS_OPER_MODE_REMOTE_LOOP (u8)0x03U /**< Remote Loopback Mode */
/* @} */
/** @name Data format values
*
* These constants specify the data format that the driver supports.
* The data format includes the number of data bits, the number of stop
* bits and parity.
*
* @{
*/
#define XUARTPS_FORMAT_8_BITS 0U /**< 8 data bits */
#define XUARTPS_FORMAT_7_BITS 2U /**< 7 data bits */
#define XUARTPS_FORMAT_6_BITS 3U /**< 6 data bits */
#define XUARTPS_FORMAT_NO_PARITY 4U /**< No parity */
#define XUARTPS_FORMAT_MARK_PARITY 3U /**< Mark parity */
#define XUARTPS_FORMAT_SPACE_PARITY 2U /**< parity */
#define XUARTPS_FORMAT_ODD_PARITY 1U /**< Odd parity */
#define XUARTPS_FORMAT_EVEN_PARITY 0U /**< Even parity */
#define XUARTPS_FORMAT_2_STOP_BIT 2U /**< 2 stop bits */
#define XUARTPS_FORMAT_1_5_STOP_BIT 1U /**< 1.5 stop bits */
#define XUARTPS_FORMAT_1_STOP_BIT 0U /**< 1 stop bit */
/*@}*/
/** @name Callback events
*
* These constants specify the handler events that an application can handle
* using its specific handler function. Note that these constants are not bit
* mask, so only one event can be passed to an application at a time.
*
* @{
*/
#define XUARTPS_EVENT_RECV_DATA 1U /**< Data receiving done */
#define XUARTPS_EVENT_RECV_TOUT 2U /**< A receive timeout occurred */
#define XUARTPS_EVENT_SENT_DATA 3U /**< Data transmission done */
#define XUARTPS_EVENT_RECV_ERROR 4U /**< A receive error detected */
#define XUARTPS_EVENT_MODEM 5U /**< Modem status changed */
/*@}*/
/**************************** Type Definitions ******************************/
/**
* This typedef contains configuration information for the device.
*/
typedef struct {
u16 DeviceId; /**< Unique ID of device */
u32 BaseAddress; /**< Base address of device (IPIF) */
u32 InputClockHz;/**< Input clock frequency */
s32 ModemPinsConnected; /** Specifies whether modem pins are connected
* to MIO or FMIO */
} XUartPs_Config;
/*
* Keep track of state information about a data buffer in the interrupt mode.
*/
typedef struct {
u8 *NextBytePtr;
u32 RequestedBytes;
u32 RemainingBytes;
} XUartPsBuffer;
/**
* Keep track of data format setting of a device.
*/
typedef struct {
u32 BaudRate; /**< In bps, ie 1200 */
u32 DataBits; /**< Number of data bits */
u32 Parity; /**< Parity */
u8 StopBits; /**< Number of stop bits */
} XUartPsFormat;
/******************************************************************************/
/**
* This data type defines a handler that an application defines to communicate
* with interrupt system to retrieve state information about an application.
*
* @param CallBackRef is a callback reference passed in by the upper layer
* when setting the handler, and is passed back to the upper layer
* when the handler is called. It is used to find the device driver
* instance.
* @param Event contains one of the event constants indicating events that
* have occurred.
* @param EventData contains the number of bytes sent or received at the
* time of the call for send and receive events and contains the
* modem status for modem events.
*
******************************************************************************/
typedef void (*XUartPs_Handler) (void *CallBackRef, u32 Event,
u32 EventData);
/**
* The XUartPs driver instance data structure. A pointer to an instance data
* structure is passed around by functions to refer to a specific driver
* instance.
*/
typedef struct {
XUartPs_Config Config; /* Configuration data structure */
u32 InputClockHz; /* Input clock frequency */
u32 IsReady; /* Device is initialized and ready */
u32 BaudRate; /* Current baud rate */
XUartPsBuffer SendBuffer;
XUartPsBuffer ReceiveBuffer;
XUartPs_Handler Handler;
void *CallBackRef; /* Callback reference for event handler */
} XUartPs;
/***************** Macros (Inline Functions) Definitions ********************/
/****************************************************************************/
/**
* Get the UART Channel Status Register.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return The value read from the register.
*
* @note C-Style signature:
* u16 XUartPs_GetChannelStatus(XUartPs *InstancePtr)
*
******************************************************************************/
#define XUartPs_GetChannelStatus(InstancePtr) \
Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_SR_OFFSET)
/****************************************************************************/
/**
* Get the UART Mode Control Register.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return The value read from the register.
*
* @note C-Style signature:
* u32 XUartPs_GetControl(XUartPs *InstancePtr)
*
******************************************************************************/
#define XUartPs_GetModeControl(InstancePtr) \
Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_CR_OFFSET)
/****************************************************************************/
/**
* Set the UART Mode Control Register.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param RegisterValue is the value to be written to the register.
*
* @return None.
*
* @note C-Style signature:
* void XUartPs_SetModeControl(XUartPs *InstancePtr, u16 RegisterValue)
*
******************************************************************************/
#define XUartPs_SetModeControl(InstancePtr, RegisterValue) \
Xil_Out32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_CR_OFFSET, \
(u32)(RegisterValue))
/****************************************************************************/
/**
* Enable the transmitter and receiver of the UART.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return None.
*
* @note C-Style signature:
* void XUartPs_EnableUart(XUartPs *InstancePtr)
*
******************************************************************************/
#define XUartPs_EnableUart(InstancePtr) \
Xil_Out32(((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET), \
((Xil_In32((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET) & \
(u32)(~XUARTPS_CR_EN_DIS_MASK)) | ((u32)XUARTPS_CR_RX_EN | (u32)XUARTPS_CR_TX_EN)))
/****************************************************************************/
/**
* Disable the transmitter and receiver of the UART.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return None.
*
* @note C-Style signature:
* void XUartPs_DisableUart(XUartPs *InstancePtr)
*
******************************************************************************/
#define XUartPs_DisableUart(InstancePtr) \
Xil_Out32(((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET), \
(((Xil_In32((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET)) & \
(u32)(~XUARTPS_CR_EN_DIS_MASK)) | ((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS)))
/****************************************************************************/
/**
* Determine if the transmitter FIFO is empty.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
* - TRUE if a byte can be sent
* - FALSE if the Transmitter Fifo is not empty
*
* @note C-Style signature:
* u32 XUartPs_IsTransmitEmpty(XUartPs InstancePtr)
*
******************************************************************************/
#define XUartPs_IsTransmitEmpty(InstancePtr) \
((Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_SR_OFFSET) & \
(u32)XUARTPS_SR_TXEMPTY) == (u32)XUARTPS_SR_TXEMPTY)
/************************** Function Prototypes *****************************/
/*
* Static lookup function implemented in xuartps_sinit.c
*/
XUartPs_Config *XUartPs_LookupConfig(u16 DeviceId);
/*
* Interface functions implemented in xuartps.c
*/
s32 XUartPs_CfgInitialize(XUartPs *InstancePtr,
XUartPs_Config * Config, u32 EffectiveAddr);
u32 XUartPs_Send(XUartPs *InstancePtr,u8 *BufferPtr,
u32 NumBytes);
u32 XUartPs_Recv(XUartPs *InstancePtr,u8 *BufferPtr,
u32 NumBytes);
s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate);
/*
* Options functions in xuartps_options.c
*/
void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options);
u16 XUartPs_GetOptions(XUartPs *InstancePtr);
void XUartPs_SetFifoThreshold(XUartPs *InstancePtr, u8 TriggerLevel);
u8 XUartPs_GetFifoThreshold(XUartPs *InstancePtr);
u16 XUartPs_GetModemStatus(XUartPs *InstancePtr);
u32 XUartPs_IsSending(XUartPs *InstancePtr);
u8 XUartPs_GetOperMode(XUartPs *InstancePtr);
void XUartPs_SetOperMode(XUartPs *InstancePtr, u8 OperationMode);
u8 XUartPs_GetFlowDelay(XUartPs *InstancePtr);
void XUartPs_SetFlowDelay(XUartPs *InstancePtr, u8 FlowDelayValue);
u8 XUartPs_GetRecvTimeout(XUartPs *InstancePtr);
void XUartPs_SetRecvTimeout(XUartPs *InstancePtr, u8 RecvTimeout);
s32 XUartPs_SetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr);
void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr);
/*
* interrupt functions in xuartps_intr.c
*/
u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr);
void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask);
void XUartPs_InterruptHandler(XUartPs *InstancePtr);
void XUartPs_SetHandler(XUartPs *InstancePtr, XUartPs_Handler FuncPtr,
void *CallBackRef);
/*
* self-test functions in xuartps_selftest.c
*/
s32 XUartPs_SelfTest(XUartPs *InstancePtr);
#ifdef __cplusplus
}
#endif
#endif /* end of protection macro */

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/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_g.c
*
* This file contains a configuration table where each entry is a configuration
* structure for an XUartPs device in the system.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00 drg/jz 05/13/08 First Release
* 2.00 hk 22/01/14 Added check for selecting uart0 instance.
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xuartps.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
/************************** Variable Prototypes ******************************/
/**
* Each XUartPs device in the system has an entry in this table.
*/
XUartPs_Config XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES] = {
#ifdef XPAR_XUARTPS_0_DEVICE_ID
{
(u16)XPAR_XUARTPS_0_DEVICE_ID,
(u32)XPAR_XUARTPS_0_BASEADDR,
(u32)XPAR_XUARTPS_0_CLOCK_HZ,
(s32)0
},
#endif
{
(u16)XPAR_PS7_UART_1_DEVICE_ID,
(u32)XPAR_PS7_UART_1_BASEADDR,
(u32)XPAR_PS7_UART_1_UART_CLK_FREQ_HZ,
(s32)0
}
};

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/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_hw.c
*
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ----------------------------------------------
* 1.00 drg/jz 01/12/10 First Release
* 1.05a hk 08/22/13 Added reset function
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
* </pre>
*
*****************************************************************************/
/***************************** Include Files ********************************/
#include "xuartps_hw.h"
/************************** Constant Definitions ****************************/
/***************** Macros (Inline Functions) Definitions ********************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/****************************************************************************/
/**
*
* This function sends one byte using the device. This function operates in
* polled mode and blocks until the data has been put into the TX FIFO register.
*
* @param BaseAddress contains the base address of the device.
* @param Data contains the byte to be sent.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartPs_SendByte(u32 BaseAddress, u8 Data)
{
/*
* Wait until there is space in TX FIFO
*/
while (XUartPs_IsTransmitFull(BaseAddress)) {
;
}
/*
* Write the byte into the TX FIFO
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_FIFO_OFFSET, (u32)Data);
}
/****************************************************************************/
/**
*
* This function receives a byte from the device. It operates in polled mode
* and blocks until a byte has received.
*
* @param BaseAddress contains the base address of the device.
*
* @return The data byte received.
*
* @note None.
*
*****************************************************************************/
u8 XUartPs_RecvByte(u32 BaseAddress)
{
u32 RecievedByte;
/*
* Wait until there is data
*/
while (!XUartPs_IsReceiveData(BaseAddress)) {
;
}
RecievedByte = XUartPs_ReadReg(BaseAddress, XUARTPS_FIFO_OFFSET);
/*
* Return the byte received
*/
return (u8)RecievedByte;
}
/****************************************************************************/
/**
*
* This function resets UART
*
* @param BaseAddress contains the base address of the device.
*
* @return None
*
* @note None.
*
*****************************************************************************/
void XUartPs_ResetHw(u32 BaseAddress)
{
/*
* Disable interrupts
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_IDR_OFFSET, XUARTPS_IXR_MASK);
/*
* Disable receive and transmit
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET,
((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS));
/*
* Software reset of receive and transmit
* This clears the FIFO.
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET,
((u32)XUARTPS_CR_TXRST | (u32)XUARTPS_CR_RXRST));
/*
* Clear status flags - SW reset wont clear sticky flags.
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK);
/*
* Mode register reset value : All zeroes
* Normal mode, even parity, 1 stop bit
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_MR_OFFSET,
XUARTPS_MR_CHMODE_NORM);
/*
* Rx and TX trigger register reset values
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_RXWM_OFFSET,
XUARTPS_RXWM_RESET_VAL);
XUartPs_WriteReg(BaseAddress, XUARTPS_TXWM_OFFSET,
XUARTPS_TXWM_RESET_VAL);
/*
* Rx timeout disabled by default
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_RXTOUT_OFFSET,
XUARTPS_RXTOUT_DISABLE);
/*
* Baud rate generator and dividor reset values
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_BAUDGEN_OFFSET,
XUARTPS_BAUDGEN_RESET_VAL);
XUartPs_WriteReg(BaseAddress, XUARTPS_BAUDDIV_OFFSET,
XUARTPS_BAUDDIV_RESET_VAL);
/*
* Control register reset value -
* RX and TX are disable by default
*/
XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET,
((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS |
(u32)XUARTPS_CR_STOPBRK));
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xuartps_hw.h
*
* This header file contains the hardware interface of an XUartPs device.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ----------------------------------------------
* 1.00 drg/jz 01/12/10 First Release
* 1.03a sg 09/04/12 Added defines for XUARTPS_IXR_TOVR, XUARTPS_IXR_TNFUL
* and XUARTPS_IXR_TTRIG.
* Modified the names of these defines
* XUARTPS_MEDEMSR_DCDX to XUARTPS_MODEMSR_DDCD
* XUARTPS_MEDEMSR_RIX to XUARTPS_MODEMSR_TERI
* XUARTPS_MEDEMSR_DSRX to XUARTPS_MODEMSR_DDSR
* XUARTPS_MEDEMSR_CTSX to XUARTPS_MODEMSR_DCTS
* 1.05a hk 08/22/13 Added prototype for uart reset and related
* constant definitions.
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
*
* </pre>
*
******************************************************************************/
#ifndef XUARTPS_HW_H /* prevent circular inclusions */
#define XUARTPS_HW_H /* by using protection macros */
#ifdef __cplusplus
extern "C" {
#endif
/***************************** Include Files *********************************/
#include "xil_types.h"
#include "xil_assert.h"
#include "xil_io.h"
/************************** Constant Definitions *****************************/
/** @name Register Map
*
* Register offsets for the UART.
* @{
*/
#define XUARTPS_CR_OFFSET 0x0000U /**< Control Register [8:0] */
#define XUARTPS_MR_OFFSET 0x0004U /**< Mode Register [9:0] */
#define XUARTPS_IER_OFFSET 0x0008U /**< Interrupt Enable [12:0] */
#define XUARTPS_IDR_OFFSET 0x000CU /**< Interrupt Disable [12:0] */
#define XUARTPS_IMR_OFFSET 0x0010U /**< Interrupt Mask [12:0] */
#define XUARTPS_ISR_OFFSET 0x0014U /**< Interrupt Status [12:0]*/
#define XUARTPS_BAUDGEN_OFFSET 0x0018U /**< Baud Rate Generator [15:0] */
#define XUARTPS_RXTOUT_OFFSET 0x001CU /**< RX Timeout [7:0] */
#define XUARTPS_RXWM_OFFSET 0x0020U /**< RX FIFO Trigger Level [5:0] */
#define XUARTPS_MODEMCR_OFFSET 0x0024U /**< Modem Control [5:0] */
#define XUARTPS_MODEMSR_OFFSET 0x0028U /**< Modem Status [8:0] */
#define XUARTPS_SR_OFFSET 0x002CU /**< Channel Status [14:0] */
#define XUARTPS_FIFO_OFFSET 0x0030U /**< FIFO [7:0] */
#define XUARTPS_BAUDDIV_OFFSET 0x0034U /**< Baud Rate Divider [7:0] */
#define XUARTPS_FLOWDEL_OFFSET 0x0038U /**< Flow Delay [5:0] */
#define XUARTPS_TXWM_OFFSET 0x0044U /**< TX FIFO Trigger Level [5:0] */
/* @} */
/** @name Control Register
*
* The Control register (CR) controls the major functions of the device.
*
* Control Register Bit Definition
*/
#define XUARTPS_CR_STOPBRK 0x00000100U /**< Stop transmission of break */
#define XUARTPS_CR_STARTBRK 0x00000080U /**< Set break */
#define XUARTPS_CR_TORST 0x00000040U /**< RX timeout counter restart */
#define XUARTPS_CR_TX_DIS 0x00000020U /**< TX disabled. */
#define XUARTPS_CR_TX_EN 0x00000010U /**< TX enabled */
#define XUARTPS_CR_RX_DIS 0x00000008U /**< RX disabled. */
#define XUARTPS_CR_RX_EN 0x00000004U /**< RX enabled */
#define XUARTPS_CR_EN_DIS_MASK 0x0000003CU /**< Enable/disable Mask */
#define XUARTPS_CR_TXRST 0x00000002U /**< TX logic reset */
#define XUARTPS_CR_RXRST 0x00000001U /**< RX logic reset */
/* @}*/
/** @name Mode Register
*
* The mode register (MR) defines the mode of transfer as well as the data
* format. If this register is modified during transmission or reception,
* data validity cannot be guaranteed.
*
* Mode Register Bit Definition
* @{
*/
#define XUARTPS_MR_CCLK 0x00000400U /**< Input clock selection */
#define XUARTPS_MR_CHMODE_R_LOOP 0x00000300U /**< Remote loopback mode */
#define XUARTPS_MR_CHMODE_L_LOOP 0x00000200U /**< Local loopback mode */
#define XUARTPS_MR_CHMODE_ECHO 0x00000100U /**< Auto echo mode */
#define XUARTPS_MR_CHMODE_NORM 0x00000000U /**< Normal mode */
#define XUARTPS_MR_CHMODE_SHIFT 8U /**< Mode shift */
#define XUARTPS_MR_CHMODE_MASK 0x00000300U /**< Mode mask */
#define XUARTPS_MR_STOPMODE_2_BIT 0x00000080U /**< 2 stop bits */
#define XUARTPS_MR_STOPMODE_1_5_BIT 0x00000040U /**< 1.5 stop bits */
#define XUARTPS_MR_STOPMODE_1_BIT 0x00000000U /**< 1 stop bit */
#define XUARTPS_MR_STOPMODE_SHIFT 6U /**< Stop bits shift */
#define XUARTPS_MR_STOPMODE_MASK 0x000000A0U /**< Stop bits mask */
#define XUARTPS_MR_PARITY_NONE 0x00000020U /**< No parity mode */
#define XUARTPS_MR_PARITY_MARK 0x00000018U /**< Mark parity mode */
#define XUARTPS_MR_PARITY_SPACE 0x00000010U /**< Space parity mode */
#define XUARTPS_MR_PARITY_ODD 0x00000008U /**< Odd parity mode */
#define XUARTPS_MR_PARITY_EVEN 0x00000000U /**< Even parity mode */
#define XUARTPS_MR_PARITY_SHIFT 3U /**< Parity setting shift */
#define XUARTPS_MR_PARITY_MASK 0x00000038U /**< Parity mask */
#define XUARTPS_MR_CHARLEN_6_BIT 0x00000006U /**< 6 bits data */
#define XUARTPS_MR_CHARLEN_7_BIT 0x00000004U /**< 7 bits data */
#define XUARTPS_MR_CHARLEN_8_BIT 0x00000000U /**< 8 bits data */
#define XUARTPS_MR_CHARLEN_SHIFT 1U /**< Data Length shift */
#define XUARTPS_MR_CHARLEN_MASK 0x00000006U /**< Data length mask */
#define XUARTPS_MR_CLKSEL 0x00000001U /**< Input clock selection */
/* @} */
/** @name Interrupt Registers
*
* Interrupt control logic uses the interrupt enable register (IER) and the
* interrupt disable register (IDR) to set the value of the bits in the
* interrupt mask register (IMR). The IMR determines whether to pass an
* interrupt to the interrupt status register (ISR).
* Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an
* interrupt. IMR and ISR are read only, and IER and IDR are write only.
* Reading either IER or IDR returns 0x00.
*
* All four registers have the same bit definitions.
*
* @{
*/
#define XUARTPS_IXR_TOVR 0x00001000U /**< Tx FIFO Overflow interrupt */
#define XUARTPS_IXR_TNFUL 0x00000800U /**< Tx FIFO Nearly Full interrupt */
#define XUARTPS_IXR_TTRIG 0x00000400U /**< Tx Trig interrupt */
#define XUARTPS_IXR_DMS 0x00000200U /**< Modem status change interrupt */
#define XUARTPS_IXR_TOUT 0x00000100U /**< Timeout error interrupt */
#define XUARTPS_IXR_PARITY 0x00000080U /**< Parity error interrupt */
#define XUARTPS_IXR_FRAMING 0x00000040U /**< Framing error interrupt */
#define XUARTPS_IXR_OVER 0x00000020U /**< Overrun error interrupt */
#define XUARTPS_IXR_TXFULL 0x00000010U /**< TX FIFO full interrupt. */
#define XUARTPS_IXR_TXEMPTY 0x00000008U /**< TX FIFO empty interrupt. */
#define XUARTPS_IXR_RXFULL 0x00000004U /**< RX FIFO full interrupt. */
#define XUARTPS_IXR_RXEMPTY 0x00000002U /**< RX FIFO empty interrupt. */
#define XUARTPS_IXR_RXOVR 0x00000001U /**< RX FIFO trigger interrupt. */
#define XUARTPS_IXR_MASK 0x00001FFFU /**< Valid bit mask */
/* @} */
/** @name Baud Rate Generator Register
*
* The baud rate generator control register (BRGR) is a 16 bit register that
* controls the receiver bit sample clock and baud rate.
* Valid values are 1 - 65535.
*
* Bit Sample Rate = CCLK / BRGR, where the CCLK is selected by the MR_CCLK bit
* in the MR register.
* @{
*/
#define XUARTPS_BAUDGEN_DISABLE 0x00000000U /**< Disable clock */
#define XUARTPS_BAUDGEN_MASK 0x0000FFFFU /**< Valid bits mask */
#define XUARTPS_BAUDGEN_RESET_VAL 0x0000028BU /**< Reset value */
/** @name Baud Divisor Rate register
*
* The baud rate divider register (BDIV) controls how much the bit sample
* rate is divided by. It sets the baud rate.
* Valid values are 0x04 to 0xFF. Writing a value less than 4 will be ignored.
*
* Baud rate = CCLK / ((BAUDDIV + 1) x BRGR), where the CCLK is selected by
* the MR_CCLK bit in the MR register.
* @{
*/
#define XUARTPS_BAUDDIV_MASK 0x000000FFU /**< 8 bit baud divider mask */
#define XUARTPS_BAUDDIV_RESET_VAL 0x0000000FU /**< Reset value */
/* @} */
/** @name Receiver Timeout Register
*
* Use the receiver timeout register (RTR) to detect an idle condition on
* the receiver data line.
*
* @{
*/
#define XUARTPS_RXTOUT_DISABLE 0x00000000U /**< Disable time out */
#define XUARTPS_RXTOUT_MASK 0x000000FFU /**< Valid bits mask */
/** @name Receiver FIFO Trigger Level Register
*
* Use the Receiver FIFO Trigger Level Register (RTRIG) to set the value at
* which the RX FIFO triggers an interrupt event.
* @{
*/
#define XUARTPS_RXWM_DISABLE 0x00000000U /**< Disable RX trigger interrupt */
#define XUARTPS_RXWM_MASK 0x0000003FU /**< Valid bits mask */
#define XUARTPS_RXWM_RESET_VAL 0x00000020U /**< Reset value */
/* @} */
/** @name Transmit FIFO Trigger Level Register
*
* Use the Transmit FIFO Trigger Level Register (TTRIG) to set the value at
* which the TX FIFO triggers an interrupt event.
* @{
*/
#define XUARTPS_TXWM_MASK 0x0000003FU /**< Valid bits mask */
#define XUARTPS_TXWM_RESET_VAL 0x00000020U /**< Reset value */
/* @} */
/** @name Modem Control Register
*
* This register (MODEMCR) controls the interface with the modem or data set,
* or a peripheral device emulating a modem.
*
* @{
*/
#define XUARTPS_MODEMCR_FCM 0x00000010U /**< Flow control mode */
#define XUARTPS_MODEMCR_RTS 0x00000002U /**< Request to send */
#define XUARTPS_MODEMCR_DTR 0x00000001U /**< Data terminal ready */
/* @} */
/** @name Modem Status Register
*
* This register (MODEMSR) indicates the current state of the control lines
* from a modem, or another peripheral device, to the CPU. In addition, four
* bits of the modem status register provide change information. These bits
* are set to a logic 1 whenever a control input from the modem changes state.
*
* Note: Whenever the DCTS, DDSR, TERI, or DDCD bit is set to logic 1, a modem
* status interrupt is generated and this is reflected in the modem status
* register.
*
* @{
*/
#define XUARTPS_MODEMSR_FCMS 0x00000100U /**< Flow control mode (FCMS) */
#define XUARTPS_MODEMSR_DCD 0x00000080U /**< Complement of DCD input */
#define XUARTPS_MODEMSR_RI 0x00000040U /**< Complement of RI input */
#define XUARTPS_MODEMSR_DSR 0x00000020U /**< Complement of DSR input */
#define XUARTPS_MODEMSR_CTS 0x00000010U /**< Complement of CTS input */
#define XUARTPS_MODEMSR_DDCD 0x00000008U /**< Delta DCD indicator */
#define XUARTPS_MODEMSR_TERI 0x00000004U /**< Trailing Edge Ring Indicator */
#define XUARTPS_MODEMSR_DDSR 0x00000002U /**< Change of DSR */
#define XUARTPS_MODEMSR_DCTS 0x00000001U /**< Change of CTS */
/* @} */
/** @name Channel Status Register
*
* The channel status register (CSR) is provided to enable the control logic
* to monitor the status of bits in the channel interrupt status register,
* even if these are masked out by the interrupt mask register.
*
* @{
*/
#define XUARTPS_SR_TNFUL 0x00004000U /**< TX FIFO Nearly Full Status */
#define XUARTPS_SR_TTRIG 0x00002000U /**< TX FIFO Trigger Status */
#define XUARTPS_SR_FLOWDEL 0x00001000U /**< RX FIFO fill over flow delay */
#define XUARTPS_SR_TACTIVE 0x00000800U /**< TX active */
#define XUARTPS_SR_RACTIVE 0x00000400U /**< RX active */
#define XUARTPS_SR_DMS 0x00000200U /**< Delta modem status change */
#define XUARTPS_SR_TOUT 0x00000100U /**< RX timeout */
#define XUARTPS_SR_PARITY 0x00000080U /**< RX parity error */
#define XUARTPS_SR_FRAME 0x00000040U /**< RX frame error */
#define XUARTPS_SR_OVER 0x00000020U /**< RX overflow error */
#define XUARTPS_SR_TXFULL 0x00000010U /**< TX FIFO full */
#define XUARTPS_SR_TXEMPTY 0x00000008U /**< TX FIFO empty */
#define XUARTPS_SR_RXFULL 0x00000004U /**< RX FIFO full */
#define XUARTPS_SR_RXEMPTY 0x00000002U /**< RX FIFO empty */
#define XUARTPS_SR_RXOVR 0x00000001U /**< RX FIFO fill over trigger */
/* @} */
/** @name Flow Delay Register
*
* Operation of the flow delay register (FLOWDEL) is very similar to the
* receive FIFO trigger register. An internal trigger signal activates when the
* FIFO is filled to the level set by this register. This trigger will not
* cause an interrupt, although it can be read through the channel status
* register. In hardware flow control mode, RTS is deactivated when the trigger
* becomes active. RTS only resets when the FIFO level is four less than the
* level of the flow delay trigger and the flow delay trigger is not activated.
* A value less than 4 disables the flow delay.
* @{
*/
#define XUARTPS_FLOWDEL_MASK XUARTPS_RXWM_MASK /**< Valid bit mask */
/* @} */
/*
* Defines for backwards compatabilty, will be removed
* in the next version of the driver
*/
#define XUARTPS_MEDEMSR_DCDX XUARTPS_MODEMSR_DDCD
#define XUARTPS_MEDEMSR_RIX XUARTPS_MODEMSR_TERI
#define XUARTPS_MEDEMSR_DSRX XUARTPS_MODEMSR_DDSR
#define XUARTPS_MEDEMSR_CTSX XUARTPS_MODEMSR_DCTS
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/****************************************************************************/
/**
* Read a UART register.
*
* @param BaseAddress contains the base address of the device.
* @param RegOffset contains the offset from the base address of the
* device.
*
* @return The value read from the register.
*
* @note C-Style signature:
* u32 XUartPs_ReadReg(u32 BaseAddress, int RegOffset)
*
******************************************************************************/
#define XUartPs_ReadReg(BaseAddress, RegOffset) \
Xil_In32((BaseAddress) + (u32)(RegOffset))
/***************************************************************************/
/**
* Write a UART register.
*
* @param BaseAddress contains the base address of the device.
* @param RegOffset contains the offset from the base address of the
* device.
* @param RegisterValue is the value to be written to the register.
*
* @return None.
*
* @note C-Style signature:
* void XUartPs_WriteReg(u32 BaseAddress, int RegOffset,
* u16 RegisterValue)
*
******************************************************************************/
#define XUartPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))
/****************************************************************************/
/**
* Determine if there is receive data in the receiver and/or FIFO.
*
* @param BaseAddress contains the base address of the device.
*
* @return TRUE if there is receive data, FALSE otherwise.
*
* @note C-Style signature:
* u32 XUartPs_IsReceiveData(u32 BaseAddress)
*
******************************************************************************/
#define XUartPs_IsReceiveData(BaseAddress) \
!((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) & \
(u32)XUARTPS_SR_RXEMPTY) == (u32)XUARTPS_SR_RXEMPTY)
/****************************************************************************/
/**
* Determine if a byte of data can be sent with the transmitter.
*
* @param BaseAddress contains the base address of the device.
*
* @return TRUE if the TX FIFO is full, FALSE if a byte can be put in the
* FIFO.
*
* @note C-Style signature:
* u32 XUartPs_IsTransmitFull(u32 BaseAddress)
*
******************************************************************************/
#define XUartPs_IsTransmitFull(BaseAddress) \
((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) & \
(u32)XUARTPS_SR_TXFULL) == (u32)XUARTPS_SR_TXFULL)
/************************** Function Prototypes ******************************/
void XUartPs_SendByte(u32 BaseAddress, u8 Data);
u8 XUartPs_RecvByte(u32 BaseAddress);
void XUartPs_ResetHw(u32 BaseAddress);
/************************** Variable Definitions *****************************/
#ifdef __cplusplus
}
#endif
#endif /* end of protection macro */

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/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_intr.c
*
* This file contains the functions for interrupt handling
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00 drg/jz 01/13/10 First Release
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
* </pre>
*
*****************************************************************************/
/***************************** Include Files ********************************/
#include "xuartps.h"
/************************** Constant Definitions ****************************/
/**************************** Type Definitions ******************************/
/***************** Macros (Inline Functions) Definitions ********************/
/************************** Function Prototypes *****************************/
static void ReceiveDataHandler(XUartPs *InstancePtr);
static void SendDataHandler(XUartPs *InstancePtr, u32 IsrStatus);
static void ReceiveErrorHandler(XUartPs *InstancePtr);
static void ReceiveTimeoutHandler(XUartPs *InstancePtr);
static void ModemHandler(XUartPs *InstancePtr);
/* Internal function prototypes implemented in xuartps.c */
extern u32 XUartPs_ReceiveBuffer(XUartPs *InstancePtr);
extern u32 XUartPs_SendBuffer(XUartPs *InstancePtr);
/************************** Variable Definitions ****************************/
typedef void (*Handler)(XUartPs *InstancePtr);
/****************************************************************************/
/**
*
* This function gets the interrupt mask
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
* The current interrupt mask. The mask indicates which interupts
* are enabled.
*
* @note None.
*
*****************************************************************************/
u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr)
{
/*
* Assert validates the input argument
*/
Xil_AssertNonvoid(InstancePtr != NULL);
/*
* Read the Interrupt Mask register
*/
return (XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_IMR_OFFSET));
}
/****************************************************************************/
/**
*
* This function sets the interrupt mask.
*
* @param InstancePtr is a pointer to the XUartPs instance
* @param Mask contains the interrupts to be enabled or disabled.
* A '1' enables an interupt, and a '0' disables.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask)
{
u32 TempMask = Mask;
/*
* Assert validates the input arguments
*/
Xil_AssertVoid(InstancePtr != NULL);
TempMask &= (u32)XUARTPS_IXR_MASK;
/*
* Write the mask to the IER Register
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_IER_OFFSET, TempMask);
/*
* Write the inverse of the Mask to the IDR register
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_IDR_OFFSET, (~TempMask));
}
/****************************************************************************/
/**
*
* This function sets the handler that will be called when an event (interrupt)
* occurs that needs application's attention.
*
* @param InstancePtr is a pointer to the XUartPs instance
* @param FuncPtr is the pointer to the callback function.
* @param CallBackRef is the upper layer callback reference passed back
* when the callback function is invoked.
*
* @return None.
*
* @note
*
* There is no assert on the CallBackRef since the driver doesn't know what it
* is (nor should it)
*
*****************************************************************************/
void XUartPs_SetHandler(XUartPs *InstancePtr, XUartPs_Handler FuncPtr,
void *CallBackRef)
{
/*
* Asserts validate the input arguments
* CallBackRef not checked, no way to know what is valid
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(FuncPtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
InstancePtr->Handler = FuncPtr;
InstancePtr->CallBackRef = CallBackRef;
}
/****************************************************************************/
/**
*
* This function is the interrupt handler for the driver.
* It must be connected to an interrupt system by the application such that it
* can be called when an interrupt occurs.
*
* @param InstancePtr contains a pointer to the driver instance
*
* @return None.
*
* @note None.
*
******************************************************************************/
void XUartPs_InterruptHandler(XUartPs *InstancePtr)
{
u32 IsrStatus;
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the interrupt ID register to determine which
* interrupt is active
*/
IsrStatus = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_IMR_OFFSET);
IsrStatus &= XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_ISR_OFFSET);
/*
* Dispatch an appropriate handler.
*/
if((IsrStatus & ((u32)XUARTPS_IXR_RXOVR | (u32)XUARTPS_IXR_RXEMPTY |
(u32)XUARTPS_IXR_RXFULL)) != (u32)0) {
/* Received data interrupt */
ReceiveDataHandler(InstancePtr);
}
if((IsrStatus & ((u32)XUARTPS_IXR_TXEMPTY | (u32)XUARTPS_IXR_TXFULL))
!= (u32)0) {
/* Transmit data interrupt */
SendDataHandler(InstancePtr, IsrStatus);
}
if((IsrStatus & ((u32)XUARTPS_IXR_OVER | (u32)XUARTPS_IXR_FRAMING |
(u32)XUARTPS_IXR_PARITY)) != (u32)0) {
/* Received Error Status interrupt */
ReceiveErrorHandler(InstancePtr);
}
if((IsrStatus & ((u32)XUARTPS_IXR_TOUT)) != (u32)0) {
/* Received Timeout interrupt */
ReceiveTimeoutHandler(InstancePtr);
}
if((IsrStatus & ((u32)XUARTPS_IXR_DMS)) != (u32)0) {
/* Modem status interrupt */
ModemHandler(InstancePtr);
}
/*
* Clear the interrupt status.
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_ISR_OFFSET,
IsrStatus);
}
/****************************************************************************/
/*
*
* This function handles interrupts for receive errors which include
* overrun errors, framing errors, parity errors, and the break interrupt.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void ReceiveErrorHandler(XUartPs *InstancePtr)
{
/*
* If there are bytes still to be received in the specified buffer
* go ahead and receive them. Removing bytes from the RX FIFO will
* clear the interrupt.
*/
if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
(void)XUartPs_ReceiveBuffer(InstancePtr);
}
/*
* Call the application handler to indicate that there is a receive
* error or a break interrupt, if the application cares about the
* error it call a function to get the last errors.
*/
InstancePtr->Handler(InstancePtr->CallBackRef,
XUARTPS_EVENT_RECV_ERROR,
(InstancePtr->ReceiveBuffer.RequestedBytes -
InstancePtr->ReceiveBuffer.RemainingBytes));
}
/****************************************************************************/
/**
*
* This function handles the receive timeout interrupt. This interrupt occurs
* whenever a number of bytes have been present in the RX FIFO and the receive
* data line has been idle for at lease 4 or more character times, (the timeout
* is set using XUartPs_SetrecvTimeout() function).
*
* @param InstancePtr is a pointer to the XUartPs instance
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void ReceiveTimeoutHandler(XUartPs *InstancePtr)
{
u32 Event;
/*
* If there are bytes still to be received in the specified buffer
* go ahead and receive them. Removing bytes from the RX FIFO will
* clear the interrupt.
*/
if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
(void)XUartPs_ReceiveBuffer(InstancePtr);
}
/*
* If there are no more bytes to receive then indicate that this is
* not a receive timeout but the end of the buffer reached, a timeout
* normally occurs if # of bytes is not divisible by FIFO threshold,
* don't rely on previous test of remaining bytes since receive
* function updates it
*/
if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
Event = XUARTPS_EVENT_RECV_TOUT;
} else {
Event = XUARTPS_EVENT_RECV_DATA;
}
/*
* Call the application handler to indicate that there is a receive
* timeout or data event
*/
InstancePtr->Handler(InstancePtr->CallBackRef, Event,
InstancePtr->ReceiveBuffer.RequestedBytes -
InstancePtr->ReceiveBuffer.RemainingBytes);
}
/****************************************************************************/
/**
*
* This function handles the interrupt when data is in RX FIFO.
*
* @param InstancePtr is a pointer to the XUartPs instance
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void ReceiveDataHandler(XUartPs *InstancePtr)
{
/*
* If there are bytes still to be received in the specified buffer
* go ahead and receive them. Removing bytes from the RX FIFO will
* clear the interrupt.
*/
if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
(void)XUartPs_ReceiveBuffer(InstancePtr);
}
/* If the last byte of a message was received then call the application
* handler, this code should not use an else from the previous check of
* the number of bytes to receive because the call to receive the buffer
* updates the bytes ramained
*/
if (InstancePtr->ReceiveBuffer.RemainingBytes == (u32)0) {
InstancePtr->Handler(InstancePtr->CallBackRef,
XUARTPS_EVENT_RECV_DATA,
(InstancePtr->ReceiveBuffer.RequestedBytes -
InstancePtr->ReceiveBuffer.RemainingBytes));
}
}
/****************************************************************************/
/**
*
* This function handles the interrupt when data has been sent, the transmit
* FIFO is empty (transmitter holding register).
*
* @param InstancePtr is a pointer to the XUartPs instance
* @param IsrStatus is the register value for channel status register
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void SendDataHandler(XUartPs *InstancePtr, u32 IsrStatus)
{
/*
* If there are not bytes to be sent from the specified buffer then disable
* the transmit interrupt so it will stop interrupting as it interrupts
* any time the FIFO is empty
*/
if (InstancePtr->SendBuffer.RemainingBytes == (u32)0) {
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_IDR_OFFSET,
((u32)XUARTPS_IXR_TXEMPTY | (u32)XUARTPS_IXR_TXFULL));
/* Call the application handler to indicate the sending is done */
InstancePtr->Handler(InstancePtr->CallBackRef,
XUARTPS_EVENT_SENT_DATA,
InstancePtr->SendBuffer.RequestedBytes -
InstancePtr->SendBuffer.RemainingBytes);
}
/*
* If TX FIFO is empty, send more.
*/
else if((IsrStatus & ((u32)XUARTPS_IXR_TXEMPTY)) != (u32)0) {
(void)XUartPs_SendBuffer(InstancePtr);
}
else {
/* Else with dummy entry for MISRA-C Compliance.*/
;
}
}
/****************************************************************************/
/**
*
* This function handles modem interrupts. It does not do any processing
* except to call the application handler to indicate a modem event.
*
* @param InstancePtr is a pointer to the XUartPs instance
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void ModemHandler(XUartPs *InstancePtr)
{
u32 MsrRegister;
/*
* Read the modem status register so that the interrupt is acknowledged
* and it can be passed to the callback handler with the event
*/
MsrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MODEMSR_OFFSET);
/*
* Call the application handler to indicate the modem status changed,
* passing the modem status and the event data in the call
*/
InstancePtr->Handler(InstancePtr->CallBackRef,
XUARTPS_EVENT_MODEM,
MsrRegister);
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_options.c
*
* The implementation of the options functions for the XUartPs driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00 drg/jz 01/13/10 First Release
* 1.00 sdm 09/27/11 Fixed a bug in XUartPs_SetFlowDelay where the input
* value was not being written to the register.
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
*
* </pre>
*
*****************************************************************************/
/***************************** Include Files ********************************/
#include "xuartps.h"
/************************** Constant Definitions ****************************/
/**************************** Type Definitions ******************************/
/***************** Macros (Inline Functions) Definitions ********************/
/************************** Variable Definitions ****************************/
/*
* The following data type is a map from an option to the offset in the
* register to which it belongs as well as its bit mask in that register.
*/
typedef struct {
u16 Option;
u16 RegisterOffset;
u32 Mask;
} Mapping;
/*
* Create the table which contains options which are to be processed to get/set
* the options. These options are table driven to allow easy maintenance and
* expansion of the options.
*/
static Mapping OptionsTable[] = {
{XUARTPS_OPTION_SET_BREAK, XUARTPS_CR_OFFSET, XUARTPS_CR_STARTBRK},
{XUARTPS_OPTION_STOP_BREAK, XUARTPS_CR_OFFSET, XUARTPS_CR_STOPBRK},
{XUARTPS_OPTION_RESET_TMOUT, XUARTPS_CR_OFFSET, XUARTPS_CR_TORST},
{XUARTPS_OPTION_RESET_TX, XUARTPS_CR_OFFSET, XUARTPS_CR_TXRST},
{XUARTPS_OPTION_RESET_RX, XUARTPS_CR_OFFSET, XUARTPS_CR_RXRST},
{XUARTPS_OPTION_ASSERT_RTS, XUARTPS_MODEMCR_OFFSET,
XUARTPS_MODEMCR_RTS},
{XUARTPS_OPTION_ASSERT_DTR, XUARTPS_MODEMCR_OFFSET,
XUARTPS_MODEMCR_DTR},
{XUARTPS_OPTION_SET_FCM, XUARTPS_MODEMCR_OFFSET, XUARTPS_MODEMCR_FCM}
};
/* Create a constant for the number of entries in the table */
#define XUARTPS_NUM_OPTIONS (sizeof(OptionsTable) / sizeof(Mapping))
/************************** Function Prototypes *****************************/
/****************************************************************************/
/**
*
* Gets the options for the specified driver instance. The options are
* implemented as bit masks such that multiple options may be enabled or
* disabled simulataneously.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
*
* The current options for the UART. The optionss are bit masks that are
* contained in the file xuartps.h and named XUARTPS_OPTION_*.
*
* @note None.
*
*****************************************************************************/
u16 XUartPs_GetOptions(XUartPs *InstancePtr)
{
u16 Options = 0U;
u32 Register;
u32 Index;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Loop thru the options table to map the physical options in the
* registers of the UART to the logical options to be returned
*/
for (Index = 0U; Index < XUARTPS_NUM_OPTIONS; Index++) {
Register = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
OptionsTable[Index].
RegisterOffset);
/*
* If the bit in the register which correlates to the option
* is set, then set the corresponding bit in the options,
* ignoring any bits which are zero since the options variable
* is initialized to zero
*/
if ((Register & OptionsTable[Index].Mask) != (u32)0) {
Options |= OptionsTable[Index].Option;
}
}
return Options;
}
/****************************************************************************/
/**
*
* Sets the options for the specified driver instance. The options are
* implemented as bit masks such that multiple options may be enabled or
* disabled simultaneously.
*
* The GetOptions function may be called to retrieve the currently enabled
* options. The result is ORed in the desired new settings to be enabled and
* ANDed with the inverse to clear the settings to be disabled. The resulting
* value is then used as the options for the SetOption function call.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param Options contains the options to be set which are bit masks
* contained in the file xuartps.h and named XUARTPS_OPTION_*.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options)
{
u32 Index;
u32 Register;
/*
* Assert validates the input arguments
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Loop thru the options table to map the logical options to the
* physical options in the registers of the UART.
*/
for (Index = 0U; Index < XUARTPS_NUM_OPTIONS; Index++) {
/*
* Read the register which contains option so that the register
* can be changed without destoying any other bits of the
* register.
*/
Register = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
OptionsTable[Index].
RegisterOffset);
/*
* If the option is set in the input, then set the corresponding
* bit in the specified register, otherwise clear the bit in
* the register.
*/
if ((Options & OptionsTable[Index].Option) != (u16)0) {
Register |= OptionsTable[Index].Mask;
}
else {
Register &= ~OptionsTable[Index].Mask;
}
/* Write the new value to the register to set the option */
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
OptionsTable[Index].RegisterOffset,
Register);
}
}
/****************************************************************************/
/**
*
* This function gets the receive FIFO trigger level. The receive trigger
* level indicates the number of bytes in the receive FIFO that cause a receive
* data event (interrupt) to be generated.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return The current receive FIFO trigger level. This is a value
* from 0-31.
*
* @note None.
*
*****************************************************************************/
u8 XUartPs_GetFifoThreshold(XUartPs *InstancePtr)
{
u8 RtrigRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the value of the FIFO control register so that the threshold
* can be retrieved, this read takes special register processing
*/
RtrigRegister = (u8) XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_RXWM_OFFSET);
/* Return only the trigger level from the register value */
RtrigRegister &= (u8)XUARTPS_RXWM_MASK;
return RtrigRegister;
}
/****************************************************************************/
/**
*
* This functions sets the receive FIFO trigger level. The receive trigger
* level specifies the number of bytes in the receive FIFO that cause a receive
* data event (interrupt) to be generated.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param TriggerLevel contains the trigger level to set.
*
* @return None
*
* @note None.
*
*****************************************************************************/
void XUartPs_SetFifoThreshold(XUartPs *InstancePtr, u8 TriggerLevel)
{
u32 RtrigRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(TriggerLevel <= (u8)XUARTPS_RXWM_MASK);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
RtrigRegister = ((u32)TriggerLevel) & (u32)XUARTPS_RXWM_MASK;
/*
* Write the new value for the FIFO control register to it such that the
* threshold is changed
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_RXWM_OFFSET, RtrigRegister);
}
/****************************************************************************/
/**
*
* This function gets the modem status from the specified UART. The modem
* status indicates any changes of the modem signals. This function allows
* the modem status to be read in a polled mode. The modem status is updated
* whenever it is read such that reading it twice may not yield the same
* results.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
*
* The modem status which are bit masks that are contained in the file
* xuartps.h and named XUARTPS_MODEM_*.
*
* @note
*
* The bit masks used for the modem status are the exact bits of the modem
* status register with no abstraction.
*
*****************************************************************************/
u16 XUartPs_GetModemStatus(XUartPs *InstancePtr)
{
u32 ModemStatusRegister;
u16 TmpRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/* Read the modem status register to return
*/
ModemStatusRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MODEMSR_OFFSET);
TmpRegister = (u16)ModemStatusRegister;
return TmpRegister;
}
/****************************************************************************/
/**
*
* This function determines if the specified UART is sending data.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
* - TRUE if the UART is sending data
* - FALSE if UART is not sending data
*
* @note None.
*
*****************************************************************************/
u32 XUartPs_IsSending(XUartPs *InstancePtr)
{
u32 ChanStatRegister;
u32 ChanTmpSRegister;
u32 ActiveResult;
u32 EmptyResult;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the channel status register to determine if the transmitter is
* active
*/
ChanStatRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_SR_OFFSET);
/*
* If the transmitter is active, or the TX FIFO is not empty, then indicate
* that the UART is still sending some data
*/
ActiveResult = ChanStatRegister & ((u32)XUARTPS_SR_TACTIVE);
EmptyResult = ChanStatRegister & ((u32)XUARTPS_SR_TXEMPTY);
ChanTmpSRegister = (((u32)XUARTPS_SR_TACTIVE) == ActiveResult) ||
(((u32)XUARTPS_SR_TXEMPTY) != EmptyResult);
return ChanTmpSRegister;
}
/****************************************************************************/
/**
*
* This function gets the operational mode of the UART. The UART can operate
* in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic
* echo.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
*
* The operational mode is specified by constants defined in xuartps.h. The
* constants are named XUARTPS_OPER_MODE_*
*
* @note None.
*
*****************************************************************************/
u8 XUartPs_GetOperMode(XUartPs *InstancePtr)
{
u32 ModeRegister;
u8 OperMode;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the Mode register.
*/
ModeRegister =
XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
ModeRegister &= (u32)XUARTPS_MR_CHMODE_MASK;
/*
* Return the constant
*/
switch (ModeRegister) {
case XUARTPS_MR_CHMODE_NORM:
OperMode = XUARTPS_OPER_MODE_NORMAL;
break;
case XUARTPS_MR_CHMODE_ECHO:
OperMode = XUARTPS_OPER_MODE_AUTO_ECHO;
break;
case XUARTPS_MR_CHMODE_L_LOOP:
OperMode = XUARTPS_OPER_MODE_LOCAL_LOOP;
break;
case XUARTPS_MR_CHMODE_R_LOOP:
OperMode = XUARTPS_OPER_MODE_REMOTE_LOOP;
break;
default:
OperMode = (u8) ((ModeRegister & (u32)XUARTPS_MR_CHMODE_MASK) >>
XUARTPS_MR_CHMODE_SHIFT);
break;
}
return OperMode;
}
/****************************************************************************/
/**
*
* This function sets the operational mode of the UART. The UART can operate
* in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic
* echo.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param OperationMode is the mode of the UART.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartPs_SetOperMode(XUartPs *InstancePtr, u8 OperationMode)
{
u32 ModeRegister;
/*
* Assert validates the input arguments.
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(OperationMode <= XUARTPS_OPER_MODE_REMOTE_LOOP);
/*
* Read the Mode register.
*/
ModeRegister =
XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
/*
* Set the correct value by masking the bits, then ORing the const.
*/
ModeRegister &= (u32)(~XUARTPS_MR_CHMODE_MASK);
switch (OperationMode) {
case XUARTPS_OPER_MODE_NORMAL:
ModeRegister |= (u32)XUARTPS_MR_CHMODE_NORM;
break;
case XUARTPS_OPER_MODE_AUTO_ECHO:
ModeRegister |= (u32)XUARTPS_MR_CHMODE_ECHO;
break;
case XUARTPS_OPER_MODE_LOCAL_LOOP:
ModeRegister |= (u32)XUARTPS_MR_CHMODE_L_LOOP;
break;
case XUARTPS_OPER_MODE_REMOTE_LOOP:
ModeRegister |= (u32)XUARTPS_MR_CHMODE_R_LOOP;
break;
default:
/* Default case made for MISRA-C Compliance. */
break;
}
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
ModeRegister);
}
/****************************************************************************/
/**
*
* This function sets the Flow Delay.
* 0 - 3: Flow delay inactive
* 4 - 32: If Flow Control mode is enabled, UART_rtsN is deactivated when the
* receive FIFO fills to this level.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return
*
* The Flow Delay is specified by constants defined in xuartps_hw.h. The
* constants are named XUARTPS_FLOWDEL*
*
* @note None.
*
*****************************************************************************/
u8 XUartPs_GetFlowDelay(XUartPs *InstancePtr)
{
u32 FdelTmpRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the Mode register.
*/
FdelTmpRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_FLOWDEL_OFFSET);
/*
* Return the contents of the flow delay register
*/
FdelTmpRegister = (u8)(FdelTmpRegister & (u32)XUARTPS_FLOWDEL_MASK);
return FdelTmpRegister;
}
/****************************************************************************/
/**
*
* This function sets the Flow Delay.
* 0 - 3: Flow delay inactive
* 4 - 63: If Flow Control mode is enabled, UART_rtsN is deactivated when the
* receive FIFO fills to this level.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param FlowDelayValue is the Setting for the flow delay.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartPs_SetFlowDelay(XUartPs *InstancePtr, u8 FlowDelayValue)
{
u32 FdelRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(FlowDelayValue > (u8)XUARTPS_FLOWDEL_MASK);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Set the correct value by shifting the input constant, then masking
* the bits
*/
FdelRegister = ((u32)FlowDelayValue) & (u32)XUARTPS_FLOWDEL_MASK;
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_FLOWDEL_OFFSET, FdelRegister);
}
/****************************************************************************/
/**
*
* This function gets the Receive Timeout of the UART.
*
* @param InstancePtr is a pointer to the XUartPs instance.
*
* @return The current setting for receive time out.
*
* @note None.
*
*****************************************************************************/
u8 XUartPs_GetRecvTimeout(XUartPs *InstancePtr)
{
u32 RtoRegister;
u8 RtoRTmpRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the Receive Timeout register.
*/
RtoRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_RXTOUT_OFFSET);
/*
* Return the contents of the mode register shifted appropriately
*/
RtoRTmpRegister = (u8)(RtoRegister & (u32)XUARTPS_RXTOUT_MASK);
return RtoRTmpRegister;
}
/****************************************************************************/
/**
*
* This function sets the Receive Timeout of the UART.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param RecvTimeout setting allows the UART to detect an idle connection
* on the reciever data line.
* Timeout duration = RecvTimeout x 4 x Bit Period. 0 disables the
* timeout function.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
void XUartPs_SetRecvTimeout(XUartPs *InstancePtr, u8 RecvTimeout)
{
u32 RtoRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Set the correct value by masking the bits
*/
RtoRegister = ((u32)RecvTimeout & (u32)XUARTPS_RXTOUT_MASK);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
XUARTPS_RXTOUT_OFFSET, RtoRegister);
/*
* Configure CR to restart the receiver timeout counter
*/
RtoRegister =
XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_CR_OFFSET);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_CR_OFFSET,
(RtoRegister | XUARTPS_CR_TORST));
}
/****************************************************************************/
/**
*
* Sets the data format for the device. The data format includes the
* baud rate, number of data bits, number of stop bits, and parity. It is the
* caller's responsibility to ensure that the UART is not sending or receiving
* data when this function is called.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param FormatPtr is a pointer to a format structure containing the data
* format to be set.
*
* @return
* - XST_SUCCESS if the data format was successfully set.
* - XST_UART_BAUD_ERROR indicates the baud rate could not be
* set because of the amount of error with the baud rate and
* the input clock frequency.
* - XST_INVALID_PARAM if one of the parameters was not valid.
*
* @note
*
* The data types in the format type, data bits and parity, are 32 bit fields
* to prevent a compiler warning.
* The asserts in this function will cause a warning if these fields are
* bytes.
* <br><br>
*
*****************************************************************************/
s32 XUartPs_SetDataFormat(XUartPs *InstancePtr,
XUartPsFormat * FormatPtr)
{
s32 Status;
u32 ModeRegister;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(FormatPtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Verify the inputs specified are valid
*/
if ((FormatPtr->DataBits > ((u32)XUARTPS_FORMAT_6_BITS)) ||
(FormatPtr->StopBits > ((u8)XUARTPS_FORMAT_2_STOP_BIT)) ||
(FormatPtr->Parity > ((u32)XUARTPS_FORMAT_NO_PARITY))) {
Status = XST_INVALID_PARAM;
} else {
/*
* Try to set the baud rate and if it's not successful then don't
* continue altering the data format, this is done first to avoid the
* format from being altered when an error occurs
*/
Status = XUartPs_SetBaudRate(InstancePtr, FormatPtr->BaudRate);
if (Status != (s32)XST_SUCCESS) {
;
} else {
ModeRegister =
XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
/*
* Set the length of data (8,7,6) by first clearing out the bits
* that control it in the register, then set the length in the register
*/
ModeRegister &= (u32)(~XUARTPS_MR_CHARLEN_MASK);
ModeRegister |= (FormatPtr->DataBits << XUARTPS_MR_CHARLEN_SHIFT);
/*
* Set the number of stop bits in the mode register by first clearing
* out the bits that control it in the register, then set the number
* of stop bits in the register.
*/
ModeRegister &= (u32)(~XUARTPS_MR_STOPMODE_MASK);
ModeRegister |= (((u32)FormatPtr->StopBits) << XUARTPS_MR_STOPMODE_SHIFT);
/*
* Set the parity by first clearing out the bits that control it in the
* register, then set the bits in the register, the default is no parity
* after clearing the register bits
*/
ModeRegister &= (u32)(~XUARTPS_MR_PARITY_MASK);
ModeRegister |= (FormatPtr->Parity << XUARTPS_MR_PARITY_SHIFT);
/*
* Update the mode register
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
ModeRegister);
Status = XST_SUCCESS;
}
}
return Status;
}
/****************************************************************************/
/**
*
* Gets the data format for the specified UART. The data format includes the
* baud rate, number of data bits, number of stop bits, and parity.
*
* @param InstancePtr is a pointer to the XUartPs instance.
* @param FormatPtr is a pointer to a format structure that will contain
* the data format after this call completes.
*
* @return None.
*
* @note None.
*
*
*****************************************************************************/
void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr)
{
u32 ModeRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(FormatPtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Get the baud rate from the instance, this is not retrieved from the
* hardware because it is only kept as a divisor such that it is more
* difficult to get back to the baud rate
*/
FormatPtr->BaudRate = InstancePtr->BaudRate;
ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
/*
* Get the length of data (8,7,6,5)
*/
FormatPtr->DataBits =
((ModeRegister & (u32)XUARTPS_MR_CHARLEN_MASK) >>
XUARTPS_MR_CHARLEN_SHIFT);
/*
* Get the number of stop bits
*/
FormatPtr->StopBits =
(u8)((ModeRegister & (u32)XUARTPS_MR_STOPMODE_MASK) >>
XUARTPS_MR_STOPMODE_SHIFT);
/*
* Determine what parity is
*/
FormatPtr->Parity =
(u32)((ModeRegister & (u32)XUARTPS_MR_PARITY_MASK) >>
XUARTPS_MR_PARITY_SHIFT);
}

173
XilinxProcessorIPLib/drivers/uartps/src/xuartps_selftest.c Normal file
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@ -0,0 +1,173 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_selftest.c
*
* This file contains the self-test functions for the XUartPs driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00 drg/jz 01/13/10 First Release
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xstatus.h"
#include "xuartps.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
#define XUARTPS_TOTAL_BYTES (u8)32
/************************** Variable Definitions *****************************/
static u8 TestString[XUARTPS_TOTAL_BYTES]="abcdefghABCDEFGH012345677654321";
static u8 ReturnString[XUARTPS_TOTAL_BYTES];
/************************** Function Prototypes ******************************/
/****************************************************************************/
/**
*
* This function runs a self-test on the driver and hardware device. This self
* test performs a local loopback and verifies data can be sent and received.
*
* The time for this test is proportional to the baud rate that has been set
* prior to calling this function.
*
* The mode and control registers are restored before return.
*
* @param InstancePtr is a pointer to the XUartPs instance
*
* @return
* - XST_SUCCESS if the test was successful
* - XST_UART_TEST_FAIL if the test failed looping back the data
*
* @note
*
* This function can hang if the hardware is not functioning properly.
*
******************************************************************************/
s32 XUartPs_SelfTest(XUartPs *InstancePtr)
{
s32 Status = XST_SUCCESS;
u32 IntrRegister;
u32 ModeRegister;
u8 Index;
u32 ReceiveDataResult;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Disable all interrupts in the interrupt disable register
*/
IntrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_IMR_OFFSET);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
XUARTPS_IXR_MASK);
/*
* Setup for local loopback
*/
ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
XUARTPS_MR_OFFSET);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
((ModeRegister & (u32)(~XUARTPS_MR_CHMODE_MASK)) |
(u32)XUARTPS_MR_CHMODE_L_LOOP));
/*
* Send a number of bytes and receive them, one at a time.
*/
for (Index = 0U; Index < XUARTPS_TOTAL_BYTES; Index++) {
/*
* Send out the byte and if it was not sent then the failure
* will be caught in the comparison at the end
*/
(void)XUartPs_Send(InstancePtr, &TestString[Index], 1U);
/*
* Wait until the byte is received. This can hang if the HW
* is broken. Watch for the FIFO empty flag to be false.
*/
ReceiveDataResult = Xil_In32((InstancePtr->Config.BaseAddress) + XUARTPS_SR_OFFSET) &
XUARTPS_SR_RXEMPTY;
while (ReceiveDataResult == XUARTPS_SR_RXEMPTY ) {
ReceiveDataResult = Xil_In32((InstancePtr->Config.BaseAddress) + XUARTPS_SR_OFFSET) &
XUARTPS_SR_RXEMPTY;
}
/*
* Receive the byte
*/
(void)XUartPs_Recv(InstancePtr, &ReturnString[Index], 1U);
}
/*
* Compare the bytes received to the bytes sent to verify the exact data
* was received
*/
for (Index = 0U; Index < XUARTPS_TOTAL_BYTES; Index++) {
if (TestString[Index] != ReturnString[Index]) {
Status = XST_UART_TEST_FAIL;
}
}
/*
* Restore the registers which were altered to put into polling and
* loopback modes so that this test is not destructive
*/
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IER_OFFSET,
IntrRegister);
XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
ModeRegister);
return Status;
}

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XilinxProcessorIPLib/drivers/uartps/src/xuartps_sinit.c Normal file
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@ -0,0 +1,96 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/****************************************************************************/
/**
*
* @file xuartps_sinit.c
*
* The implementation of the XUartPs driver's static initialzation
* functionality.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00 drg/jz 01/13/10 First Release
* 3.00 kvn 02/13/15 Modified code for MISRA-C:2012 compliance.
* </pre>
*
*****************************************************************************/
/***************************** Include Files ********************************/
#include "xstatus.h"
#include "xparameters.h"
#include "xuartps.h"
/************************** Constant Definitions ****************************/
/**************************** Type Definitions ******************************/
/***************** Macros (Inline Functions) Definitions ********************/
/************************** Variable Definitions ****************************/
extern XUartPs_Config XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES];
/************************** Function Prototypes *****************************/
/****************************************************************************/
/**
*
* Looks up the device configuration based on the unique device ID. The table
* contains the configuration info for each device in the system.
*
* @param DeviceId contains the ID of the device
*
* @return A pointer to the configuration structure or NULL if the
* specified device is not in the system.
*
* @note None.
*
******************************************************************************/
XUartPs_Config *XUartPs_LookupConfig(u16 DeviceId)
{
XUartPs_Config *CfgPtr = NULL;
u32 Index;
for (Index = 0U; Index < (u32)XPAR_XUARTPS_NUM_INSTANCES; Index++) {
if (XUartPs_ConfigTable[Index].DeviceId == DeviceId) {
CfgPtr = &XUartPs_ConfigTable[Index];
break;
}
}
return (XUartPs_Config *)CfgPtr;
}