stv0g/embeddedsw
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

dptx: Mask interrupts while they are being serviced.

Browse source 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-01-07 12:18:54 -08:00 • committed by Suneel Garapati
parent 7e466af028
commit f852cf5805
1 changed files with 18 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
XilinxProcessorIPLib/drivers/dptx/src/xdptx_intr.c
View file

@ -128,6 +128,7 @@ void XDptx_HpdInterruptHandler(XDptx *InstancePtr)
u8 HpdEventDetected;
u8 HpdPulseDetected;
u32 HpdDuration;
u32 IntrMask;
/* Verify arguments. */
Xil_AssertVoid(InstancePtr != NULL);
@ -138,16 +139,28 @@ void XDptx_HpdInterruptHandler(XDptx *InstancePtr)
XDPTX_INTERRUPT_STATUS);
IntrStatus &= ~XDptx_ReadReg(InstancePtr->Config.BaseAddr,
XDPTX_INTERRUPT_MASK);
IntrMask = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
XDPTX_INTERRUPT_MASK);
HpdEventDetected = IntrStatus & XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK;
HpdPulseDetected = IntrStatus &
XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
if (HpdEventDetected) {
/* Mask interrupts while event handling is taking place. API
* will error out in case of a disconnection event anyway. */
XDptx_WriteReg(InstancePtr->Config.BaseAddr,
XDPTX_INTERRUPT_MASK, IntrMask |
XDPTX_INTERRUPT_MASK_HPD_EVENT_MASK);
InstancePtr->HpdEventHandler(InstancePtr->HpdEventCallbackRef);
}
else if (HpdPulseDetected && XDptx_IsConnected(InstancePtr)) {
/* Mask interrupts while event handling is taking place. */
XDptx_WriteReg(InstancePtr->Config.BaseAddr,
XDPTX_INTERRUPT_MASK, IntrMask |
XDPTX_INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK);
if (HpdPulseDetected) {
/* The source device must debounce the incoming HPD signal by
* sampling the value at an interval greater than 0.500 ms. An
* HPD pulse should be of width 0.5 ms - 1.0 ms. */
@ -158,4 +171,8 @@ void XDptx_HpdInterruptHandler(XDptx *InstancePtr)
InstancePtr->HpdPulseCallbackRef);
}
}
/* Unmask previously masked interrupts once handling is done. */
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
IntrMask);
}