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nandps8_v2_0: Reading ECC Error Count Register for Ecc flips.

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Reading ECC Error Count Register in XNandPs8_ReadPage
to capture total Ecc Flips, Ecc Flips Per Page.

Signed-off-by: Shakti Bhatnagar <shaktib@xilinx.com>
This commit is contained in:
Shakti Bhatnagar 2015-01-12 19:01:24 +05:30 • committed by Suneel Garapati
parent f969090b32
commit fc61c2a759
2 changed files with 19 additions and 5 deletions
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21
XilinxProcessorIPLib/drivers/nandps8_v2_0/src/xnandps8.c
View file

@ -285,9 +285,10 @@ s32 XNandPs8_CfgInitialize(XNandPs8 *InstancePtr, XNandPs8_Config *ConfigPtr,
}
/*
* Initialize BCH Error counter
* Initialize Ecc Error flip counters
*/
InstancePtr->BCH_Error_Status = 0U;
InstancePtr->Ecc_Stat_PerPage_flips = 0U;
InstancePtr->Ecc_Stats_total_flips = 0U;
/*
* Scan for the bad block table(bbt) stored in the flash & load it in
@ -2822,6 +2823,13 @@ CheckEccError:
xil_printf("%s: ECC Hamming multi bit error\r\n",
__func__);
#endif
InstancePtr->Ecc_Stat_PerPage_flips =
((XNandPs8_ReadReg(
InstancePtr->Config.BaseAddress,
XNANDPS8_ECC_ERR_CNT_OFFSET) &
0x1FF00U) >> 8U);
InstancePtr->Ecc_Stats_total_flips +=
InstancePtr->Ecc_Stat_PerPage_flips;
Status = XST_FAILURE;
}
/*
@ -2836,8 +2844,13 @@ CheckEccError:
XNANDPS8_INTR_STS_ERR_INTR_STS_EN_MASK);
if (InstancePtr->EccCfg.IsBCH == 1U) {
InstancePtr->BCH_Error_Status++;
InstancePtr->Ecc_Stat_PerPage_flips =
((XNandPs8_ReadReg(
InstancePtr->Config.BaseAddress,
XNANDPS8_ECC_ERR_CNT_OFFSET)&
0x1FF00U) >> 8U);
InstancePtr->Ecc_Stats_total_flips +=
InstancePtr->Ecc_Stat_PerPage_flips;
Status = XST_SUCCESS;
}
}

3
XilinxProcessorIPLib/drivers/nandps8_v2_0/src/xnandps8.h
View file

@ -375,7 +375,8 @@ typedef struct {
typedef struct {
u32 IsReady; /**< Device is initialized and ready */
XNandPs8_Config Config;
u8 BCH_Error_Status;
u16 Ecc_Stat_PerPage_flips; /**< Ecc Correctable Error Counter for Current Page */
u32 Ecc_Stats_total_flips; /**< Total Ecc Errors Corrected */
XNandPs8_DataInterface DataInterface;
XNandPs8_TimingMode TimingMode;
XNandPs8_SWMode Mode; /**< Driver operating mode */