qspipsu: Modified Bus width during dummy phase in examples.

This patch modifies the Bus width value during dummy phase
in examples since it is recommended to be same as in
data phase.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This commit is contained in:
P L Sai Krishna 2015-06-15 20:32:26 +05:30 committed by Nava kishore Manne
parent 3459d888f6
commit fdf41ec349
2 changed files with 26 additions and 6 deletions

View file

@ -1236,10 +1236,20 @@ int FlashRead(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
/* Update Dummy cycles as per flash specs for QUAD IO */
/*
* Bus width of dummy phase is recommended to be the same as
* address phase
* It is recommended that Bus width value during dummy
* phase should be same as data phase
*/
FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
if ((Command == FAST_READ_CMD) || (Command == FAST_READ_CMD_4B)) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
}
if ((Command == DUAL_READ_CMD) || (Command == DUAL_READ_CMD_4B)) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
}
if ((Command == QUAD_READ_CMD) || (Command == QUAD_READ_CMD_4B)) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
}
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = NULL;

View file

@ -1154,10 +1154,20 @@ int FlashRead(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
/* Update Dummy cycles as per flash specs for QUAD IO */
/*
* Bus width of dummy phase is recommended to be the same as
* address phase
* It is recommended that Bus width value during dummy
* phase should be same as data phase
*/
FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
if ((Command == FAST_READ_CMD) || (Command == FAST_READ_CMD_4B)) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
}
if ((Command == DUAL_READ_CMD) || (Command == DUAL_READ_CMD_4B)) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
}
if ((Command == QUAD_READ_CMD) || (Command == QUAD_READ_CMD_4B)) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
}
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = NULL;