sw_apps: modified openamp matrix_multiply application
This patch modifies openamp matrix multiply application to pick correct linker script for baremetal and freertos. This patch also modifies linker scripts to put the data into DDR instead of part of OCM where ATF lies. This patch modifies IPI mask in openamp application to support it with latest linux changes Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com> Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This commit is contained in:
parent
a23fcf5be9
commit
fefbadcdf0
10 changed files with 97 additions and 119 deletions
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@ -46,14 +46,14 @@ proc check_standalone_os {} {
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}
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set os [lindex $oslist 0];
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if { $os != "standalone" } {
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error "This application is supported only on the Standalone Board Support Package.";
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if {{ $os != "standalone" } || { $os != "freertos821_xilinx" }} {
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error "This application is supported only on the Standalone Board Support Package and freertos821.";
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}
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}
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proc swapp_is_supported_sw {} {
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# make sure we are using standalone OS
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#check_standalone_os;
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check_standalone_os;
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# make sure xilffs is available
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set librarylist [hsi::get_libs -filter "NAME==xilopenamp"];
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@ -97,7 +97,9 @@ proc swapp_generate {} {
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set os [lindex $oslist 0];
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if { $os != "standalone" } {
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set ld_file "lscript.ld"
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file delete -force $ld_file
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set ld_file_new "lscript_freertos.ld"
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file rename -force $ld_file_new $ld_file
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file delete -force $ld_file_new
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} else {
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set ld_file "lscript_freertos.ld"
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file delete -force $ld_file
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@ -269,12 +269,18 @@ unsigned int old_value = 0;
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void restore_global_interrupts() {
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#ifdef USE_FREERTOS
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taskENABLE_INTERRUPTS();
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#else
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ARM_AR_INT_BITS_SET(old_value);
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#endif
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}
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void disable_global_interrupts() {
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#ifdef USE_FREERTOS
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taskDISABLE_INTERRUPTS();
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#else
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unsigned int value = 0;
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ARM_AR_INT_BITS_GET(&value);
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@ -286,7 +292,7 @@ void disable_global_interrupts() {
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old_value = value;
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}
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#endif
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}
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/*==================================================================*/
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@ -32,6 +32,7 @@
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#ifndef _BAREMETAL_H
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#define _BAREMETAL_H
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#include "amp_os.h"
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#include "xil_types.h"
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#include "xparameters.h"
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#include "xil_cache.h"
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@ -116,5 +117,6 @@ void platform_cache_disable();
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void platform_map_mem_region(unsigned int va,unsigned int pa, unsigned int size, unsigned int flags);
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unsigned long platform_vatopa(void *addr);
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void *platform_patova(unsigned long addr);
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void process_communication(struct XOpenAMPInstPtr OpenAMPInstance);
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#endif /* _BAREMETAL_H */
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@ -45,7 +45,7 @@ MEMORY
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{
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ps8_bbram_0_S_AXI_BASEADDR : ORIGIN = 0xFFCC4000, LENGTH = 0x00001000
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ps8_csu_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFC40000, LENGTH = 0x00008000
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ps8_ocm_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFFC0000, LENGTH = 0x00020000
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ps8_ddr_S_AXI_BASEADDR : ORIGIN = 0x3ED00000, LENGTH = 0x00040000
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ps8_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x00010000
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ps8_r5_tcm_ram_0_S_AXI_BASEADDR : ORIGIN = 0x00000050, LENGTH = 0x0001FFB1
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}
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@ -84,23 +84,23 @@ _binary_firmware2_end = 0;
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*(.vfp11_veneer)
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*(.ARM.extab)
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*(.gnu.linkonce.armextab.*)
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.init : {
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KEEP (*(.init))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.fini : {
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KEEP (*(.fini))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.interp : {
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KEEP (*(.interp))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.note-ABI-tag : {
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KEEP (*(.note-ABI-tag))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.rodata : {
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__rodata_start = .;
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@ -108,14 +108,14 @@ _binary_firmware2_end = 0;
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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__rodata_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.rodata1 : {
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__rodata1_start = .;
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*(.rodata1)
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*(.rodata1.*)
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__rodata1_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.sdata2 : {
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__sdata2_start = .;
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@ -123,7 +123,7 @@ _binary_firmware2_end = 0;
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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__sdata2_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.sbss2 : {
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__sbss2_start = .;
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@ -131,7 +131,7 @@ _binary_firmware2_end = 0;
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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__sbss2_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.data : {
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__data_start = .;
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@ -142,18 +142,18 @@ _binary_firmware2_end = 0;
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*(.got)
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*(.got.plt)
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__data_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.data1 : {
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__data1_start = .;
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*(.data1)
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*(.data1.*)
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__data1_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.got : {
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*(.got)
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.ctors : {
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__CTOR_LIST__ = .;
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@ -164,7 +164,7 @@ _binary_firmware2_end = 0;
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KEEP (*(.ctors))
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__CTOR_END__ = .;
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___CTORS_END___ = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.dtors : {
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__DTOR_LIST__ = .;
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@ -175,67 +175,67 @@ _binary_firmware2_end = 0;
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KEEP (*(.dtors))
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__DTOR_END__ = .;
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___DTORS_END___ = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.fixup : {
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__fixup_start = .;
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*(.fixup)
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__fixup_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.eh_frame : {
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*(.eh_frame)
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.eh_framehdr : {
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__eh_framehdr_start = .;
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*(.eh_framehdr)
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__eh_framehdr_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.gcc_except_table : {
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*(.gcc_except_table)
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.mmu_tbl (ALIGN(16384)) : {
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__mmu_tbl_start = .;
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*(.mmu_tbl)
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__mmu_tbl_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.ARM.exidx : {
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__exidx_start = .;
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*(.ARM.exidx*)
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*(.gnu.linkonce.armexidix.*.*)
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__exidx_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.preinit_array : {
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__preinit_array_start = .;
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KEEP (*(SORT(.preinit_array.*)))
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.init_array : {
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.fini_array : {
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__fini_array_start = .;
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array))
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__fini_array_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.ARM.attributes : {
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__ARM.attributes_start = .;
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*(.ARM.attributes)
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__ARM.attributes_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.sdata : {
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__sdata_start = .;
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@ -243,7 +243,7 @@ _binary_firmware2_end = 0;
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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__sdata_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.sbss (NOLOAD) : {
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__sbss_start = .;
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@ -251,7 +251,7 @@ _binary_firmware2_end = 0;
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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__sbss_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.tdata : {
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__tdata_start = .;
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@ -259,7 +259,7 @@ _binary_firmware2_end = 0;
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*(.tdata.*)
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*(.gnu.linkonce.td.*)
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__tdata_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.tbss : {
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__tbss_start = .;
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@ -267,7 +267,7 @@ _binary_firmware2_end = 0;
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*(.tbss.*)
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*(.gnu.linkonce.tb.*)
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__tbss_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.bss (NOLOAD) : {
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. = ALIGN(4);
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@ -278,7 +278,7 @@ _binary_firmware2_end = 0;
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
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@ -45,7 +45,7 @@ MEMORY
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{
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ps8_bbram_0_S_AXI_BASEADDR : ORIGIN = 0xFFCC4000, LENGTH = 0x00001000
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ps8_csu_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFC40000, LENGTH = 0x00008000
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ps8_ocm_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFFC0000, LENGTH = 0x00020000
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ps8_ddr_S_AXI_BASEADDR : ORIGIN = 0x3ED00000, LENGTH = 0x00040000
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ps8_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x00010000
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ps8_r5_tcm_ram_0_S_AXI_BASEADDR : ORIGIN = 0x00000050, LENGTH = 0x0001FFB1
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}
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@ -84,23 +84,23 @@ _binary_firmware2_end = 0;
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*(.vfp11_veneer)
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*(.ARM.extab)
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*(.gnu.linkonce.armextab.*)
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.init : {
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KEEP (*(.init))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.fini : {
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KEEP (*(.fini))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.interp : {
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KEEP (*(.interp))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.note-ABI-tag : {
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KEEP (*(.note-ABI-tag))
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.rodata : {
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__rodata_start = .;
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@ -108,14 +108,14 @@ _binary_firmware2_end = 0;
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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__rodata_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.rodata1 : {
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__rodata1_start = .;
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*(.rodata1)
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*(.rodata1.*)
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__rodata1_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.sdata2 : {
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__sdata2_start = .;
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@ -123,7 +123,7 @@ _binary_firmware2_end = 0;
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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__sdata2_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.sbss2 : {
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__sbss2_start = .;
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|
@ -131,7 +131,7 @@ _binary_firmware2_end = 0;
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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__sbss2_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.data : {
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__data_start = .;
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|
@ -142,18 +142,18 @@ _binary_firmware2_end = 0;
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*(.got)
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*(.got.plt)
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__data_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.data1 : {
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__data1_start = .;
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*(.data1)
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*(.data1.*)
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__data1_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.got : {
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*(.got)
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
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} > ps8_ddr_S_AXI_BASEADDR
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.ctors : {
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__CTOR_LIST__ = .;
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|
@ -164,7 +164,7 @@ _binary_firmware2_end = 0;
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KEEP (*(.ctors))
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__CTOR_END__ = .;
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___CTORS_END___ = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
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} > ps8_ddr_S_AXI_BASEADDR
|
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.dtors : {
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__DTOR_LIST__ = .;
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|
@ -175,67 +175,67 @@ _binary_firmware2_end = 0;
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KEEP (*(.dtors))
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__DTOR_END__ = .;
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___DTORS_END___ = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
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} > ps8_ddr_S_AXI_BASEADDR
|
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.fixup : {
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__fixup_start = .;
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*(.fixup)
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__fixup_end = .;
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} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.eh_frame : {
|
||||
*(.eh_frame)
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.eh_framehdr : {
|
||||
__eh_framehdr_start = .;
|
||||
*(.eh_framehdr)
|
||||
__eh_framehdr_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.gcc_except_table : {
|
||||
*(.gcc_except_table)
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.mmu_tbl (ALIGN(16384)) : {
|
||||
__mmu_tbl_start = .;
|
||||
*(.mmu_tbl)
|
||||
__mmu_tbl_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
*(.gnu.linkonce.armexidix.*.*)
|
||||
__exidx_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.preinit_array : {
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(SORT(.preinit_array.*)))
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.init_array : {
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.fini_array : {
|
||||
__fini_array_start = .;
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array))
|
||||
__fini_array_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.ARM.attributes : {
|
||||
__ARM.attributes_start = .;
|
||||
*(.ARM.attributes)
|
||||
__ARM.attributes_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.sdata : {
|
||||
__sdata_start = .;
|
||||
|
@ -243,7 +243,7 @@ _binary_firmware2_end = 0;
|
|||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
__sdata_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.sbss (NOLOAD) : {
|
||||
__sbss_start = .;
|
||||
|
@ -251,7 +251,7 @@ _binary_firmware2_end = 0;
|
|||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
__sbss_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.tdata : {
|
||||
__tdata_start = .;
|
||||
|
@ -259,7 +259,7 @@ _binary_firmware2_end = 0;
|
|||
*(.tdata.*)
|
||||
*(.gnu.linkonce.td.*)
|
||||
__tdata_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.tbss : {
|
||||
__tbss_start = .;
|
||||
|
@ -267,7 +267,7 @@ _binary_firmware2_end = 0;
|
|||
*(.tbss.*)
|
||||
*(.gnu.linkonce.tb.*)
|
||||
__tbss_end = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
. = ALIGN(4);
|
||||
|
@ -294,7 +294,7 @@ _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
|
|||
. += _HEAP_SIZE;
|
||||
_heap_end = .;
|
||||
HeapLimit = .;
|
||||
} > ps8_ocm_ram_0_S_AXI_BASEADDR
|
||||
} > ps8_ddr_S_AXI_BASEADDR
|
||||
|
||||
.stack (NOLOAD) : {
|
||||
. = ALIGN(16);
|
||||
|
|
|
@ -88,6 +88,9 @@
|
|||
#define MAX_SIZE 6
|
||||
#define NUM_MATRIX 2
|
||||
#define SHUTDOWN_MSG 0xEF56A55A
|
||||
#ifdef USE_FREERTOS
|
||||
#define DELAY_200MSEC 200/portTICK_PERIOD_MS
|
||||
#endif
|
||||
|
||||
typedef struct _matrix {
|
||||
unsigned int size;
|
||||
|
@ -191,6 +194,7 @@ void communication_task(){
|
|||
xActivatedMember = xQueueSelectFromSet( comm_queueset, portMAX_DELAY);
|
||||
if( xActivatedMember == OpenAMPInstPtr.lock ) {
|
||||
env_acquire_sync_lock(OpenAMPInstPtr.lock);
|
||||
env_disable_interrupt(VRING1_IPI_INTR_VECT);
|
||||
process_communication(OpenAMPInstPtr);
|
||||
}
|
||||
if (xActivatedMember == OpenAMPInstPtr.send_queue) {
|
||||
|
@ -200,6 +204,7 @@ void communication_task(){
|
|||
#else
|
||||
env_enable_interrupt(VRING1_IPI_INTR_VECT, 0, 0);
|
||||
env_acquire_sync_lock(OpenAMPInstPtr.lock);
|
||||
env_disable_interrupt(VRING1_IPI_INTR_VECT);
|
||||
process_communication(OpenAMPInstPtr);
|
||||
matrix_mul();
|
||||
if(pq_qlength(OpenAMPInstPtr.send_queue) > 0) {
|
||||
|
@ -259,7 +264,7 @@ static void rpmsg_read_cb(struct rpmsg_channel *rp_chnl, void *data, int len,
|
|||
remoteproc_resource_deinit(proc);
|
||||
#ifdef USE_FREERTOS
|
||||
int TempTimerId;
|
||||
stop_scheduler = xTimerCreate("TMR", 200, pdFALSE, (void *)&TempTimerId, StopSchedulerTmrCallBack);
|
||||
stop_scheduler = xTimerCreate("TMR", DELAY_200MSEC, pdFALSE, (void *)&TempTimerId, StopSchedulerTmrCallBack);
|
||||
xTimerStart(stop_scheduler, 0);
|
||||
#endif
|
||||
}else{
|
||||
|
@ -286,41 +291,4 @@ static void Matrix_Multiply(const matrix *m, const matrix *n, matrix *r) {
|
|||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_FREERTOS
|
||||
/*-----------------------------------------------------------*/
|
||||
void vApplicationMallocFailedHook( void )
|
||||
{
|
||||
/* vApplicationMallocFailedHook() will only be called if
|
||||
configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
|
||||
function that will get called if a call to pvPortMalloc() fails.
|
||||
pvPortMalloc() is called internally by the kernel whenever a task, queue or
|
||||
semaphore is created. It is also called by various parts of the demo
|
||||
application. If heap_1.c or heap_2.c are used, then the size of the heap
|
||||
available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
|
||||
FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
|
||||
to query the size of free heap space that remains (although it does not
|
||||
provide information on how the remaining heap might be fragmented). */
|
||||
xil_printf("malloc failed\r\n");
|
||||
taskDISABLE_INTERRUPTS();
|
||||
for( ;; );
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName )
|
||||
{
|
||||
( void ) pcTaskName;
|
||||
( void ) pxTask;
|
||||
|
||||
/* vApplicationStackOverflowHook() will only be called if
|
||||
configCHECK_FOR_STACK_OVERFLOW is set to either 1 or 2. The handle and name
|
||||
of the offending task will be passed into the hook function via its
|
||||
parameters. However, when a stack has overflowed, it is possible that the
|
||||
parameters will have been corrupted, in which case the pxCurrentTCB variable
|
||||
can be inspected directly. */
|
||||
taskDISABLE_INTERRUPTS();
|
||||
for( ;; );
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
|
@ -96,6 +96,7 @@ void _notify(int cpu_id, struct proc_intr *intr_info) {
|
|||
if (chn_ipi_info == NULL)
|
||||
return;
|
||||
platform_dcache_all_flush();
|
||||
env_wmb();
|
||||
/* Trigger IPI */
|
||||
ipi_trigger(chn_ipi_info->ipi_base_addr, chn_ipi_info->ipi_chn_mask);
|
||||
}
|
||||
|
|
|
@ -48,7 +48,7 @@ struct ipi_info {
|
|||
#define SHM_ADDR (void *)0x3ED08000
|
||||
#define SHM_SIZE 0x00200000
|
||||
#define IPI_BASEADDR 0xff310000
|
||||
#define IPI_CHN_BITMASK 0x00000001 /* IPI channel bit mask APU<->RPU0 */
|
||||
#define IPI_CHN_BITMASK 0x01000000 /* IPI channel bit mask APU<->RPU0 */
|
||||
#define VRING0_IPI_INTR_VECT -1
|
||||
#define VRING1_IPI_INTR_VECT 65
|
||||
#define MASTER_CPU_ID 0
|
||||
|
|
|
@ -41,34 +41,33 @@
|
|||
|
||||
#define RPMSG_IPU_C0_FEATURES 1
|
||||
|
||||
|
||||
/* VirtIO rpmsg device id */
|
||||
#define VIRTIO_ID_RPMSG_ 7
|
||||
|
||||
/* Remote supports Name Service announcement */
|
||||
#define VIRTIO_RPMSG_F_NS 0
|
||||
|
||||
#define OCM_0_START 0xFFFC0000
|
||||
#define OCM_0_LEN 0x20000
|
||||
#define OCM_1_START 0xFFFF0000
|
||||
#define OCM_1_LEN 0x10000
|
||||
#define TCM_0_START_DA 0x00000000
|
||||
#define TCM_0_LEN 0x10000
|
||||
#define TCM_0_LEN 0x20000
|
||||
#define TCM_0_START_PA 0xFFE00000
|
||||
#define TCM_1_START_DA 0x00020000
|
||||
#define TCM_1_LEN 0x10000
|
||||
#define TCM_1_LEN 0x20000
|
||||
#define TCM_1_START_PA 0xFFE40000
|
||||
#define DDR_ELF_START 0x3ED00000
|
||||
#define DDR_ELF_LEN 0x40000
|
||||
#define NUM_VRINGS 0x02
|
||||
#define VRING_ALIGN 0x1000
|
||||
#define RING_TX 0x3ED00000
|
||||
#define RING_RX 0x3ED04000
|
||||
#define RING_TX 0x3ED40000
|
||||
#define RING_RX 0x3ED44000
|
||||
#define VRING_SIZE 256
|
||||
|
||||
#define NUM_TABLE_ENTRIES 3
|
||||
#define CARVEOUT_SRC_OFFSETS offsetof(struct remote_resource_table, ocm_0_cout), \
|
||||
offsetof(struct remote_resource_table, ocm_1_cout),
|
||||
#define CARVEOUT_SRC_OFFSETS offsetof(struct remote_resource_table, ocm_1_cout), \
|
||||
offsetof(struct remote_resource_table, ddr_cout),
|
||||
|
||||
#define CARVEOUT_SRC {RSC_CARVEOUT, OCM_0_START, OCM_0_START, OCM_0_LEN, 0, 0, "OCM0_COUT",}, \
|
||||
{RSC_CARVEOUT, OCM_1_START, OCM_1_START, OCM_1_LEN, 0, 0, "ELF_DATA_COUT",},
|
||||
#define CARVEOUT_SRC {RSC_CARVEOUT, OCM_1_START, OCM_1_START, OCM_1_LEN, 0, 0, "OCM1_COUT",}, \
|
||||
{RSC_CARVEOUT, DDR_ELF_START, DDR_ELF_START, DDR_ELF_LEN, 0, 0, "ELF_DATA_COUT",},
|
||||
|
||||
|
||||
const struct remote_resource_table __resource resources =
|
||||
|
|
|
@ -45,7 +45,7 @@ struct remote_resource_table {
|
|||
unsigned int offset[NO_RESOURCE_ENTRIES];
|
||||
/* text carve out entry */
|
||||
|
||||
struct fw_rsc_carveout ocm_0_cout;
|
||||
struct fw_rsc_carveout ddr_cout;
|
||||
struct fw_rsc_carveout ocm_1_cout;
|
||||
/* rpmsg vdev entry */
|
||||
struct fw_rsc_vdev rpmsg_vdev;
|
||||
|
|
Loading…
Add table
Reference in a new issue