2 commits

Author	SHA1	Message	Date
Subbaraya Sundeep Bhatta	a3ef256b4f	spi: Use interrupt status register Tx empty bit ... Use interrupt status register Tx empty bit instead of status register Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com> Acked-by: Kedareswara rao Appana <appanad@xilinx.com>	2014-09-02 11:21:17 +05:30
Jagannadha Sutradharudu Teki	2c8f92039d	embeddesw: Add initial code support ... Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>	2014-06-24 16:45:01 +05:30