Commit graph

11 commits

Author SHA1 Message Date
Andrei-Liviu Simion
6157f90f4d dp: rx: Added MSA registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:22 +05:30
Andrei-Liviu Simion
88d0e95839 dp: rx: Added DPCD configuration space registers.
These are read-only values that represent the corresponding fields of the RX's
DPCD as seen by the TX.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:21 +05:30
Andrei-Liviu Simion
e6f4d82a4f dp: rx: Added audio registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:21 +05:30
Andrei-Liviu Simion
c61b1b58d5 dp: rx: Added PHY configuration and status registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:19 +05:30
Andrei-Liviu Simion
f4b1a740fc dp: rx: Added user video status registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:19 +05:30
Andrei-Liviu Simion
ea0c4f5d2b dp: rx: Added core and protocol version registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:18 +05:30
Andrei-Liviu Simion
c054b6714c dp: rx: Added DPCD fields.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:17 +05:30
Andrei-Liviu Simion
fe56ba6ef0 dp: rx: Added interrupt registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:16 +05:30
Andrei-Liviu Simion
252735630d dp: rx: Added AUX channel status registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:15 +05:30
Andrei-Liviu Simion
342c11f3e5 dp: rx: Added receiver core configuration registers.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:14 +05:30
Andrei-Liviu Simion
9817415d75 dp: rx: Added low-level core reads and writes.
Created xdprx_hw.h.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-04-26 10:33:13 +05:30