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4 commits

Author SHA1 Message Date
VNSL Durga
7ca1fb1844 xilskey: Modified example and input.h files 
Example has been modified to support both Zynq PL eFuse and
Ultrascale eFuse. Added GPIO pins and channels to access
Master Jtag through GPIO and RSA key hash, AES's CRC value
input macros are also added.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
 2015-08-05 21:05:52 +05:30
VNSL Durga
e2ccad3c90 xilskey: Modified xilskey_efuse_example 
Modified macro name of efuse PS XSK_EFUSEPL_RSA_KEY_HASH_STRING_SIZE
to XSK_EFUSEPS_RSA_KEY_HASH_STRING_SIZE.
Added missing goto.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
 2015-08-05 21:04:35 +05:30
Nava kishore Manne
398cbdc152 lib:sw_services:standalone drivers license changes 
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
 2015-05-15 14:48:25 +05:30
Venkata Naga Sai Krishna Kolapalli
22b5585a09 xilskey_v2_1 : created new v2.1 version for xilskey. 
This patch deprecates the old v2.0 version and created
new v2.1 version for xilskey library.

Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
 2015-04-03 18:22:21 +05:30