During programming the bit files as per flow
in case of errors need to do a full reset of mcap
config space. This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
This patch fixes the issues with the program files(.rbt,.bit)
handling.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
This patch adds support for configuring
a partial clear file followed by a partial bit file.
(Ex: ./mcap -x 0x8038 -C partialclear.bit -p partial.bit)
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
This patch adds support for programming the partial
Reconfiguration clear file.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
This patch fixes the issue
Done pin doesn't go high after programming
the 2nd stage bit stream.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
when -d option is used to dump all the registers,
It should ignore the Data register if it's empty or
Not set and should not return a failure in reading those registers.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
The MCAP interface enables an embedded microprocessor, such as MicroBlaze,
to read and write the FPGA configuration memory.
This library allows user to access the MCAP i/f.
Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
