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Here is a list of all documented file members with links to the documentation:
- x -
XNANDPS_BB_PATTERN :
xnandps_bbm.h
XNANDPS_BB_PATTERN_LENGTH_LARGE_PAGE :
xnandps_bbm.h
XNANDPS_BB_PATTERN_LENGTH_SMALL_PAGE :
xnandps_bbm.h
XNANDPS_BB_PATTERN_OFFSET_LARGE_PAGE :
xnandps_bbm.h
XNANDPS_BB_PATTERN_OFFSET_SMALL_PAGE :
xnandps_bbm.h
XNANDPS_BBT_BLOCK_SHIFT :
xnandps_bbm.h
XNANDPS_BBT_DESC_MAX_BLOCKS :
xnandps_bbm.h
XNANDPS_BBT_DESC_PAGE_OFFSET :
xnandps_bbm.h
XNANDPS_BBT_DESC_SIG_LEN :
xnandps_bbm.h
XNANDPS_BBT_DESC_SIG_OFFSET :
xnandps_bbm.h
XNANDPS_BBT_DESC_VER_OFFSET :
xnandps_bbm.h
XNANDPS_BBT_ENTRY_NUM_BLOCKS :
xnandps_bbm.h
XNANDPS_BBT_SCAN_2ND_PAGE :
xnandps_bbm.h
XNandPs_BbtBlockShift :
xnandps_bbm.h
XNANDPS_BLOCK_BAD :
xnandps_bbm.h
XNANDPS_BLOCK_FACTORY_BAD :
xnandps_bbm.h
XNANDPS_BLOCK_GOOD :
xnandps_bbm.h
XNANDPS_BLOCK_RESERVED :
xnandps_bbm.h
XNANDPS_BLOCK_SHIFT_MASK :
xnandps_bbm.h
XNANDPS_BLOCK_TYPE_MASK :
xnandps_bbm.h
XNandPs_CfgInitialize() :
xnandps.c
XNandPs_ConfigTable :
xnandps_sinit.c
,
xnandps_g.c
XNANDPS_DIRECT_CMD_ADDR_MASK :
xnandps_hw.h
XNANDPS_DIRECT_CMD_CHIP_SELECT_MASK :
xnandps_hw.h
XNANDPS_DIRECT_CMD_CHIP_SELECT_SHIFT :
xnandps_hw.h
XNANDPS_DIRECT_CMD_CMD_TYPE_SHIFT :
xnandps_hw.h
XNANDPS_DIRECT_CMD_OFFSET :
xnandps_hw.h
XNANDPS_DIRECT_CMD_SET_CRE_MASK :
xnandps_hw.h
XNANDPS_DIRECT_CMD_SET_CRE_SHIFT :
xnandps_hw.h
XNANDPS_DIRECT_CMD_TYPE_MASK :
xnandps_hw.h
XNANDPS_ECC_ADDR0_OFFSET :
xnandps_hw.h
XNANDPS_ECC_ADDR1_OFFSET :
xnandps_hw.h
XNANDPS_ECC_CAN_CORRECT_MASK :
xnandps_hw.h
XNANDPS_ECC_FAIL_MASK :
xnandps_hw.h
XNANDPS_ECC_LAST_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_EXTRA_BLOCK_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_EXTRA_BLOCK_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_EXTRA_BLOCK_SIZE_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_EXTRA_BLOCK_SIZE_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_INT_ABORT_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_INT_ABORT_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_INT_PASS_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_INT_PASS_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_JUMP_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_JUMP_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_MODE_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_MODE_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_READ_END_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_ECC_READ_END_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_IGNORE_ADD8_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_IGNORE_ADD8_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_OFFSET :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_PAGE_SIZE_1024 :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_PAGE_SIZE_2048 :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_PAGE_SIZE_512 :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_PAGE_SIZE_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCFG_PAGE_SIZE_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCMD1_OFFSET :
xnandps_hw.h
XNANDPS_ECC_MEMCMD2_OFFSET :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_RD_CMD_END_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_RD_CMD_END_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_RD_CMD_END_VALID_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_RD_CMD_END_VALID_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_RD_CMD_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_RD_CMD_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_WR_CMD_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND1_WR_CMD_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_RD_COL_CHANGE_END_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_RD_COL_CHANGE_END_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_RD_COL_CHANGE_END_VALID_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_RD_COL_CHANGE_END_VALID_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_RD_COL_CHANGE_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_RD_COL_CHANGE_SHIFT :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_WR_COL_CHANGE_MASK :
xnandps_hw.h
XNANDPS_ECC_MEMCOMMAND2_WR_COL_CHANGE_SHIFT :
xnandps_hw.h
XNANDPS_ECC_READ_MASK :
xnandps_hw.h
XNANDPS_ECC_READ_NOT_WRITE_MASK :
xnandps_hw.h
XNANDPS_ECC_STATUS_MASK :
xnandps_hw.h
XNANDPS_ECC_STATUS_OFFSET :
xnandps_hw.h
XNANDPS_ECC_STATUS_RAW_INT_STATUS_MASK :
xnandps_hw.h
XNANDPS_ECC_VALID_MASK :
xnandps_hw.h
XNANDPS_ECC_VALUE0_OFFSET :
xnandps_hw.h
XNANDPS_ECC_VALUE1_OFFSET :
xnandps_hw.h
XNANDPS_ECC_VALUE2_OFFSET :
xnandps_hw.h
XNANDPS_ECC_VALUE3_OFFSET :
xnandps_hw.h
XNANDPS_ECC_VALUE4_OFFSET :
xnandps_hw.h
XNANDPS_ECC_VALUE_CORRECT_MASK :
xnandps_hw.h
XNANDPS_ECC_VALUE_FAIL_MASK :
xnandps_hw.h
XNANDPS_ECC_VALUE_INT_MASK :
xnandps_hw.h
XNANDPS_ECC_VALUE_MASK :
xnandps_hw.h
XNANDPS_ECC_VALUE_READ_MASK :
xnandps_hw.h
XNANDPS_ECC_VALUE_VALID_MASK :
xnandps_hw.h
XNandPs_EraseBlock() :
xnandps.c
XNANDPS_FLASH_BLOCK_BAD :
xnandps_bbm.h
XNANDPS_FLASH_BLOCK_FACTORY_BAD :
xnandps_bbm.h
XNANDPS_FLASH_BLOCK_GOOD :
xnandps_bbm.h
XNANDPS_FLASH_BLOCK_RESERVED :
xnandps_bbm.h
XNANDPS_FLASH_CYCLES :
xnandps_hw.h
XNANDPS_IF0_CHIP_0_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF0_CHIP_1_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF0_CHIP_2_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF0_CHIP_3_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF0_ECC_OFFSET :
xnandps_hw.h
XNANDPS_IF1_CHIP_0_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF1_CHIP_1_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF1_CHIP_2_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF1_CHIP_3_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_IF1_ECC_OFFSET :
xnandps_hw.h
XNandPs_InitBbtDesc() :
xnandps_bbm.c
,
xnandps.c
XNANDPS_INTGTEST_OFFSET :
xnandps_hw.h
XNandPs_IsBlockBad() :
xnandps_bbm.h
,
xnandps_bbm.c
XNandPs_LookupConfig() :
xnandps_sinit.c
XNandPs_MarkBlockBad() :
xnandps_bbm.h
,
xnandps_bbm.c
XNANDPS_MEMC_CLR_CONFIG_ECC_INT_DISABLE0_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_ECC_INT_DISABLE1_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_INT_CLR0_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_INT_CLR1_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_INT_DISABLE0_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_INT_DISABLE1_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_LOW_POWER_EXIT_MASK :
xnandps_hw.h
XNANDPS_MEMC_CLR_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_EX_MONITORS_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_MEMORY_CHIPS0_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_MEMORY_CHIPS1_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_MEMORY_TYPE0_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_MEMORY_TYPE1_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_MEMORY_WIDTH0_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_MEMORY_WIDTH1_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_REMAP0_MASK :
xnandps_hw.h
XNANDPS_MEMC_IF_CONFIG_REMAP1_MASK :
xnandps_hw.h
XNANDPS_MEMC_SET_CONFIG_ECC_INT_ENABLE0_MASK :
xnandps_hw.h
XNANDPS_MEMC_SET_CONFIG_ECC_INT_ENABLE1_MASK :
xnandps_hw.h
XNANDPS_MEMC_SET_CONFIG_INT_ENABLE0_MASK :
xnandps_hw.h
XNANDPS_MEMC_SET_CONFIG_INT_ENABLE1_MASK :
xnandps_hw.h
XNANDPS_MEMC_SET_CONFIG_LOW_POWER_REQ_MASK :
xnandps_hw.h
XNANDPS_MEMC_SET_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_MEMC_STATUS_ECC_INT0_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_ECC_INT1_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_ECC_INT_EN0_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_ECC_INT_EN1_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_INT_EN0_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_INT_EN1_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_INT_STATUS0_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_INT_STATUS1_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_OFFSET :
xnandps_hw.h
XNANDPS_MEMC_STATUS_RAW_ECC_INT0_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_RAW_ECC_INT1_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_RAW_INT_STATUS0_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_RAW_INT_STATUS1_MASK :
xnandps_hw.h
XNANDPS_MEMC_STATUS_STATE_MASK :
xnandps_hw.h
XNANDPS_OPMODE :
xnandps_hw.h
XNANDPS_OPMODE_ADDRESS_MASK :
xnandps_hw.h
XNANDPS_OPMODE_ADV_MASK :
xnandps_hw.h
XNANDPS_OPMODE_BAA_MASK :
xnandps_hw.h
XNANDPS_OPMODE_BLS_MASK :
xnandps_hw.h
XNANDPS_OPMODE_BURST_ALIGN_MASK :
xnandps_hw.h
XNANDPS_OPMODE_MW_MASK :
xnandps_hw.h
XNANDPS_OPMODE_RD_BL_MASK :
xnandps_hw.h
XNANDPS_OPMODE_RD_SYNC_MASK :
xnandps_hw.h
XNANDPS_OPMODE_WR_BL_MASK :
xnandps_hw.h
XNANDPS_OPMODE_WR_SYNC_MASK :
xnandps_hw.h
XNANDPS_PCELL_ID0_OFFSET :
xnandps_hw.h
XNANDPS_PCELL_ID1_OFFSET :
xnandps_hw.h
XNANDPS_PCELL_ID2_OFFSET :
xnandps_hw.h
XNANDPS_PCELL_ID3_OFFSET :
xnandps_hw.h
XNANDPS_PCELL_ID_MASK :
xnandps_hw.h
XNANDPS_PERIPH_ID0_OFFSET :
xnandps_hw.h
XNANDPS_PERIPH_ID1_OFFSET :
xnandps_hw.h
XNANDPS_PERIPH_ID2_OFFSET :
xnandps_hw.h
XNANDPS_PERIPH_ID3_OFFSET :
xnandps_hw.h
XNANDPS_PERIPH_ID_DESIGNER_ID_MASK :
xnandps_hw.h
XNANDPS_PERIPH_ID_INTG_CFG_MASK :
xnandps_hw.h
XNANDPS_PERIPH_ID_PART_NUM_MASK :
xnandps_hw.h
XNANDPS_PERIPH_ID_REVISION_MASK :
xnandps_hw.h
XNandPs_Read() :
xnandps.c
XNandPs_ReadCache() :
xnandps.c
XNandPs_ReadReg :
xnandps_hw.h
XNandPs_ReadSpareBytes() :
xnandps_bbm.c
,
xnandps.c
XNANDPS_REFRESH_PERIOD_0_MASK :
xnandps_hw.h
XNANDPS_REFRESH_PERIOD_0_OFFSET :
xnandps_hw.h
XNANDPS_REFRESH_PERIOD_1_MASK :
xnandps_hw.h
XNANDPS_REFRESH_PERIOD_1_OFFSET :
xnandps_hw.h
XNandPs_ScanBbt() :
xnandps_bbm.c
,
xnandps.c
XNandPs_SendCommand() :
xnandps.c
XNANDPS_SET_CYCLES_OFFSET :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T0_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T0_SHIFT :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T1_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T1_SHIFT :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T2_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T2_SHIFT :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T3_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T3_SHIFT :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T4_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T4_SHIFT :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T5_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T5_SHIFT :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T6_MASK :
xnandps_hw.h
XNANDPS_SET_CYCLES_SET_T6_SHIFT :
xnandps_hw.h
XNANDPS_SET_OPMODE_MW_16_BITS :
xnandps_hw.h
XNANDPS_SET_OPMODE_MW_32_BITS :
xnandps_hw.h
XNANDPS_SET_OPMODE_MW_8_BITS :
xnandps_hw.h
XNANDPS_SET_OPMODE_OFFSET :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_ADV_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_BAA_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_BLS_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_BURST_ALIGN_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_MW_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_RD_BL_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_RD_SYNC_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_WR_BL_MASK :
xnandps_hw.h
XNANDPS_SET_OPMODE_SET_WR_SYNC_MASK :
xnandps_hw.h
XNANDPS_USER_CONFIG_MASK :
xnandps_hw.h
XNANDPS_USER_CONFIG_OFFSET :
xnandps_hw.h
XNANDPS_USER_STATUS_MASK :
xnandps_hw.h
XNANDPS_USER_STATUS_OFFSET :
xnandps_hw.h
XNandPs_Write() :
xnandps.c
XNandPs_WriteCache() :
xnandps.c
XNandPs_WriteReg :
xnandps_hw.h
XNandPs_WriteSpareBytes() :
xnandps.c
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