For more information about the operation of this device, see the hardware specification and documentation in the higher level driver xosd.h source code file.
MODIFICATION HISTORY:
Ver Who Date Changes ----- ---- -------- ------------------------------------------------------- 1.00a xd 08/01/08 First release 2.00a cm 06/12/12 14.1/14.2 release with address map updated to match Video over AXI4-Stream Specification 2.00a cjm 12/18/12 Converted from xio.h to xil_io.h, translating basic types, MB cache functions, exceptions and assertions to xil_io format.
#include "xil_io.h"
Register Offsets | |
#define | XOSD_CTL 0x000 |
#define | XOSD_SS 0x020 |
#define | XOSD_BC0 0x100 |
#define | XOSD_BC1 0x104 |
#define | XOSD_BC2 0x108 |
#define | XOSD_L0C 0x110 |
#define | XOSD_L0P 0x114 |
#define | XOSD_L0S 0x118 |
#define | XOSD_L1C 0x120 |
#define | XOSD_L1P 0x124 |
#define | XOSD_L1S 0x128 |
#define | XOSD_L2C 0x130 |
#define | XOSD_L2P 0x134 |
#define | XOSD_L2S 0x138 |
#define | XOSD_L3C 0x140 |
#define | XOSD_L3P 0x144 |
#define | XOSD_L3S 0x148 |
#define | XOSD_L4C 0x150 |
#define | XOSD_L4P 0x154 |
#define | XOSD_L4S 0x158 |
#define | XOSD_L5C 0x160 |
#define | XOSD_L5P 0x164 |
#define | XOSD_L5S 0x168 |
#define | XOSD_L6C 0x170 |
#define | XOSD_L6P 0x174 |
#define | XOSD_L6S 0x178 |
#define | XOSD_L7C 0x180 |
#define | XOSD_L7P 0x184 |
#define | XOSD_L7S 0x188 |
#define | XOSD_GCWBA 0x190 |
#define | XOSD_GCABA 0x194 |
#define | XOSD_GCD 0x198 |
#define | XOSD_VER 0x010 |
#define | XOSD_RST 0x000 |
#define | XOSD_GIER 0x010 |
#define | XOSD_ISR 0x004 |
#define | XOSD_IER 0x00c |
Memory footprint of layers | |
#define | XOSD_LXC 0x00 |
#define | XOSD_LXP 0x04 |
#define | XOSD_LXS 0x08 |
Graphics Controller Bank related constants | |
#define | XOSD_GC_BANK_NUM 2 |
OSD Control Register bit definition | |
#define | XOSD_CTL_VBP_MASK 0x00000020 |
#define | XOSD_CTL_HBP_MASK 0x00000010 |
#define | XOSD_CTL_RUE_MASK 0x00000002 |
#define | XOSD_CTL_EN_MASK 0x00000001 |
OSD Screen Size Register bit definition | |
#define | XOSD_SS_YSIZE_MASK 0x0FFF0000 |
#define | XOSD_SS_YSIZE_SHIFT 16 |
#define | XOSD_SS_XSIZE_MASK 0x00000FFF |
OSD Background Color Channel 0 | |
#define | XOSD_BC0_YG_MASK 0x00000FFF |
OSD Background Color Channel 1 | |
#define | XOSD_BC1_UCBB_MASK 0x00000FFF |
OSD Background Color Channel 2 | |
#define | XOSD_BC2_VCRR_MASK 0x00000FFF |
Maximum number of the layers | |
#define | XOSD_MAX_NUM_OF_LAYERS 8 |
OSD Layer Control (Layer 0 through (XOSD_MAX_NUM_OF_LAYERS - 1)) | |
#define | XOSD_LXC_ALPHA_MASK 0x0FFF0000 |
#define | XOSD_LXC_ALPHA_SHIFT 16 |
#define | XOSD_LXC_PRIORITY_MASK 0x00000700 |
#define | XOSD_LXC_PRIORITY_SHIFT 8 |
#define | XOSD_LXC_GALPHAEN_MASK 0x00000002 |
#define | XOSD_LXC_EN_MASK 0x00000001 |
OSD Layer Position (Layer 0 through (XOSD_MAX_NUM_OF_LAYERS - 1)) | |
#define | XOSD_LXP_YSTART_MASK 0x0FFF0000 |
#define | XOSD_LXP_YSTART_SHIFT 16 |
#define | XOSD_LXP_XSTART_MASK 0x00000FFF |
OSD Layer Size (Layer 0 through (XOSD_MAX_NUM_OF_LAYERS - 1)) | |
#define | XOSD_LXS_YSIZE_MASK 0x0FFF0000 |
#define | XOSD_LXS_YSIZE_SHIFT 16 |
#define | XOSD_LXS_XSIZE_MASK 0x00000FFF |
OSD Graphics Controller Write Bank Address | |
#define | XOSD_GCWBA_GCNUM_MASK 0x00000700 |
#define | XOSD_GCWBA_GCNUM_SHIFT 8 |
#define | XOSD_GCWBA_BANK_MASK 0x00000007 |
OSD Graphics Controller Active Bank Address | |
#define | XOSD_GCABA_CHR_MASK 0xFF000000 |
#define | XOSD_GCABA_CHR_SHIFT 24 |
#define | XOSD_GCABA_TXT_MASK 0x00FF0000 |
#define | XOSD_GCABA_TXT_SHIFT 16 |
#define | XOSD_GCABA_COL_MASK 0x0000FF00 |
#define | XOSD_GCABA_COL_SHIFT 8 |
#define | XOSD_GCABA_INS_MASK 0x000000FF |
Version Register bit definition | |
#define | XOSD_VER_MAJOR_MASK 0xFF000000 |
#define | XOSD_VER_MAJOR_SHIFT 24 |
#define | XOSD_VER_MINOR_MASK 0x00FF0000 |
#define | XOSD_VER_MINOR_SHIFT 16 |
#define | XOSD_VER_REV_MASK 0x0000F000 |
#define | XOSD_VER_REV_SHIFT 12 |
OSD Software Reset | |
#define | XOSD_RST_RESET 0x80000000 |
Global Interrupt Enable Register bit definition | |
#define | XOSD_GIER_GIE_MASK 0x80000000 |
Interrupt Status/Enable Register bit definition | |
#define | XOSD_IXR_GAO_MASK 0xFF000000 |
#define | XOSD_IXR_GIE_MASK 0x00FF0000 |
#define | XOSD_IXR_OOE_MASK 0x00000010 |
#define | XOSD_IXR_IUE_MASK 0x00ff0000 |
#define | XOSD_IXR_VBIE_MASK 0x00000004 |
#define | XOSD_IXR_VBIS_MASK 0x00000002 |
#define | XOSD_IXR_FE_MASK 0x00000008 |
#define | XOSD_IXR_FD_MASK 0x00000001 |
#define | XOSD_IXR_ALLIERR_MASK |
#define | XOSD_IXR_ALLINTR_MASK |
Layer Types | |
#define | XOSD_LAYER_TYPE_DISABLE 0 |
#define | XOSD_LAYER_TYPE_GPU 1 |
#define | XOSD_LAYER_TYPE_VFBC 2 |
Supported Instruction numbers given an instruction memory size | |
#define | XOSD_INS_MEM_SIZE_TO_NUM 1 |
GC Instruction word offset definition | |
#define | XOSD_INS0 0 |
#define | XOSD_INS1 1 |
#define | XOSD_INS2 2 |
#define | XOSD_INS3 3 |
#define | XOSD_INS_SIZE 4 |
GC Instruction word 0 definition | |
#define | XOSD_INS0_OPCODE_MASK 0xF0000000 |
#define | XOSD_INS0_OPCODE_SHIFT 28 |
#define | XOSD_INS0_GCNUM_MASK 0x07000000 |
#define | XOSD_INS0_GCNUM_SHIFT 24 |
#define | XOSD_INS0_XEND_MASK 0x00FFF000 |
#define | XOSD_INS0_XEND_SHIFT 12 |
#define | XOSD_INS0_XSTART_MASK 0x00000FFF |
GC Instruction word 1 definition | |
#define | XOSD_INS1_TXTINDEX_MASK 0x0000000F |
GC Instruction word 2 definition | |
#define | XOSD_INS2_OBJSIZE_MASK 0xFF000000 |
#define | XOSD_INS2_OBJSIZE_SHIFT 24 |
#define | XOSD_INS2_YEND_MASK 0x00FFF000 |
#define | XOSD_INS2_YEND_SHIFT 12 |
#define | XOSD_INS2_YSTART_MASK 0x00000FFF |
GC Instruction word 3 definition | |
#define | XOSD_INS3_COL_MASK 0x0000000F |
GC Instruction Operation Code definition (used in Instruction word 0) | |
#define | XOSD_INS_OPCODE_END 0x0 |
#define | XOSD_INS_OPCODE_NOP 0x8 |
#define | XOSD_INS_OPCODE_BOX 0xA |
#define | XOSD_INS_OPCODE_LINE 0xC |
#define | XOSD_INS_OPCODE_TXT 0xE |
#define | XOSD_INS_OPCODE_BOXTXT 0xF |
GC color size | |
#define | XOSD_COLOR_ENTRY_SIZE 4 |
GC font unit size | |
#define | XOSD_FONT_BIT_TO_BYTE 8 |
Layer priority | |
#define | XOSD_LAYER_PRIORITY_0 0 |
#define | XOSD_LAYER_PRIORITY_1 1 |
#define | XOSD_LAYER_PRIORITY_2 2 |
#define | XOSD_LAYER_PRIORITY_3 3 |
#define | XOSD_LAYER_PRIORITY_4 4 |
#define | XOSD_LAYER_PRIORITY_5 5 |
#define | XOSD_LAYER_PRIORITY_6 6 |
#define | XOSD_LAYER_PRIORITY_7 7 |
Device register I/O APIs | |
#define | XOSD_ReadReg(BaseAddress, RegOffset) XOSD_In32((BaseAddress) + (RegOffset)) |
#define | XOSD_WriteReg(BaseAddress, RegOffset, Data) XOSD_Out32((BaseAddress) + (RegOffset), (Data)) |
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Background Color Channel 0 |
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Y (luma) or Green |
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Background Color Channel 1 |
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U (Cb) or Blue |
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Background Color Channel 2 |
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V(Cr) or Red |
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Size of each color entry in bytes |
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Control |
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OSD Enable |
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Horizontal Blank Polarity |
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OSD Register Update Enable |
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Vertical Blank Polarity |
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Ratio to convert font size to byte |
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The number of Banks in each Graphics controller |
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GPU Active Bank Address |
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Set the active Character Bank |
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Bit shift of active Character Bank |
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Set the active Color Table Bank |
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Bit shift of active Color Table Bank |
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Set the active instruction Bank |
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Set the active Text Bank |
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Bit shift of active Text Bank |
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GPU Data |
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GPU Write Bank Address |
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Controls which bank to write GPU instructions and Color LUT data into. |
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Graphics Controller Number |
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Bit shift of Graphics Controller Number |
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Global Interrupt Enable Register |
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Global interrupt enable |
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Interrupt Enable Register |
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Instruction word 0 offset |
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Graphics controller number (GC#) |
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Bit shift number of GC# |
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Operation Code (OpCode) |
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Bit shift number of OpCode |
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Horizontal end pixel of the object |
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Bit shift number of Horizontal end pixel of the object |
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Horizontal start pixel of the Object |
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Instruction word 1 offset |
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String Index |
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Instruction word 2 offset |
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Object Size |
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Bit shift number of Object Size |
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Vertical end line of the object |
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Bit shift number of Vertical end line of the object |
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Vertical start line of the Object |
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Instruction word 3 offset |
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Color Index for Box/Text |
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Conversion to the number of instructions from the instruction memory size |
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Box |
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Box Text |
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End of instruction list |
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Line |
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NOP |
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Text |
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Size of an instruction in words |
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Interrupt Status Register |
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Value: (XOSD_IXR_GAO_MASK | \ XOSD_IXR_GIE_MASK | \ XOSD_IXR_OOE_MASK | \ XOSD_IXR_IUE_MASK | \ XOSD_IXR_FE_MASK) |
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Value: Mask for all interrupts |
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OSD completed processing Frame |
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OSD did not complete processing frame before next Vblank |
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Graphics Controller Instruction Overflow |
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Graphics Controller Instruction Error |
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OSD Input Underflow Error |
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OSD Output Overflow Error |
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Vertical Blank Interval End |
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Vertical Blank Interval Start |
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Layer 0 Control |
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Layer 0 Position |
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Layer 0 Size |
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Layer 1 Control |
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Layer 1 Position |
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Layer 1 Size |
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Layer 2 Control |
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Layer 2 Position |
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Layer 2 Size |
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Layer 3 Control |
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Layer 3 Position |
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Layer 3 Size |
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Layer 4 Control |
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Layer 4 Position |
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Layer 4 Size |
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Layer 5 Control |
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Layer 5 Position |
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Layer 5 Size |
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Layer 6 Control |
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Layer 6 Position |
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Layer 6 Size |
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Layer 7 Control |
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Layer 7 Position |
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Layer 7 Size |
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Priority 0 --- Lowest |
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Priority 1 |
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Priority 2 |
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Priority 3 |
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Priority 4 |
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Priority 5 |
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Priority 6 |
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Priority 7 --- Highest |
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Layer is disabled |
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Layer's type is GPU |
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Layer's type is VFBC |
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Layer Control |
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Global Alpha Value |
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Bit shift number of Global Alpha Value |
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Layer Enable |
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Global Alpha Enable |
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Layer Priority |
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Bit shift number of Layer Priority |
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Layer Position |
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Horizontal start pixel of origin of layer |
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Vertical start line of origin of layer |
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Bit shift of vertical start line of origin of layer |
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Layer Size |
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Horizontal size of layer |
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Vertical size of layer |
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Bit shift number of vertical size of layer |
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The max number of layers |
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Read the given register.
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Software Reset |
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Software Reset |
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Screen Size |
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Horizontal Width of OSD Output |
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Vertical Height of OSD Output |
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Bit shift of XOSD_SS_YSIZE_MASK |
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Version Register |
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Major Version |
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Major Version Bit Shift |
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Minor Version |
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Minor Version Bit Shift |
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Revision Version |
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Revision Bit Shift |
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Write the given register.
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