Xilinx Processor IP Library

Software Drivers

xaxipcie.h File Reference

#include "xil_assert.h"
#include "xstatus.h"
#include "xaxipcie_hw.h"
#include "xil_types.h"
#include <string.h>
#include "xil_cache.h"

Classes

struct  XAxiPcie_Config
struct  XAxiPcie
struct  XAxiPcie_BarAddr

Defines

#define XAXIPCIE_H
#define XAXIPCIE_IS_RC   0x01
#define ALIGN_4KB   0xFFFFF000
#define XAXIPCIE_VSEC1   0x00
#define XAXIPCIE_VSEC2   0x01
#define XAxiPcie_GetRequestId   XAxiPcie_GetRequesterId
#define XAxiPcie_IsLinkUp(InstancePtr)
#define XAxiPcie_IsEcamBusy(InstancePtr)

Functions

XAxiPcie_Config * XAxiPcie_LookupConfig (u16 DeviceId)
int XAxiPcie_CfgInitialize (XAxiPcie *InstancePtr, XAxiPcie_Config *CfgPtr, u32 EffectiveAddress)
void XAxiPcie_GetVsecCapability (XAxiPcie *InstancePtr, u8 VsecNum, u16 *VsecIdPtr, u8 *VersionPtr, u16 *NextCapPtr)
void XAxiPcie_GetVsecHeader (XAxiPcie *InstancePtr, u8 VsecNum, u16 *VsecIdPtr, u8 *RevisionPtr, u16 *LengthPtr)
void XAxiPcie_GetBridgeInfo (XAxiPcie *InstancePtr, u8 *Gen2Ptr, u8 *RootPortPtr, u8 *ECAMSizePtr)
void XAxiPcie_GetRequesterId (XAxiPcie *InstancePtr, u8 *BusNumPtr, u8 *DevNumPtr, u8 *FunNumPtr, u8 *PortNumPtr)
void XAxiPcie_GetPhyStatusCtrl (XAxiPcie *InstancePtr, u32 *PhyState)
void XAxiPcie_GetRootPortStatusCtrl (XAxiPcie *InstancePtr, u32 *StatusPtr)
void XAxiPcie_SetRootPortStatusCtrl (XAxiPcie *InstancePtr, u32 StatusData)
int XAxiPcie_SetRootPortMSIBase (XAxiPcie *InstancePtr, unsigned long long MsiBase)
void XAxiPcie_GetRootPortErrFIFOMsg (XAxiPcie *InstancePtr, u16 *ReqIdPtr, u8 *ErrType, u8 *ErrValid)
void XAxiPcie_ClearRootPortErrFIFOMsg (XAxiPcie *InstancePtr)
int XAxiPcie_GetRootPortIntFIFOReg (XAxiPcie *InstancePtr, u16 *ReqIdPtr, u16 *MsiAddr, u8 *MsiInt, u8 *IntValid, u16 *MsiMsgData)
void XAxiPcie_ClearRootPortIntFIFOReg (XAxiPcie *InstancePtr)
void XAxiPcie_GetLocalBusBar2PcieBar (XAxiPcie *InstancePtr, u8 BarNumber, XAxiPcie_BarAddr *BarAddrPtr)
void XAxiPcie_SetLocalBusBar2PcieBar (XAxiPcie *InstancePtr, u8 BarNumber, XAxiPcie_BarAddr *BarAddrPtr)
void XAxiPcie_ReadLocalConfigSpace (XAxiPcie *InstancePtr, u16 Offset, u32 *DataPtr)
void XAxiPcie_WriteLocalConfigSpace (XAxiPcie *InstancePtr, u16 Offset, u32 Data)
void XAxiPcie_ReadRemoteConfigSpace (XAxiPcie *InstancePtr, u8 Bus, u8 Device, u8 Function, u16 Offset, u32 *DataPtr)
void XAxiPcie_WriteRemoteConfigSpace (XAxiPcie *InstancePtr, u8 Bus, u8 Device, u8 Function, u16 Offset, u32 Data)
void XAxiPcie_EnableGlobalInterrupt (XAxiPcie *InstancePtr)
void XAxiPcie_DisableGlobalInterrupt (XAxiPcie *InstancePtr)
void XAxiPcie_EnableInterrupts (XAxiPcie *InstancePtr, u32 EnableMask)
void XAxiPcie_DisableInterrupts (XAxiPcie *InstancePtr, u32 DisableMask)
void XAxiPcie_GetEnabledInterrupts (XAxiPcie *InstancePtr, u32 *EnabledMaskPtr)
void XAxiPcie_GetPendingInterrupts (XAxiPcie *InstancePtr, u32 *PendingMaskPtr)
void XAxiPcie_ClearPendingInterrupts (XAxiPcie *InstancePtr, u32 ClearMask)

Detailed Description

Define Documentation

#define ALIGN_4KB   0xFFFFF000
#define XAxiPcie_GetRequestId   XAxiPcie_GetRequesterId
#define XAXIPCIE_H
#define XAXIPCIE_IS_RC   0x01
#define XAxiPcie_IsEcamBusy ( InstancePtr   ) 
Value:
(XAxiPcie_ReadReg((InstancePtr)->Config.BaseAddress,    \
        XAXIPCIE_BSC_OFFSET) & XAXIPCIE_BSC_ECAM_BUSY_MASK) ? TRUE : FALSE

Check whether ECAM is busy or not.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
Returns:
  • TRUE if ECAM is busy
  • FALSE if ECAM is idel
Note:
This function is valid only when IP is configured as a root complex
#define XAxiPcie_IsLinkUp ( InstancePtr   ) 
Value:
(XAxiPcie_ReadReg((InstancePtr)->Config.BaseAddress,    \
        XAXIPCIE_PHYSC_OFFSET) & XAXIPCIE_PHYSC_LINK_UP_MASK) ? TRUE : FALSE

Check whether link is up or not.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
Returns:
  • TRUE if link is up
  • FALSE if link is down
Note:
None
#define XAXIPCIE_VSEC1   0x00

First VSEC Register

#define XAXIPCIE_VSEC2   0x01

Second VSEC Register

Function Documentation

int XAxiPcie_CfgInitialize ( XAxiPcie *  InstancePtr,
XAxiPcie_Config *  CfgPtr,
u32  EffectiveAddress 
)

Initialize the XAxiPcie instance provided by the caller based on the given Config structure.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.The memory of the pointer references must be pre-allocated by the caller.
CfgPtr is the device configuration structure containing required HW build data.
EffectiveAddress is the Physical address of the hardware in a Virtual Memory operating system environment.It is the Base Address in a stand alone environment.
Returns:
  • XST_SUCCESS Initialization was successful.
Note:
None.
void XAxiPcie_ClearPendingInterrupts ( XAxiPcie *  InstancePtr,
u32  ClearMask 
)

Clear the currently pending interrupt bits of the IP passed from the caller into "ClearMask".

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
ClearMask is the bit pattern for pending interrupts wanted to be cleared.
Returns:
None.
Note:
None.
void XAxiPcie_ClearRootPortErrFIFOMsg ( XAxiPcie *  InstancePtr  ) 

Clear Root Port Error FIFO Message

Parameters:
InstancePtr is the PCIe component to operate on.
Returns:
None.
Note:
This function is valid only when IP is configured as a root complex.
void XAxiPcie_ClearRootPortIntFIFOReg ( XAxiPcie *  InstancePtr  ) 

Clear Root Port FIFO Interrupt message Register 1 & 2.

Parameters:
InstancePtr is the PCIe component to operate on
Returns:
None.
Note:
This function is valid only when IP is configured as a root complex.Clearing any one Interrupt FIFO register clears both registers.
void XAxiPcie_DisableGlobalInterrupt ( XAxiPcie *  InstancePtr  ) 

Disable the Global Interrupt.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
Returns:
None
Note:
This bit is in the Bridge Status and Control Register.
void XAxiPcie_DisableInterrupts ( XAxiPcie *  InstancePtr,
u32  DisableMask 
)

Disable the IP interrupt bits passed into "DisableMask".

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
DisableMask is the bit pattern for interrupts wanted to be disabled.
Returns:
None
Note:
If an interrupt is already disabled before calling this function, it will stay disabled regardless of the value of "DisableMask" passed from the caller.
void XAxiPcie_EnableGlobalInterrupt ( XAxiPcie *  InstancePtr  ) 

Enable the Global Interrupt.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
Returns:
None
Note:
This bit is in the Bridge Status and Control Register.
void XAxiPcie_EnableInterrupts ( XAxiPcie *  InstancePtr,
u32  EnableMask 
)

Enable the IP interrupt bits passed into "EnableMask".

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
EnableMask is the bit pattern for interrupts wanted to be enabled.
Returns:
None
Note:
If an interrupt is already enabled before calling this function, it will stay enabled regardless of the value of "EnableMask" passed from the caller.
void XAxiPcie_GetBridgeInfo ( XAxiPcie *  InstancePtr,
u8 *  Gen2Ptr,
u8 *  RootPortPtr,
u8 *  ECAMSizePtr 
)

This API Reads the Bridge info register.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
Gen2Ptr is a pointer to a variable indicating whether underlying PCIe block support PCIe Gen2 Speed.
RootPortPtr is a pointer to a variable indication whether underlying PCIe block is root port.
ECAMSizePtr is a pointer to a variable where it indicates ECAM size. Value is between 1 to 8. Total address bits dedicated to ECAM is 20 + ECAM size.
Returns:
None.
Note:
None
void XAxiPcie_GetEnabledInterrupts ( XAxiPcie *  InstancePtr,
u32 *  EnabledMaskPtr 
)

Get the currently enabled interrupt bits of the IP and pass them back to the caller into "EnabledMask".

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
EnabledMaskPtr is a pointer to a variable where the driver will pass back the enabled interrupt bits after reading them from IP.
Returns:
None.
Note:
None.
void XAxiPcie_GetLocalBusBar2PcieBar ( XAxiPcie *  InstancePtr,
u8  BarNumber,
XAxiPcie_BarAddr *  BarAddrPtr 
)

Read PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
BarNumber is AXI bar number (0 - 5) passed by caller.
BarAddrPtr is a pointer to a variable where the driver will . pass back translation vector.
Returns:
None.
Note:
None.
void XAxiPcie_GetPendingInterrupts ( XAxiPcie *  InstancePtr,
u32 *  PendingMaskPtr 
)

Get the currently pending interrupt bits of the IP and pass them back to the caller into "PendingMask".

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
PendingMaskPtr is a pointer to a variable where the driver will pass back the pending interrupt bits after reading them from IP.
Returns:
None.
Note:
None.
void XAxiPcie_GetPhyStatusCtrl ( XAxiPcie *  InstancePtr,
u32 *  PhyState 
)

This API is used to read the Phy Status/Control Register.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
PhyState is a pointer to a variable where the driver will pass back Current physical status.
Returns:
None.
Note:
None.
void XAxiPcie_GetRequesterId ( XAxiPcie *  InstancePtr,
u8 *  BusNumPtr,
u8 *  DevNumPtr,
u8 *  FunNumPtr,
u8 *  PortNumPtr 
)

Read the Bus Location register.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
BusNumPtr is a pointer to a variable where the driver will pass back the bus number of requester ID assigned to IP.
DevNumPtr is a pointer to a variable where the driver will pass back the device number of requester ID assigned to IP.
FunNumPtr is a pointer to a variable where the driver will pass back the function number of requester ID assigned to IP.
PortNumPtr is a pointer to a variable where the driver will pass back the Port number of requester ID assigned to IP.
Returns:
None.
Note:
None
void XAxiPcie_GetRootPortErrFIFOMsg ( XAxiPcie *  InstancePtr,
u16 *  ReqIdPtr,
u8 *  ErrType,
u8 *  ErrValid 
)

Read Root Port Error FIFO Message

Parameters:
InstancePtr is the PCIe component to operate on.
ReqIdPtr is a variable where the driver will pass back the requester Id of error message.
ErrType is a variable where the driver will pass back the type of error message
ErrValid is a variable where the driver will pass back the status of read operation of error message.
Returns:
None.
Note:
This function is valid only when IP is configured as a root complex.
int XAxiPcie_GetRootPortIntFIFOReg ( XAxiPcie *  InstancePtr,
u16 *  ReqIdPtr,
u16 *  MsiAddr,
u8 *  MsiInt,
u8 *  IntValid,
u16 *  MsiMsgData 
)

Read Root Port Interrupt FIFO message Register 1 & 2.

Parameters:
InstancePtr is the PCIe component to operate on.
ReqIdPtr is a variable where the driver will pass back the requester Id of error message.
MsiAddr is a variable where the driver will pass back the MSI address for which interrupt message recieved.
MsiInt is a variable where the driver will pass back the type of interrupt message recieved (MSI/INTx).
IntValid is a variable where the driver will pass back the status of read operation of interrupt message.
MsiMsgData is a variable where the driver will pass back the MSI data recieved.
Returns:
MsiMsgData if MSI interrupt is observed or 0 if there is no MSI interrupt.
Note:
This function is valid only when IP is configured as a root complex.
void XAxiPcie_GetRootPortStatusCtrl ( XAxiPcie *  InstancePtr,
u32 *  StatusPtr 
)

Read Root Port Status/Control Register.

Parameters:
InstancePtr is the PCIe component to operate on.
StatusPtr is a pointer to a variable where the driver will pass back the root port status.
Returns:
None.
Note:
This function is valid only when IP is configured as a root complex.
void XAxiPcie_GetVsecCapability ( XAxiPcie *  InstancePtr,
u8  VsecNum,
u16 *  VsecIdPtr,
u8 *  VersionPtr,
u16 *  NextCapPtr 
)

This API is used to read the VSEC Capability Register.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
VsecNum is a VSEC register number as there are two registers. Possible values are.

  • XAXIPCIE_VSEC1 (0)
  • XAXIPCIE_VSEC2 (1)
VsecIdPtr is a pointer to a variable where the driver will pass back the Vendor Specific Enhanced Capability ID.
VersionPtr is a pointer to a variable where the driver will . pass back the Version of VSEC.
NextCapPtr is a pointer to a variable where the driver will pass back the Next Capability offset.
Returns:
None.
Note:
None
void XAxiPcie_GetVsecHeader ( XAxiPcie *  InstancePtr,
u8  VsecNum,
u16 *  VsecIdPtr,
u8 *  RevisionPtr,
u16 *  LengthPtr 
)

This API is used to read the VSEC Header Register.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
VsecNum is a VSEC register number as there are two registers. Possible values are.

  • XAXIPCIE_VSEC1 (0)
  • XAXIPCIE_VSEC2 (1)
VsecIdPtr is a pointer to a variable where the driver will pass back the VSEC header structure Id.
RevisionPtr is a pointer to a variable where the driver will pass back the Revision of VSEC capability Structure.
LengthPtr is a pointer to a variable where the driver will pass . back the length of the VSEC capability structure.
Returns:
None.
Note:
None
XAxiPcie_Config* XAxiPcie_LookupConfig ( u16  DeviceId  ) 

Lookup the device configuration based on the unique device ID. The table ConfigTable contains the configuration info for each device in the system.

Parameters:
DeviceId is the device identifier to lookup.
Returns:
  • XAxiPcie configuration structure pointer if DeviceID is found.
  • NULL if DeviceID is not found.
Note:
None
void XAxiPcie_ReadLocalConfigSpace ( XAxiPcie *  InstancePtr,
u16  Offset,
u32 *  DataPtr 
)

Read 32-bit value from one of this IP own configuration space. Location is identified by its offset from the beginning of the configuration space.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
Offset from beginning of IP own configuration space.
DataPtr is a pointer to a variable where the driver will pass back the value read from the specified location.
Returns:
None
Note:
None
void XAxiPcie_ReadRemoteConfigSpace ( XAxiPcie *  InstancePtr,
u8  Bus,
u8  Device,
u8  Function,
u16  Offset,
u32 *  DataPtr 
)

Read 32-bit value from external PCIe Function's configuration space. External PCIe function is identified by its Requester ID (Bus#, Device#, Function#). Location is identified by its offset from the begginning of the configuration space.

Parameters:
InstancePtr is the PCIe component to operate on.
Bus is the external PCIe function's Bus number.
Device is the external PCIe function's Device number.
Function is the external PCIe function's Function number.
Offset from beggininng of PCIe function's configuration space.
DataPtr is a pointer to a variable where the driver will pass back the value read from the specified location.
Returns:
None
Note:
This function is valid only when IP is configured as a root complex. The XAxiPcie_ReadLocalConfigSpace API should be used for reading the local config space.
void XAxiPcie_SetLocalBusBar2PcieBar ( XAxiPcie *  InstancePtr,
u8  BarNumber,
XAxiPcie_BarAddr *  BarAddrPtr 
)

Write PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller.

Parameters:
InstancePtr is the XAxiPcie instance to operate on.
BarNumber is AXI bar number (0 - 5) passed by caller.
BarAddrPtr is a pointer to a variable where the driver will pass back translation vector.
Returns:
None.
Note:
None.
int XAxiPcie_SetRootPortMSIBase ( XAxiPcie *  InstancePtr,
unsigned long long  MsiBase 
)

Write MSI Base Address to Root Port MSI Base Address Register.

Parameters:
InstancePtr is the PCIe component to operate on.
MsiBase is 64 bit base address for MSI.This address should be 4kB aligned always.
Returns:
XST_SUCCESS if success or XST_FAILURE if failure .
Note:
This function is valid only when IP is configured as a root complex.
void XAxiPcie_SetRootPortStatusCtrl ( XAxiPcie *  InstancePtr,
u32  StatusData 
)

Write Value in Root Port Status/Control Register.

Parameters:
InstancePtr is the PCIe component to operate on.
StatusData is data to set.
Returns:
None.
Note:
This function is valid only when IP is configured as a root complex.
void XAxiPcie_WriteLocalConfigSpace ( XAxiPcie *  InstancePtr,
u16  Offset,
u32  Data 
)

Write 32-bit value to one of this IP own configuration space. Location is identified by its offset from the begginning of the configuration space.

Parameters:
InstancePtr is the PCIe component to operate on.
Offset from beggininng of IP own configuration space.
Data to be written to the specified location.
Returns:
None
Note:
This function is valid only when IP is configured as a root complex.
void XAxiPcie_WriteRemoteConfigSpace ( XAxiPcie *  InstancePtr,
u8  Bus,
u8  Device,
u8  Function,
u16  Offset,
u32  Data 
)

Write 32-bit value to external PCIe function's configuration space. External PCIe function is identified by its Requester ID (Bus#, Device#, Function#). Location is identified by its offset from the begginning of the configuration space.

Parameters:
InstancePtr is the PCIe component to operate on.
Bus is the external PCIe function's Bus number.
Device is the external PCIe function's Device number.
Function is the external PCIe function's Function number.
Offset from beggininng of PCIe function's configuration space.
Data to be written to the specified location.
Returns:
None
Note:
This function is valid only when IP is configured as a root complex. The XAxiPcie_WriteLocalConfigSpace should be used for writing to local config space.

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