<html> <head> <meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> <title> Xilinx Driver ttcps v2_0: ttcps v2_0 </title> <link href="doxygen_kalyanidocs/doc/css/driver_api_doxygen.css" rel="stylesheet" type="text/css"> </head> <h3 class="PageHeader">Xilinx Processor IP Library</h3> <hl>Software Drivers</hl> <hr class="whs1"> <!-- Generated by Doxygen 1.6.1 --> <div class="navigation" id="top"> <div class="tabs"> <ul> <li class="current"><a href="index.html"><span>Main Page</span></a></li> <li><a href="annotated.html"><span>Classes</span></a></li> <li><a href="files.html"><span>Files</span></a></li> </ul> </div> </div> <div class="contents"> <h1>ttcps v2_0</h1><p>This is the driver for one 16-bit timer counter in the Triple Timer Counter (TTC) module in the Ps block.</p> <p>The TTC module provides three independent timer/counter modules that can each be clocked using either the system clock (pclk) or an externally driven clock (ext_clk). In addition, each counter can independently prescale its selected clock input (divided by 2 to 65536). Counters can be set to decrement or increment.</p> <p>Each of the counters can be programmed to generate interrupt pulses: . At a regular, predefined period, that is on a timed interval . When the counter registers overflow . When the count matches any one of the three 'match' registers</p> <p>Therefore, up to six different events can trigger a timer interrupt: three match interrupts, an overflow interrupt, an interval interrupt and an event timer interrupt. Note that the overflow interrupt and the interval interrupt are mutually exclusive.</p> <p><b>Initialization & Configuration</b></p> <p>An <a class="el" href="struct_x_ttc_ps___config.html">XTtcPs_Config</a> structure is used to configure a driver instance. Information in the <a class="el" href="struct_x_ttc_ps___config.html">XTtcPs_Config</a> structure is the hardware properties about the device.</p> <p>A driver instance is initialized through XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr is a pointer to the <a class="el" href="struct_x_ttc_ps___config.html">XTtcPs_Config</a> structure, it can be looked up statically through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The EffectiveAddr can be the static base address of the device or virtual mapped address if address translation is supported.</p> <p><b>Interrupts</b></p> <p>Interrupt handler is not provided by the driver, as handling of interrupt is application specific.</p> <dl class="note"><dt><b>Note:</b></dt><dd>The default setting for a timer/counter is:<ul> <li>Overflow Mode</li> <li>Internal clock (pclk) selected</li> <li>Counter disabled</li> <li>All Interrupts disabled</li> <li>Output waveforms disabled</li> </ul> </dd></dl> <pre> MODIFICATION HISTORY:</pre><pre> Ver Who Date Changes ----- ------ -------- ----------------------------------------------------- 1.00a drg/jz 01/20/10 First release.. 2.0 adk 12/10/13 Updated as per the New Tcl API's</pre><pre> </pre> </div> <p class="Copyright"> Copyright © 1995-2014 Xilinx, Inc. All rights reserved. </p> </body> </html>