Xilinx Processor IP Library

deinterlacer v3_1

This is the main header file of Xilinx Video Deinterlacer device driver

Interrupt Service

The Deinterlacer can generate 11 interrupt sources

• Internal Register update done
• Deinterlacer is locked to incoming video
• Deinterlacer has lost lock to incoming video
• Deinterlacer internal fifo error
• Pulldown activated
• Pulldown cancelled
• Frame Tick
• Framestore Write setup error
• Framestore Write fifo overflow
• Framestore Read Field underrun
• Framestore Read Frame underrun

This driver provides functions to install callbacks for the interrupts and enable/disable/clear any of them.

Examples

Example(s) are provided with this driver to demonstrate the driver usage.

Limitations

BUS Interface

 MODIFICATION HISTORY:

 Ver   Who  Date     Changes
 ----- ---- -------- -------------------------------------------------------
 1.00a rjh 07/10/11 First release
 2.00a rjh 18/01/12 Updated for v_deinterlacer 2.00
 3.0   adk  19/12/13 Updated as per the New Tcl API's
 3.1   adk  09/05/14 Fixed the CR:798337 driver doesn't support the IP in the
 		             build.Changes are made in the driver mdd file.