xemacps.h File Reference

#define XEMACPS_16BYTE_BURST 16

#define XEMACPS_4BYTE_BURST 4

#define XEMACPS_8BYTE_BURST 8

#define XEMACPS_BROADCAST_OPTION 0x00000400

Allow reception of the broadcast address This option defaults to enabled (set)

#define XEMACPS_DEFAULT_OPTIONS

Value:

(XEMACPS_FLOW_CONTROL_OPTION |                  \
     XEMACPS_FCS_INSERT_OPTION |                    \
     XEMACPS_FCS_STRIP_OPTION |                     \
     XEMACPS_BROADCAST_OPTION |                     \
     XEMACPS_LENTYPE_ERR_OPTION |                   \
     XEMACPS_TRANSMITTER_ENABLE_OPTION |            \
     XEMACPS_RECEIVER_ENABLE_OPTION |               \
     XEMACPS_RX_CHKSUM_ENABLE_OPTION |              \
     XEMACPS_TX_CHKSUM_ENABLE_OPTION)

Default options set when device is initialized or reset

#define XEMACPS_DEVICE_DESC "Xilinx PS 10/100/1000 MAC"

#define XEMACPS_DEVICE_NAME "xemacps"

#define XEMACPS_FCS_INSERT_OPTION 0x00000040

Generate FCS field and add PAD automatically for outgoing frames. This option defaults to disabled (cleared)

#define XEMACPS_FCS_STRIP_OPTION 0x00000020

Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not stripped. This option defaults to enabled (set)

#define XEMACPS_FLOW_CONTROL_OPTION 0x00000010

Enable recognition of flow control frames on Rx This option defaults to enabled (set)

#define XEMACPS_FRAME1536_OPTION 0x00000002

Frame larger than 1516 support for Tx & Rx. This option defaults to disabled (cleared)

#define XEmacPs_GetRxRing ( InstancePtr ) ((InstancePtr)->RxBdRing)

Retrieve the Rx ring object. This object can be used in the various Ring API functions.

Parameters:

InstancePtr

is the DMA channel to operate on.

Returns:: RxBdRing attribute

Note:: C-style signature: XEmacPs_BdRing XEmacPs_GetRxRing(XEmacPs *InstancePtr)

#define XEmacPs_GetTxRing ( InstancePtr ) ((InstancePtr)->TxBdRing)

Retrieve the Tx ring object. This object can be used in the various Ring API functions.

Parameters:

InstancePtr

is the DMA channel to operate on.

Returns:: TxBdRing attribute

Note:: C-style signature: XEmacPs_BdRing XEmacPs_GetTxRing(XEmacPs *InstancePtr)

#define XEMACPS_H

#define XEMACPS_HANDLER_DMARECV 2

#define XEMACPS_HANDLER_DMASEND 1

#define XEMACPS_HANDLER_ERROR 3

#define XEMACPS_HDR_SIZE 14

#define XEMACPS_HDR_VLAN_SIZE 18

#define XEmacPs_IntDisable	(	InstancePtr,
		Mask		)

Value:

XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
                XEMACPS_IDR_OFFSET,                                     \
                (Mask & XEMACPS_IXR_ALL_MASK));

Disable interrupts specified in Mask. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	Mask	contains a bit mask of interrupts to disable. The mask can be formed using a set of bitwise or'd values.

Note:: The state of the transmitter and receiver are not modified by this function. C-style signature void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)

#define XEmacPs_IntEnable	(	InstancePtr,
		Mask		)

Value:

XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
                XEMACPS_IER_OFFSET,                                     \
                (Mask & XEMACPS_IXR_ALL_MASK));

Enable interrupts specified in Mask. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	Mask	contains a bit mask of interrupts to enable. The mask can be formed using a set of bitwise or'd values.

Note:: The state of the transmitter and receiver are not modified by this function. C-style signature void XEmacPs_IntEnable(XEmacPs *InstancePtr, u32 Mask)

#define XEmacPs_IsRxCsum ( InstancePtr )

Value:

((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,             \
          XEMACPS_NWCFG_OFFSET) & XEMACPS_NWCFG_RXCHKSUMEN_MASK)         \
          ? TRUE : FALSE)

This macro determines if the device is configured with checksum offloading on the receive channel

Parameters:

InstancePtr

is a pointer to the XEmacPs instance to be worked on.

Returns:

Boolean TRUE if the device is configured with checksum offloading, or FALSE otherwise.

Note:

Signature: u32 XEmacPs_IsRxCsum(XEmacPs *InstancePtr)

#define XEmacPs_IsTxCsum ( InstancePtr )

Value:

((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,              \
          XEMACPS_DMACR_OFFSET) & XEMACPS_DMACR_TCPCKSUM_MASK)           \
          ? TRUE : FALSE)

This macro determines if the device is configured with checksum offloading on the transmit channel

Parameters:

InstancePtr

is a pointer to the XEmacPs instance to be worked on.

Returns:

Boolean TRUE if the device is configured with checksum offloading, or FALSE otherwise.

Note:

Signature: u32 XEmacPs_IsTxCsum(XEmacPs *InstancePtr)

#define XEMACPS_LENTYPE_ERR_OPTION 0x00000080

Enable Length/Type error checking for incoming frames. When this option is set, the MAC will filter frames that have a mismatched type/length field and if XEMACPS_REPORT_RXERR_OPTION is set, the user is notified when these types of frames are encountered. When this option is cleared, the MAC will allow these types of frames to be received.

This option defaults to disabled (cleared)

#define XEMACPS_MAC_ADDR_SIZE 6

#define XEMACPS_MAX_FRAME_SIZE

Value:

(XEMACPS_MTU + XEMACPS_HDR_SIZE + \
        XEMACPS_TRL_SIZE)

#define XEMACPS_MAX_VLAN_FRAME_SIZE

Value:

(XEMACPS_MTU + XEMACPS_HDR_SIZE + \
        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)

#define XEMACPS_MDIO_DIV_DFT MDC_DIV_32

Default MDIO clock divisor

#define XEMACPS_MTU 1500

#define XEMACPS_MULTICAST_OPTION 0x00000800

Allows reception of multicast addresses programmed into hash This option defaults to disabled (clear)

#define XEMACPS_PROMISC_OPTION 0x00000001

Accept all incoming packets. This option defaults to disabled (cleared)

#define XEMACPS_RECEIVER_ENABLE_OPTION 0x00000200

Enable the receiver This option defaults to enabled (set)

#define XEMACPS_RX_CHKSUM_ENABLE_OPTION 0x00001000

Enable the RX checksum offload This option defaults to enabled (set)

#define XEMACPS_SINGLE_BURST 1

#define XEmacPs_Transmit ( InstancePtr )

Value:

XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,          \
        XEMACPS_NWCTRL_OFFSET,                                     \
        (XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,          \
        XEMACPS_NWCTRL_OFFSET) | XEMACPS_NWCTRL_STARTTX_MASK))

This macro triggers trasmit circuit to send data currently in TX buffer(s).

Parameters:

InstancePtr

is a pointer to the XEmacPs instance to be worked on.

Returns:

Note:

Signature: void XEmacPs_Transmit(XEmacPs *InstancePtr)

#define XEMACPS_TRANSMITTER_ENABLE_OPTION 0x00000100

Enable the transmitter. This option defaults to enabled (set)

#define XEMACPS_TRL_SIZE 4

#define XEMACPS_TX_CHKSUM_ENABLE_OPTION 0x00002000

Enable the TX checksum offload This option defaults to enabled (set)

#define XEMACPS_VLAN_OPTION 0x00000004

VLAN Rx & Tx frame support. This option defaults to disabled (cleared)

typedef void(*) XEmacPs_ErrHandler(void *CallBackRef, u8 Direction, u32 ErrorWord)

Callback when an asynchronous error occurs. To set this callback, invoke XEmacPs_SetHandler() with XEMACPS_HANDLER_ERROR in the HandlerType paramter.

Parameters:

	CallBackRef	is user data assigned when the callback was set.
	Direction	defines either receive or transmit error(s) has occurred.
	ErrorWord	definition varies with Direction

typedef void(*) XEmacPs_Handler(void *CallBackRef)

Callback invoked when frame(s) have been sent or received in interrupt driven DMA mode. To set the send callback, invoke XEmacPs_SetHandler().

Parameters:

CallBackRef

is user data assigned when the callback was set.

Note:: See xemacps_hw.h for bitmasks definitions and the device hardware spec for further information on their meaning.

int XEmacPs_CfgInitialize	(	XEmacPs *	InstancePtr,
		XEmacPs_Config *	CfgPtr,
		u32	EffectiveAddress
	)

Initialize a specific XEmacPs instance/driver. The initialization entails:

Initialize fields of the XEmacPs instance structure
Reset hardware and apply default options
Configure the DMA channels

The PHY is setup independently from the device. Use the MII or whatever other interface may be present for setup.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	CfgPtr	is the device configuration structure containing required hardware build data.
	EffectiveAddress	is the base address of the device. If address translation is not utilized, this parameter can be passed in using CfgPtr->Config.BaseAddress to specify the physical base address.

Returns:

XST_SUCCESS if initialization was successful

void XEmacPs_ClearHash ( XEmacPs * InstancePtr )

Clear the Hash registers for the mac address pointed by AddressPtr.

Parameters:

InstancePtr

is a pointer to the instance to be worked on.

int XEmacPs_ClearOptions	(	XEmacPs *	InstancePtr,
		u32	Options
	)

Clear options for the driver/device

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	Options	are the options to clear. Multiple options can be cleared by OR'ing XEMACPS_*_OPTIONS constants together. Options not specified are not affected.

Returns:

XST_SUCCESS if the options were set successfully
XST_DEVICE_IS_STARTED if the device has not yet been stopped

Note:: See xemacps.h for a description of the available options.

void XEmacPs_DMABLengthUpdate	(	XEmacPs *	InstancePtr,
		int	BLength
	)

API to update the Burst length in the DMACR register.

Parameters:

	InstancePtr	is a pointer to the XEmacPs instance to be worked on.
	BLength	is the length in bytes for the dma burst.

Returns:: None

void XEmacPs_GetHash	(	XEmacPs *	InstancePtr,
		void *	AddressPtr
	)

Get the Hash address for this driver/device.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	AddressPtr	is an output parameter, and is a pointer to a buffer into which the current HASH MAC address will be copied.

void XEmacPs_GetMacAddress	(	XEmacPs *	InstancePtr,
		void *	AddressPtr,
		u8	Index
	)

Get the MAC address for this driver/device.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	AddressPtr	is an output parameter, and is a pointer to a buffer into which the current MAC address will be copied.
	Index	is a index to which MAC (1-4) address.

u16 XEmacPs_GetOperatingSpeed ( XEmacPs * InstancePtr )

XEmacPs_GetOperatingSpeed gets the current operating link speed. This may be the value set by XEmacPs_SetOperatingSpeed() or a hardware default.

Parameters:

InstancePtr

references the TEMAC channel on which to operate.

Returns:: XEmacPs_GetOperatingSpeed returns the link speed in units of megabits per second.

Note:

u32 XEmacPs_GetOptions ( XEmacPs * InstancePtr )

Get current option settings

Parameters:

InstancePtr

is a pointer to the instance to be worked on.

Returns:: A bitmask of XTE_*_OPTION constants. Any bit set to 1 is to be interpreted as a set opion.

Note:: See xemacps.h for a description of the available options.

void XEmacPs_IntrHandler ( void * XEmacPsPtr )

Master interrupt handler for EMAC driver. This routine will query the status of the device, bump statistics, and invoke user callbacks.

This routine must be connected to an interrupt controller using OS/BSP specific methods.

Parameters:

XEmacPsPtr

is a pointer to the XEMACPS instance that has caused the interrupt.

XEmacPs_Config* XEmacPs_LookupConfig ( u16 DeviceId )

Lookup the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

Parameters:

DeviceId

is the unique device ID of the device being looked up.

Returns:: A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

int XEmacPs_PhyRead	(	XEmacPs *	InstancePtr,
		u32	PhyAddress,
		u32	RegisterNum,
		u16 *	PhyDataPtr
	)

Read the current value of the PHY register indicated by the PhyAddress and the RegisterNum parameters. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

Parameters:

	InstancePtr	is a pointer to the XEmacPs instance to be worked on.
	PhyAddress	is the address of the PHY to be read (supports multiple PHYs)
	RegisterNum	is the register number, 0-31, of the specific PHY register to read
	PhyDataPtr	is an output parameter, and points to a 16-bit buffer into which the current value of the register will be copied.

Returns:

XST_SUCCESS if the PHY was read from successfully
XST_EMAC_MII_BUSY if there is another PHY operation in progress

Note:

This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the read is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

int XEmacPs_PhyWrite	(	XEmacPs *	InstancePtr,
		u32	PhyAddress,
		u32	RegisterNum,
		u16	PhyData
	)

Write data to the specified PHY register. The Ethernet driver does not require the device to be stopped before writing to the PHY. Although it is probably a good idea to stop the device, it is the responsibility of the application to deem this necessary. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

Parameters:

	InstancePtr	is a pointer to the XEmacPs instance to be worked on.
	PhyAddress	is the address of the PHY to be written (supports multiple PHYs)
	RegisterNum	is the register number, 0-31, of the specific PHY register to write
	PhyData	is the 16-bit value that will be written to the register

Returns:

XST_SUCCESS if the PHY was written to successfully. Since there is no error status from the MAC on a write, the user should read the PHY to verify the write was successful.
XST_EMAC_MII_BUSY if there is another PHY operation in progress

Note:

This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the write is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

void XEmacPs_Reset ( XEmacPs * InstancePtr )

Perform a graceful reset of the Ethernet MAC. Resets the DMA channels, the transmitter, and the receiver.

Steps to reset

Stops transmit and receive channels
Stops DMA
Configure transmit and receive buffer size to default
Clear transmit and receive status register and counters
Clear all interrupt sources
Clear phy (if there is any previously detected) address
Clear MAC addresses (1-4) as well as Type IDs and hash value

All options are placed in their default state. Any frames in the descriptor lists will remain in the lists. The side effect of doing this is that after a reset and following a restart of the device, frames were in the list before the reset may be transmitted or received.

The upper layer software is responsible for re-configuring (if necessary) and restarting the MAC after the reset. Note also that driver statistics are not cleared on reset. It is up to the upper layer software to clear the statistics if needed.

When a reset is required, the driver notifies the upper layer software of this need through the ErrorHandler callback and specific status codes. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

Parameters:

InstancePtr

is a pointer to the instance to be worked on.

int XEmacPs_SendPausePacket ( XEmacPs * InstancePtr )

Send a pause packet

Parameters:

InstancePtr

is a pointer to the instance to be worked on.

Returns:

XST_SUCCESS if pause frame transmission was initiated
XST_DEVICE_IS_STOPPED if the device has not been started.

int XEmacPs_SetHandler	(	XEmacPs *	InstancePtr,
		u32	HandlerType,
		void *	FuncPtr,
		void *	CallBackRef
	)

Install an asynchronious handler function for the given HandlerType:

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	HandlerType	indicates what interrupt handler type is. XEMACPS_HANDLER_DMASEND, XEMACPS_HANDLER_DMARECV and XEMACPS_HANDLER_ERROR.
	FuncPtr	is the pointer to the callback function
	CallBackRef	is the upper layer callback reference passed back when when the callback function is invoked.

Returns:

None.

Note:: There is no assert on the CallBackRef since the driver doesn't know what it is.

int XEmacPs_SetHash	(	XEmacPs *	InstancePtr,
		void *	AddressPtr
	)

Set 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

The hash address register is 64 bits long and takes up two locations in the memory map. The least significant bits are stored in hash register bottom and the most significant bits in hash register top.

The unicast hash enable and the multicast hash enable bits in the network configuration register enable the reception of hash matched frames. The destination address is reduced to a 6 bit index into the 64 bit hash register using the following hash function. The hash function is an XOR of every sixth bit of the destination address.

 hash_index[05] = da[05]^da[11]^da[17]^da[23]^da[29]^da[35]^da[41]^da[47]
 hash_index[04] = da[04]^da[10]^da[16]^da[22]^da[28]^da[34]^da[40]^da[46]
 hash_index[03] = da[03]^da[09]^da[15]^da[21]^da[27]^da[33]^da[39]^da[45]
 hash_index[02] = da[02]^da[08]^da[14]^da[20]^da[26]^da[32]^da[38]^da[44]
 hash_index[01] = da[01]^da[07]^da[13]^da[19]^da[25]^da[31]^da[37]^da[43]
 hash_index[00] = da[00]^da[06]^da[12]^da[18]^da[24]^da[30]^da[36]^da[42]

da[0] represents the least significant bit of the first byte received, that is, the multicast/unicast indicator, and da[47] represents the most significant bit of the last byte received.

If the hash index points to a bit that is set in the hash register then the frame will be matched according to whether the frame is multicast or unicast.

A multicast match will be signaled if the multicast hash enable bit is set, da[0] is logic 1 and the hash index points to a bit set in the hash register.

A unicast match will be signaled if the unicast hash enable bit is set, da[0] is logic 0 and the hash index points to a bit set in the hash register.

To receive all multicast frames, the hash register should be set with all ones and the multicast hash enable bit should be set in the network configuration register.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	AddressPtr	is a pointer to a 6-byte MAC address.

Returns:

XST_SUCCESS if the HASH MAC address was set successfully
XST_DEVICE_IS_STARTED if the device has not yet been stopped
XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation

Note:: Having Aptr be unsigned type prevents the following operations from sign extending.

int XEmacPs_SetMacAddress	(	XEmacPs *	InstancePtr,
		void *	AddressPtr,
		u8	Index
	)

Set the MAC address for this driver/device. The address is a 48-bit value. The device must be stopped before calling this function.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	AddressPtr	is a pointer to a 6-byte MAC address.
	Index	is a index to which MAC (1-4) address.

Returns:

XST_SUCCESS if the MAC address was set successfully
XST_DEVICE_IS_STARTED if the device has not yet been stopped

void XEmacPs_SetMdioDivisor	(	XEmacPs *	InstancePtr,
		XEmacPs_MdcDiv	Divisor
	)

Set the MDIO clock divisor.

Calculating the divisor:

              f[HOSTCLK]
   f[MDC] = -----------------
            (1 + Divisor) * 2

where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster access. Here is the table to show values to generate MDC,

 000 : divide pclk by   8 (pclk up to  20 MHz)
 001 : divide pclk by  16 (pclk up to  40 MHz)
 010 : divide pclk by  32 (pclk up to  80 MHz)
 011 : divide pclk by  48 (pclk up to 120 MHz)
 100 : divide pclk by  64 (pclk up to 160 MHz)
 101 : divide pclk by  96 (pclk up to 240 MHz)
 110 : divide pclk by 128 (pclk up to 320 MHz)
 111 : divide pclk by 224 (pclk up to 540 MHz)

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	Divisor	is the divisor to set. Range is 0b000 to 0b111.

void XEmacPs_SetOperatingSpeed	(	XEmacPs *	InstancePtr,
		u16	Speed
	)

XEmacPs_SetOperatingSpeed sets the current operating link speed. For any traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII link speed.

Parameters:

	InstancePtr	references the TEMAC channel on which to operate.
	Speed	is the speed to set in units of Mbps. Valid values are 10, 100, or 1000. XEmacPs_SetOperatingSpeed ignores invalid values.

Note:

int XEmacPs_SetOptions	(	XEmacPs *	InstancePtr,
		u32	Options
	)

Set options for the driver/device. The driver should be stopped with XEmacPs_Stop() before changing options.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	Options	are the options to set. Multiple options can be set by OR'ing XTE_*_OPTIONS constants together. Options not specified are not affected.

Returns:

XST_SUCCESS if the options were set successfully
XST_DEVICE_IS_STARTED if the device has not yet been stopped

Note:: See xemacps.h for a description of the available options.

int XEmacPs_SetTypeIdCheck	(	XEmacPs *	InstancePtr,
		u32	Id_Check,
		u8	Index
	)

Set the Type ID match for this driver/device. The register is a 32-bit value. The device must be stopped before calling this function.

Parameters:

	InstancePtr	is a pointer to the instance to be worked on.
	Id_Check	is type ID to be configured.
	Index	is a index to which Type ID (1-4).

Returns:

XST_SUCCESS if the MAC address was set successfully
XST_DEVICE_IS_STARTED if the device has not yet been stopped

void XEmacPs_Start ( XEmacPs * InstancePtr )

Start the Ethernet controller as follows:

Enable transmitter if XTE_TRANSMIT_ENABLE_OPTION is set
Enable receiver if XTE_RECEIVER_ENABLE_OPTION is set
Start the SG DMA send and receive channels and enable the device interrupt

Parameters:

InstancePtr

is a pointer to the instance to be worked on.

Returns:: N/A

Note:: Hardware is configured with scatter-gather DMA, the driver expects to start the scatter-gather channels and expects that the user has previously set up the buffer descriptor lists.

This function makes use of internal resources that are shared between the Start, Stop, and Set/ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).

This function must not be preempted by an interrupt that may service the device.

void XEmacPs_Stop ( XEmacPs * InstancePtr )

Gracefully stop the Ethernet MAC as follows:

Disable all interrupts from this device
Stop DMA channels
Disable the tansmitter and receiver

Device options currently in effect are not changed.

This function will disable all interrupts. Default interrupts settings that had been enabled will be restored when XEmacPs_Start() is called.

Parameters:

InstancePtr

is a pointer to the instance to be worked on.

Note:: This function makes use of internal resources that are shared between the Start, Stop, SetOptions, and ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).

Stopping the DMA channels causes this function to block until the DMA operation is complete.

Xilinx Processor IP Library

xemacps.h File Reference

Classes

Configuration options

Callback identifiers

Typedefs for callback functions

Defines

Functions

Define Documentation

Typedef Documentation

Function Documentation


Classes
struct	XEmacPs_Config
struct	XEmacPs
Configuration options
Device configuration options. See the XEmacPs_SetOptions(), XEmacPs_ClearOptions() and XEmacPs_GetOptions() for information on how to use options. The default state of the options are noted and are what the device and driver will be set to after calling XEmacPs_Reset() or XEmacPs_Initialize().
#define	XEMACPS_PROMISC_OPTION 0x00000001
#define	XEMACPS_FRAME1536_OPTION 0x00000002
#define	XEMACPS_VLAN_OPTION 0x00000004
#define	XEMACPS_FLOW_CONTROL_OPTION 0x00000010
#define	XEMACPS_FCS_STRIP_OPTION 0x00000020
#define	XEMACPS_FCS_INSERT_OPTION 0x00000040
#define	XEMACPS_LENTYPE_ERR_OPTION 0x00000080
#define	XEMACPS_TRANSMITTER_ENABLE_OPTION 0x00000100
#define	XEMACPS_RECEIVER_ENABLE_OPTION 0x00000200
#define	XEMACPS_BROADCAST_OPTION 0x00000400
#define	XEMACPS_MULTICAST_OPTION 0x00000800
#define	XEMACPS_RX_CHKSUM_ENABLE_OPTION 0x00001000
#define	XEMACPS_TX_CHKSUM_ENABLE_OPTION 0x00002000
#define	XEMACPS_DEFAULT_OPTIONS
Callback identifiers
These constants are used as parameters to XEmacPs_SetHandler()
#define	XEMACPS_HANDLER_DMASEND 1
#define	XEMACPS_HANDLER_DMARECV 2
#define	XEMACPS_HANDLER_ERROR 3
Typedefs for callback functions
These callbacks are invoked in interrupt context.
typedef void(*)	XEmacPs_Handler (void *CallBackRef)
typedef void(*)	XEmacPs_ErrHandler (void *CallBackRef, u8 Direction, u32 ErrorWord)
Defines
#define	XEMACPS_H
#define	XEMACPS_DEVICE_NAME "xemacps"
#define	XEMACPS_DEVICE_DESC "Xilinx PS 10/100/1000 MAC"
#define	XEMACPS_MDIO_DIV_DFT MDC_DIV_32
#define	XEMACPS_MAC_ADDR_SIZE 6
#define	XEMACPS_MTU 1500
#define	XEMACPS_HDR_SIZE 14
#define	XEMACPS_HDR_VLAN_SIZE 18
#define	XEMACPS_TRL_SIZE 4
#define	XEMACPS_MAX_FRAME_SIZE
#define	XEMACPS_MAX_VLAN_FRAME_SIZE
#define	XEMACPS_SINGLE_BURST 1
#define	XEMACPS_4BYTE_BURST 4
#define	XEMACPS_8BYTE_BURST 8
#define	XEMACPS_16BYTE_BURST 16
#define	XEmacPs_GetTxRing(InstancePtr) ((InstancePtr)->TxBdRing)
#define	XEmacPs_GetRxRing(InstancePtr) ((InstancePtr)->RxBdRing)
#define	XEmacPs_IntEnable(InstancePtr, Mask)
#define	XEmacPs_IntDisable(InstancePtr, Mask)
#define	XEmacPs_Transmit(InstancePtr)
#define	XEmacPs_IsRxCsum(InstancePtr)
#define	XEmacPs_IsTxCsum(InstancePtr)
Functions
int	XEmacPs_CfgInitialize (XEmacPs InstancePtr, XEmacPs_Config CfgPtr, u32 EffectiveAddress)
void	XEmacPs_Start (XEmacPs *InstancePtr)
void	XEmacPs_Stop (XEmacPs *InstancePtr)
void	XEmacPs_Reset (XEmacPs *InstancePtr)
XEmacPs_Config *	XEmacPs_LookupConfig (u16 DeviceId)
int	XEmacPs_SetHandler (XEmacPs InstancePtr, u32 HandlerType, void FuncPtr, void *CallBackRef)
void	XEmacPs_IntrHandler (void *InstancePtr)
int	XEmacPs_SetOptions (XEmacPs *InstancePtr, u32 Options)
int	XEmacPs_ClearOptions (XEmacPs *InstancePtr, u32 Options)
u32	XEmacPs_GetOptions (XEmacPs *InstancePtr)
int	XEmacPs_SetMacAddress (XEmacPs InstancePtr, void AddressPtr, u8 Index)
void	XEmacPs_GetMacAddress (XEmacPs InstancePtr, void AddressPtr, u8 Index)
int	XEmacPs_SetHash (XEmacPs InstancePtr, void AddressPtr)
void	XEmacPs_ClearHash (XEmacPs *InstancePtr)
void	XEmacPs_GetHash (XEmacPs InstancePtr, void AddressPtr)
void	XEmacPs_SetMdioDivisor (XEmacPs *InstancePtr, XEmacPs_MdcDiv Divisor)
void	XEmacPs_SetOperatingSpeed (XEmacPs *InstancePtr, u16 Speed)
u16	XEmacPs_GetOperatingSpeed (XEmacPs *InstancePtr)
int	XEmacPs_PhyRead (XEmacPs InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 PhyDataPtr)
int	XEmacPs_PhyWrite (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 PhyData)
int	XEmacPs_SetTypeIdCheck (XEmacPs *InstancePtr, u32 Id_Check, u8 Index)
int	XEmacPs_SendPausePacket (XEmacPs *InstancePtr)
void	XEmacPs_DMABLengthUpdate (XEmacPs *InstancePtr, int BLength)