xllfifo.h File Reference

#include "xstreamer.h"
#include "xllfifo_hw.h"

Classes
struct	XLlFifo
struct	XLlFifo_Config
Defines
#define	XLLFIFO_H
#define	XLlFifo_Reset(InstancePtr)
#define	XLlFifo_Status(InstancePtr) XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET)
#define	XLlFifo_IntEnable(InstancePtr, Mask)
#define	XLlFifo_IntDisable(InstancePtr, Mask)
#define	XLlFifo_IntPending(InstancePtr)
#define	XLlFifo_IntClear(InstancePtr, Mask)
#define	XLlFifo_RxReset(InstancePtr)
#define	XLlFifo_IsRxEmpty(InstancePtr)
#define	XLlFifo_RxOccupancy(InstancePtr) XStrm_RxOccupancy(&((InstancePtr)->RxStreamer))
#define	XLlFifo_RxGetLen(InstancePtr) XStrm_RxGetLen(&((InstancePtr)->RxStreamer))
#define	XLlFifo_Read(InstancePtr, BufPtr, Bytes) XStrm_Read(&((InstancePtr)->RxStreamer), (BufPtr), (Bytes))
#define	XLlFifo_TxReset(InstancePtr)
#define	XLlFifo_IsTxDone(InstancePtr)
#define	XLlFifo_IsRxDone(InstancePtr)
#define	XLlFifo_TxVacancy(InstancePtr) XStrm_TxVacancy(&((InstancePtr)->TxStreamer))
#define	XLlFifo_TxSetLen(InstancePtr, Bytes) XStrm_TxSetLen(&((InstancePtr)->TxStreamer), (Bytes))
#define	XLlFifo_Write(InstancePtr, BufPtr, Bytes) XStrm_Write(&((InstancePtr)->TxStreamer), (BufPtr), (Bytes))
#define	XLlFifo_WriteTdr(InstancePtr, Tdest)
#define	XLlFifo_ReadRdr(InstancePtr) XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_RDR_OFFSET)
Functions
int	XLlFifo_CfgInitialize (XLlFifo InstancePtr, XLlFifo_Config Config, u32 EffectiveAddress)
void	XLlFifo_Initialize (XLlFifo *InstancePtr, u32 BaseAddress)
XLlFifo_Config *	XLlFfio_LookupConfig (u32 DeviceId)
u32	XLlFifo_iRxOccupancy (XLlFifo *InstancePtr)
u32	XLlFifo_iRxGetLen (XLlFifo *InstancePtr)
u32	XLlFifo_iTxVacancy (XLlFifo *InstancePtr)
void	XLlFifo_iTxSetLen (XLlFifo *InstancePtr, u32 Bytes)
u32	XLlFifo_RxGetWord (XLlFifo *InstancePtr)
void	XLlFifo_TxPutWord (XLlFifo *InstancePtr, u32 Word)

Detailed Description

Define Documentation

#define XLLFIFO_H

#define XLlFifo_IntClear	(	InstancePtr,
		Mask		)

Value:

XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET, \
                        ((Mask) & XLLF_INT_ALL_MASK))

XLlFifo_IntClear clears pending interrupts specified in Mask for the FIFO specified by InstancePtr. The corresponding pending interrupt for each bit set to 1 in Mask, will be cleared. In other words, XLlFifo_IntClear uses the "set a bit to clear it" scheme.

Parameters:

	InstancePtr	references the FIFO on which to operate.
	Mask	contains a bit mask of the pending interrupts to clear. The mask can be formed using a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Note:: C-style signature: void XLlFifo_IntClear(XLlFifo *InstancePtr, u32 Mask)

#define XLlFifo_IntDisable	(	InstancePtr,
		Mask		)

Value:

{ \
        u32 Reg = XLlFifo_ReadReg((InstancePtr)->BaseAddress, \
                        XLLF_IER_OFFSET); \
        Reg &= ~((Mask) & XLLF_INT_ALL_MASK);  \
        XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_IER_OFFSET, \
                        Reg); \
}

XLlFifo_IntDisable disables the interrupts specified in Mask for the FIFO specified by InstancePtr. The corresponding interrupt for each bit set to 1 in Mask, will be disabled. In other words, XLlFifo_IntDisable uses the "set a bit to clear it" scheme.

Parameters:

	InstancePtr	references the FIFO on which to operate.
	Mask	contains a bit mask of the interrupts to disable. The mask can be formed using a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Returns:: N/A

Note:: C-style signature: void XLlFifo_IntDisable(XLlFifo *InstancePtr, u32 Mask)

#define XLlFifo_IntEnable	(	InstancePtr,
		Mask		)

Value:

{ \
        u32 Reg = XLlFifo_ReadReg((InstancePtr)->BaseAddress, \
                        XLLF_IER_OFFSET); \
        Reg |= ((Mask) & XLLF_INT_ALL_MASK);                    \
        XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_IER_OFFSET, \
                        Reg); \
}

XLlFifo_IntEnable enables the interrupts specified in Mask for the FIFO specified by InstancePtr. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

Parameters:

	InstancePtr	references the FIFO on which to operate.
	Mask	contains a bit mask of the interrupts to enable. The mask can be formed using a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Returns:: N/A

Note:: C-style signature: void XLlFifo_IntEnable(XLlFifo *InstancePtr, u32 Mask)

#define XLlFifo_IntPending ( InstancePtr )

Value:

(XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_IER_OFFSET) &  \
         XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET))

XLlFifo_IntPending returns a bit mask of the pending interrupts for the FIFO specified by InstancePtr. Each bit set to 1 in the return value represents a pending interrupt.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_IntPending returns a bit mask of the interrupts that are pending. The mask will be a set of bitwise or'd values from the XLLF_INT_*_MASK preprocessor symbols.

Note:: C-style signature: u32 XLlFifo_IntPending(XLlFifo *InstancePtr)

#define XLlFifo_IsRxDone ( InstancePtr )

Value:

((XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET) & \
                XLLF_INT_RC_MASK) \
                ? TRUE : FALSE)

XLlFifo_IsRxDone returns true if the reception in the receive channel of the FIFO, specified by InstancePtr, is complete. XLlFifo_IsRxDone works only if the RC bit in the ISR register is cleared before receiving a frame.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_IsRxDone returns TRUE when the receive channel of the FIFO is complete. Otherwise, XLlFifo_IsRxDone returns FALSE.

Note:: C-style signature: int XLlFifo_IsRxDone(XLlFifo *InstancePtr)

#define XLlFifo_IsRxEmpty ( InstancePtr )

Value:

((XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_RDFO_OFFSET) == 0) \
                                                        ? TRUE : FALSE)

XLlFifo_IsRxEmpty returns true if the receive channel of the FIFO, specified by InstancePtr, is empty.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_IsRxEmpty returns TRUE when the receive channel of the FIFO is empty. Otherwise, XLlFifo_IsRxEmpty returns FALSE.

Note:: C-style signature: int XLlFifo_IsRxEmpty(XLlFifo *InstancePtr)

#define XLlFifo_IsTxDone ( InstancePtr )

Value:

((XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET) & \
                XLLF_INT_TC_MASK) \
                ? TRUE : FALSE)

XLlFifo_IsTxDone returns true if the transmission in the transmit channel of the FIFO, specified by InstancePtr, is complete. XLlFifo_IsTxDone works only if the TC bit in the IS register is cleared before sending a frame.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_IsTxDone returns TRUE when the transmit channel of the FIFO is complete. Otherwise, XLlFifo_IsTxDone returns FALSE.

Note:: C-style signature: int XLlFifo_IsTxDone(XLlFifo *InstancePtr)

#define XLlFifo_Read	(	InstancePtr,
		BufPtr,
		Bytes	)	XStrm_Read(&((InstancePtr)->RxStreamer), (BufPtr), (Bytes))

XLlFifo_Read reads Bytes bytes from the receive channel of the FIFO referenced by InstancePtr to the block of memory, referenced by BufPtr.

Care must be taken to ensure that the number of bytes read with one or more calls to XLlFifo_Read() does not exceed the number of bytes available given from the last call to XLlFifo_RxGetLen().

Parameters:

	InstancePtr	references the FIFO on which to operate.
	BufPtr	specifies the memory address to place the data read.
	Bytes	specifies the number of bytes to read.

Returns:: N/A

Note:: Error handling is handled through hardware exceptions and interrupts.

C Signature: void XLlFifo_Read(XLlFifo *InstancePtr, void *BufPtr, unsigned Bytes)

#define XLlFifo_ReadRdr ( InstancePtr ) XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_RDR_OFFSET)

XLlFifo_ReadTdr returns the contents of the Receive Destination Register(RDR).

The RDR contains destination address corresponding to the valid packet that is received. The RDR should only be read when a receive packet is available for processing (the receive occupancy is not zero). Once the RDR is read, the receive packet data should be read from the receive data FIFO before the RDR is read again. The RDR values are stored in the receive data FIFO by the AXI4-Stream FIFO core with the data of each packet. The RDR value for the subsequent packet to be processed is moved to the RDR when the previous RDR value has been read.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: The Receive Destination address read from the RDR.

Note:: C Signature: u32 XLlFifo_ReadRdr(XLlFifo *InstancePtr)

#define XLlFifo_Reset ( InstancePtr )

Value:

XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_LLR_OFFSET, \
                        XLLF_LLR_RESET_MASK)

XLlFifo_Reset resets both the Tx and Rx channels and the local link interface the FIFO specified by InstancePtr. XLlFifo_TxReset resets also sends a reset pulse to the downstream device (e.g. TEMAC). XLlFifo_Reset drops any bytes in the FIFO not yet retrieved. XLlFifo_Reset drops any bytes in the FIFO not yet transmitted.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: N/A

Note:: C-style signature: void XLlFifo_Reset(XLlFifo *InstancePtr)

#define XLlFifo_RxGetLen ( InstancePtr ) XStrm_RxGetLen(&((InstancePtr)->RxStreamer))

XLlFifo_RxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO, specified by InstancePtr.

Note that the program must first call XLlFifo_RxGetLen before pulling data out of the receive channel of the FIFO with XLlFifo_Read.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_RxGetLen returns the number of bytes available in the next frame.

Note:

C Signature: u32 XLlFifo_RxGetLen(XLlFifo *InstancePtr)

#define XLlFifo_RxOccupancy ( InstancePtr ) XStrm_RxOccupancy(&((InstancePtr)->RxStreamer))

XLlFifo_RxOccupancy returns the number of 32-bit words available (occupancy) to be read from the receive channel of the FIFO, specified by InstancePtr.

The xps_ll_fifo core uses the same fifo to store data values and frame length values. Upon initialization, the XLlFifo_RxOccupancy will give the value of 1, which means one length value (a reserved fifo location) and no data values.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_RxOccupancy returns the occupancy count for the specified packet FIFO.

Note:

C Signature: u32 XLlFifo_RxOccupancy(XLlFifo *InstancePtr)

#define XLlFifo_RxReset ( InstancePtr )

Value:

XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_RDFR_OFFSET, \
                        XLLF_RDFR_RESET_MASK)

XLlFifo_RxReset resets the receive channel of the FIFO specified by InstancePtr. XLlFifo_RxReset drops any bytes in the FIFO not yet retrieved.

The calling software may want to test for the completion of the reset by reading the interrupt status (IS) register and testing for the Rx Reset complete (RRC) bit.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: N/A

Note:: C-style signature: void XLlFifo_RxReset(XLlFifo *InstancePtr)

#define XLlFifo_Status ( InstancePtr ) XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET)

XLlFifo_Status returns a bit mask of the interrupt status register (ISR) for the FIFO specified by InstancePtr. XLlFifo_Status can be used to query the status of the FIFO without having to have interrupts enabled.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_IntStatus returns a bit mask of the status conditions. The mask will be a set of bitwise or'd values from the XLLF_INT_*_MASK preprocessor symbols.

Note:: C-style signature: u32 XLlFifo_IntStatus(XLlFifo *InstancePtr)

#define XLlFifo_TxReset ( InstancePtr )

Value:

XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_TDFR_OFFSET, \
                        XLLF_TDFR_RESET_MASK)

XLlFifo_TxReset resets the transmit channel of the FIFO specified by InstancePtr. XLlFifo_TxReset drops any bytes in the FIFO not yet transmitted.

The calling software may want to test for the completion of the reset by reading the interrupt status (IS) register and testing for the Tx Reset complete (TRC) bit.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: N/A

Note:: C-style signature: void XLlFifo_TxReset(XLlFifo *InstancePtr)

#define XLlFifo_TxSetLen	(	InstancePtr,
		Bytes		)	XStrm_TxSetLen(&((InstancePtr)->TxStreamer), (Bytes))

XLlFifo_TxSetLen begins a hardware transfer of Bytes bytes out of the transmit channel of the FIFO specified by InstancePtr.

Parameters:

	InstancePtr	references the FIFO on which to operate.
	Bytes	specifies the frame length in bytes.

Returns:: N/A

Note:

C Signature: void XLlFifo_TxSetLen(XLlFifo *InstancePtr, u32 Bytes)

#define XLlFifo_TxVacancy ( InstancePtr ) XStrm_TxVacancy(&((InstancePtr)->TxStreamer))

XLlFifo_TxVacancy returns the number of unused 32 bit words available (vacancy) in the send channel of the FIFO specified by InstancePtr.

The xps_ll_fifo core uses tXLLF_he same fifo to store data values and frame length values. Upon initialization, the XLlFifo_TxVacancy will give the value of FIFO_WIDTH - 1, which means one length value used (a reserved fifo location) and no data values yet present.

Parameters:

InstancePtr

references the FIFO on which to operate.

Returns:: XLlFifo_TxVacancy returns the vacancy count in 32-bit words for the specified FIFO.

Note:: C-style signature: u32 XLlFifo_TxVacancy(XLlFifo *InstancePtr)

#define XLlFifo_Write	(	InstancePtr,
		BufPtr,
		Bytes	)	XStrm_Write(&((InstancePtr)->TxStreamer), (BufPtr), (Bytes))

XLlFifo_Write writes Bytes bytes of the block of memory, referenced by BufPtr, to the transmit channel of the FIFO referenced by InstancePtr.

Care must be taken to ensure that the number of bytes written with one or more calls to XLlFifo_Write() matches the number of bytes given in the next call to XLlFifo_TxSetLen().

Parameters:

	InstancePtr	references the FIFO on which to operate.
	BufPtr	specifies the memory address of data to write.
	Bytes	specifies the number of bytes to write.

Returns:: N/A

Note:: Error handling is handled through hardware exceptions and interrupts.

C Signature: void XLlFifo_Write(XLlFifo *InstancePtr, void *BufPtr, unsigned Bytes)

#define XLlFifo_WriteTdr	(	InstancePtr,
		Tdest		)

Value:

XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_TDR_OFFSET, \
                          Tdest & 0xF)

XLlFifo_WriteTdr writes to the Transmit Destination Register (TDR)

The TDR stores the destination address corresponding to the packet to be transmitted. When presenting a transmit packet to the AXI4-Stream FIFO core the following sequence should be followed

Write the destination address into TDR first,
Write the packet data to the Transmit Data FIFO next
Write the length of the packet into the Transmit Length Register.

Parameters:

	InstancePtr	references the FIFO on which to operate.
	Tdest	is the Transmit Destination address to be written to TDR.

Returns:: N/A

Note:: C Signature: void XLlFifo_WriteTdr(XLlFifo *InstancePtr, u32 Tdest);

Function Documentation

XLlFifo_Config* XLlFfio_LookupConfig ( u32 DeviceId )

Look up the hardware configuration for a device instance

Parameters:

DeviceId

is the unique device ID of the device to lookup for

Returns:: The configuration structure for the device. If the device ID is not found,a NULL pointer is returned.

Note:: None

int XLlFifo_CfgInitialize	(	XLlFifo *	InstancePtr,
		XLlFifo_Config *	Config,
		u32	EffectiveAddress
	)

XLlFifo_CfgInitialize initializes an XPS_ll_Fifo device along with the InstancePtr that references it.

Parameters:

	InstancePtr	is a pointer to the Axi Streaming FIFO instance to be worked on.
	CfgPtr	references the structure holding the hardware configuration for the Axi Streaming FIFO core to initialize.
	EffectiveAddr	is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.

Returns:: N/A

void XLlFifo_Initialize	(	XLlFifo *	InstancePtr,
		u32	BaseAddress
	)

XLlFifo_Initialize initializes an XPS_ll_Fifo device along with the InstancePtr that references it.

Parameters:

	InstancePtr	references the memory instance to be associated with the FIFO device upon initialization.
	BaseAddress	is the processor address used to access the base address of the Fifo device.

Returns:: N/A

u32 XLlFifo_iRxGetLen ( XLlFifo * InstancePtr )

u32 XLlFifo_iRxOccupancy ( XLlFifo * InstancePtr )

void XLlFifo_iTxSetLen	(	XLlFifo *	InstancePtr,
		u32	Bytes
	)

u32 XLlFifo_iTxVacancy ( XLlFifo * InstancePtr )

u32 XLlFifo_RxGetWord ( XLlFifo * InstancePtr )

void XLlFifo_TxPutWord	(	XLlFifo *	InstancePtr,
		u32	Word
	)

Xilinx Processor IP Library

xllfifo.h File Reference

Classes

Defines

Functions

Detailed Description

Define Documentation

Function Documentation