#include <string.h>
#include "xstatus.h"
#include "xil_assert.h"
#include "xtrafgen_hw.h"
#define MAX_NUM_ENTRIES 256 |
Number of command entries per region
#define NUM_BLOCKS 2 |
Number of Read and write regions
#define XTG_CMD_RAM_BLOCK_SIZE 0x1000 |
Cmd RAM Block Size (4KB)
#define XTG_COMMAND_RAM_SIZE 0x2000 |
Command RAM (8KB)
#define XTG_MASTER_RAM_SIZE 0x2000 |
Master RAM (8KB)
#define XTG_MODE_BASIC 1 |
Basic Mode
#define XTG_MODE_FULL 0 |
Full Mode
#define XTG_MODE_STATIC 2 |
Static Mode
#define XTG_MODE_STREAMING 3 |
Streaming Mode
#define XTG_MODE_SYS_INIT 4 |
System Init Mode
#define XTG_MWIDTH_32 0 |
Master Width - 32
#define XTG_MWIDTH_64 1 |
Master Width - 64
#define XTG_PARAM_RAM_SIZE 0x800 |
Parameter RAM (2KB)
#define XTG_PRM_RAM_BLOCK_SIZE 0x400 |
PARAM Block Size (1KB)
#define XTG_READ 0 |
Read Direction Flag
#define XTG_SWIDTH_32 0 |
Slave Width - 32
#define XTG_SWIDTH_64 1 |
Slave Width - 64
#define XTG_WRITE 1 |
Write Direction Flag
#define XTrafGen_CheckforMasterComplete | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_STS_OFFSET) & XTG_ERR_MSTCMP_MASK) ? TRUE : FALSE)
XTrafGen_CheckforMasterComplete checks for master complete.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_ClearErrors | ( | InstancePtr, | |||
Mask | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_STS_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_STS_OFFSET) | Mask))
XTrafGen_ClearErrors clear errors specified in Mask. The corresponding error for each bit set to 1 in Mask, will be enabled.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Mask | contains a bit mask of the errors to clear. The mask can be formed using a set of bit wise or'd values from the definitions in xtrafgen_hw.h file. |
#define XTrafGen_ClearMasterCmpInterrupt | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_STS_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_STS_OFFSET) | \ XTG_ERR_MSTCMP_MASK))
XTrafGen_ClearMasterCmpInterrupt clear Master logic complete interrupt bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_EnableErrors | ( | InstancePtr, | |||
Mask | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_EN_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_EN_OFFSET) | Mask))
XTrafGen_EnableErrors enable errors specified in Mask. The corresponding error for each bit set to 1 in Mask, will be enabled.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Mask | contains a bit mask of the errors to enable. The mask can be formed using a set of bit wise or'd values from the definitions in xtrafgen_hw.h file. |
#define XTrafGen_EnableMasterCmpInterrupt | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_EN_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_EN_OFFSET) | \ XTG_ERR_MSTCMP_MASK))
XTrafGen_EnableMasterCmpInterrupt enables Master logic complete bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_GetStaticBurstLen | ( | InstancePtr | ) |
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_LEN_OFFSET))
XTrafGen_GetStaticBurstLen Gets the Burst Length for AxiTrafGen in StaticMode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_GetStaticTransferDone | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET)) & XTG_STATIC_CNTL_TD_MASK)
XTrafGen_GetStaticTransferDone gets the state of Transfer done bit in Control register When the TraficGen is configured in Static Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_GetStreamingProgDelay | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET ) \ & XTG_STREAM_CFG_PDLY_MASK) >> XTG_STREAM_CFG_PDLY_SHIFT)
XTrafGen_GetStreamingProgDelay Gets the Programmable Delay for AxiTrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_GetStreamingTransCnt | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET ) & XTG_STREAM_TL_TCNT_MASK) \ >> XTG_STREAM_TL_TCNT_SHIFT)
XTrafGen_GetStreamingTransCnt Gets the transfer count for AxiTrafGen in Streaming Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_GetStreamingTransLen | ( | InstancePtr | ) |
(XTrafGen_ReadReg(InstancePtr->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET)& XTG_STREAM_TL_TLEN_MASK)
XTrafGen_GetStreamingTransLen Gets the length of transaction for AxiTrafGen in Streaming Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTRAFGEN_H |
#define XTrafGen_IsMasterLogicDone | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET) & XTG_MCNTL_MSTEN_MASK) ? \ FALSE : TRUE)
XTrafGen_IsMasterLogicDone checks for traffic generator master logic completed bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_IsStaticTransferDone | ( | InstancePtr | ) |
(((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_TD_MASK) == \ XTG_STATIC_CNTL_RESET_MASK) ? \ TRUE : FALSE)
XTrafGen_IsStaticTransferDone checks for reset value When Static Traffic genration Completed by reading Control Register.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_IsStreamingTransferDone | ( | InstancePtr | ) |
(((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_TD_MASK) == \ XTG_STREAM_CNTL_RESET_MASK) ? \ TRUE : FALSE)
XTrafGen_IsStreamingTransferDone checks for reset value When Streaming Traffic genration is Completed by reading Stream Control Register.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_LoopDisable | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET) & ~XTG_MCNTL_LOOPEN_MASK))
XTrafGen_LoopDisable Disbales the loop bit in Master control regiset in Advanced mode/Basic mode of ATG.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_LoopEnable | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET) | XTG_MCNTL_LOOPEN_MASK))
XTrafGen_LoopEnable loops through the command set created using CMDRAM and PARAMRAM indefinitely in Advanced mode/Basic mode of ATG.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_MasterErrIntrDisable | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_MSTERR_INTR_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MSTERR_INTR_OFFSET) & \ ~XTG_MSTERR_INTR_MINTREN_MASK))
XTrafGen_MasterErrIntrDisable disables Global Master error bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_MasterErrIntrEnable | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_MSTERR_INTR_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MSTERR_INTR_OFFSET) | \ XTG_MSTERR_INTR_MINTREN_MASK))
XTrafGen_MasterErrIntrEnable enables Global Master error bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_ReadConfigStatus | ( | InstancePtr | ) |
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_CFG_STS_OFFSET))
XTrafGen_ReadConfigStatus reads Config status register.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_ReadCoreRevision | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET) & XTG_MCNTL_REV_MASK) >> \ XTG_MCNTL_REV_SHIFT)
XTrafGen_ReadCoreRevision reads revision of core.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_ReadErrors | ( | InstancePtr | ) |
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_ERR_STS_OFFSET) & XTG_ERR_ALL_ERR_MASK)
XTrafGen_ReadErrors read master and slave errors.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_ReadIdWidth | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET) & XTG_MCNTL_MSTID_MASK) >> \ XTG_MCNTL_MSTID_SHIFT)
XTrafGen_ReadIdWidth reads M_ID_WIDTH.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_ResetStreamingRandomLen | ( | InstancePtr | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET) & ~XTG_STREAM_CFG_RANDL_MASK)))
XTrafGen_ResetStreamingRandomLen resets the random transaction length for AxiTrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_SetStaticBurstLen | ( | InstancePtr, | |||
Value | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_LEN_OFFSET,Value))
XTrafGen_SetStaticBurstLen Configures the Burst Length for AxiTrafGen In Static Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the Burst length to set in the Static length register. |
#define XTrafGen_SetStaticTransferDone | ( | InstancePtr | ) |
XTrafGen_WriteReg(InstancePtr->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET) | XTG_STATIC_CNTL_TD_MASK))
XTrafGen_SetStaticTransferDone sets the Transfer done bit in Control register When AxiTrafGen is Configured in Static Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_SetStreamingProgDelay | ( | InstancePtr, | |||
Value | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET)|(Value << XTG_STREAM_CFG_PDLY_SHIFT)) \ & XTG_STREAM_CFG_PDLY_MASK))
XTrafGen_SetStreamingProgDelay Configures the Programmable Delay for AxiTrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the value that's need to be configure in the Stream Config Register. |
#define XTrafGen_SetStreamingRandomLen | ( | InstancePtr, | |||
Value | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET) | Value)))
XTrafGen_SetStreamingRandomLen Configures the random transaction length for AxiTrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the random length that's need to be Configure in the Streaming Config register. |
#define XTrafGen_SetStreamingTdestPort | ( | InstancePtr, | |||
Value | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CFG_OFFSET)|(Value << XTG_STREAM_CFG_TDEST_SHIFT)) \ & XTG_STREAM_CFG_TDEST_MASK))
XTrafGen_SetStreamingTdestPort Configures the Value to drive on TDEST port for Axi TrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the Port value that's need to be set. |
#define XTrafGen_SetStreamingTransCnt | ( | InstancePtr, | |||
Value | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET) |((Value << XTG_STREAM_TL_TCNT_SHIFT) \ & XTG_STREAM_TL_TCNT_MASK))))
XTrafGen_SetStreamingTransCnt Configures the transfer count for AxiTrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the transfer length that needs to be configured in Transfer length register. |
#define XTrafGen_SetStreamingTransferDone | ( | InstancePtr | ) |
XTrafGen_WriteReg(InstancePtr->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET) | XTG_STREAM_CNTL_TD_MASK))
XTrafGen_SetTransferDone sets the Transfer done bit in Control register When AxiTrafGen is Configured in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_SetStreamingTransLen | ( | InstancePtr, | |||
Value | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_TL_OFFSET) | Value)))
XTrafGen_SetStreamingTransLen Configures the length of transaction for AxiTrafGen in Streaming Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the transfer length to set in the transfer length Register. |
#define XTrafGen_SlaveErrIntrDisable | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_SCNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_SCNTL_OFFSET) & \ ~XTG_SCNTL_ERREN_MASK))
XTrafGen_SlaveErrIntrDisable disables Global Slave error bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_SlaveErrIntrEnable | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_SCNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_SCNTL_OFFSET) | XTG_SCNTL_ERREN_MASK))
XTrafGen_SlaveErrIntrEnable enables Global Slave error bit.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StartMasterLogic | ( | InstancePtr | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_MCNTL_OFFSET) | XTG_MCNTL_MSTEN_MASK))
XTrafGen_StartMasterLogic starts traffic generator master logic.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StaticDisable | ( | InstancePtr | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_RESET_MASK)))
XTrafGen_StaticDisable disables the traffic genration on the Axi TrafGen when the core is configured in Static Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StaticEnable | ( | InstancePtr | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET) | XTG_STATIC_CNTL_STEN_MASK)))
XTrafGen_StaticEnable enable the traffic genration when the core is configured Static Mode.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StaticVersion | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_VER_MASK) >> \ XTG_STATIC_CNTL_VER_SHIFT )
XTrafGen_StaticVersion returns the version value for the Axi TrafGen When configured in Static Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StreamDisable | ( | InstancePtr | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_RESET_MASK)))
XTrafGen_StreamDisable Disable the traffic genration on the Axi TrafGen When core is configured in Streaming Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StreamEnable | ( | InstancePtr | ) |
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET, \ (XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET) | XTG_STREAM_CNTL_STEN_MASK)))
XTrafGen_StreamEnable enable the traffic genration on the Axi TrafGen When the core is configured in Streaming Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_StreamVersion | ( | InstancePtr | ) |
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \ XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_VER_MASK) \ >> XTG_STREAM_CNTL_VER_SHIFT )
XTrafGen_StreamVersion returns the version value for the Axi TrafGen When configured in Streaming Mode
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
#define XTrafGen_WriteSlaveControlReg | ( | InstancePtr, | |||
Value | ) |
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \ XTG_SCNTL_OFFSET, Value)
XTrafGen_WriteSlaveControlReg enables control bits of Slave Control Register. This API will write the value passed from the user.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Value | is the Slave Control Register value to set |
void XTrafGen_AccessMasterRam | ( | XTrafGen * | InstancePtr, | |
u32 | Offset, | |||
int | Length, | |||
u8 | RdWrFlag, | |||
u32 * | Data | |||
) |
Write or Read Master RAM
The MSTRAM has 8 KB of internal RAM used for the following:
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
Offset | is the offset value in Master RAM. | |
Length | is the size of data to write/read. | |
RdWrFlag | specifies whether to write or read | |
Data | is the pointer to array which contains data to write or reads data into. |
int XTrafGen_AddCommand | ( | XTrafGen * | InstancePtr, | |
XTrafGen_Cmd * | CmdPtr | |||
) |
Add a command to the software list of commands.
This function prepares the four Command Words and one Parameter Word from the Command structure passed from the user application. It then adds to a list of commands (maintained in the software). Both CMDRAM and PARAMRAM are divided into two regions, one for reads and one for writes. Each region can hold 256 commands with each entry containing four Command RAM words and one Parameter RAM word.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
CmdPtr | is a pointer to Command structure. |
int XTrafGen_CfgInitialize | ( | XTrafGen * | InstancePtr, | |
XTrafGen_Config * | Config, | |||
u32 | EffectiveAddress | |||
) |
This function initializes a AXI Traffic Generator device. This function must be called prior to using a AXI Traffic Generator Device. Initializing a engine includes setting up the register base address, setting up the instance data, and ensuring the hardware is in a quiescent state.
InstancePtr | is a pointer to the Axi Traffic Generator instance to be worked on. | |
CfgPtr | references the structure holding the hardware configuration for the Axi Traffic Generator core to initialize. | |
EffectiveAddr | is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead. |
int XTrafGen_EraseAllCommands | ( | XTrafGen * | InstancePtr | ) |
Erase all Command Entry values
This function erases all the 256 entries of both write and read regions with each entry containing four command words and parameter word.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
int XTrafGen_GetLastValidIndex | ( | XTrafGen * | InstancePtr, | |
u32 | RdWrFlag | |||
) |
Get last Valid Command Index of Write/Read region
The last valid command index is used to set 'my_depend' and 'other_depend' fields of the Command RAM (Word 2).
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. | |
RdWrFlag | specifies a Read or Write Region |
XTrafGen_Config* XTrafGen_LookupConfig | ( | u32 | DeviceId | ) |
Look up the hardware configuration for a device instance
DeviceId | is the unique device ID of the device to lookup for |
void XTrafGen_PrintCmds | ( | XTrafGen * | InstancePtr | ) |
Display Command Entry values
This function prints all the 256 entries of both write and read regions with each entry containing four command words and parameter word.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
int XTrafGen_WriteCmdsToHw | ( | XTrafGen * | InstancePtr | ) |
Write Commands to internal Command and Parameter RAMs
This function writes all the prepared commands to hardware.
InstancePtr | is a pointer to the Axi TrafGen instance to be worked on. |
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