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cpu v2_1
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
<hl>Software Drivers</hl>
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<h1>cpu v2_1</h1>
<p>
This file contains the interface for the XIo component, which encapsulates the Input/Output functions for processors that do not require any special I/O handling.<p>
<pre>
MODIFICATION HISTORY:</pre><p>
<pre> Ver Who Date Changes
----- ---- -------- -------------------------------------------------------
1.00a rpm 11/07/03 Added InSwap/OutSwap routines for endian conversion
1.00a xd 11/04/04 Improved support for doxygen
1.01a ecm 02/24/06 CR225908 corrected the extra curly braces in macros
and bumped version to 1.01.a.
1.11a mta 03/21/07 Updated to new coding style.
1.11b va 04/17/08 Updated Tcl for better CORE_CLOCK_FREQ_HZ definition
1.11a sdm 03/12/09 Updated Tcl to define correct value for CORE_CLOCK_FREQ_HZ
(CR #502010)
1.13a sdm 03/12/09 Updated the Tcl to pull appropriate libraries for Little
Endian Microblaze
2.0 adk 19/12/13 Updated as per the New Tcl API's
2.1 bss 04/14/14 Updated tcl to copy libgloss.a and libgcc.a libraries
2.1 bss 04/29/14 Updated to copy libgloss.a if exists otherwise libxil.a
CR#794205</pre><p>
<pre> </pre><p>
<dl compact><dt><b>Note:</b></dt><dd></dd></dl>
This file may contain architecture-dependent items (memory-mapped or non-memory-mapped I/O). Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.