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ipipsu
Xilinx SDK Drivers API Documentation
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This is the header file for implementation of IPIPSU driver. Inter Processor Interrupt (IPI) is used for communication between different processors on ZynqMP SoC. Each IPI register set has Trigger, Status and Observation registers for communication between processors. Each IPI path has a 32 byte buffer associated with it and these buffers are located in the XPPU RAM. This driver supports the following operations:
Initialization The config data for the driver is loaded and is based on the HW build. The XIpiPsu_Config data structure contains all the data related to the IPI driver instance and also teh available Target CPUs.
Sending an IPI The following steps can be followed to send an IPI:
Receiving an IPI To receive an IPI, the following sequence can be followed: