01291541a5
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com> Acked-by: Shadul Shaikh <shaduls@xilinx.com>
136 lines
5.7 KiB
C
136 lines
5.7 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xhdcp1x_port_dp.h
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*
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* This file contains the definitions for the hdcp port registers/offsets for
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* display port interfaces
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------------------
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* 1.00 fidus 07/16/15 Initial release.
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* </pre>
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*
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******************************************************************************/
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#ifndef XHDCP1X_PORT_DP_H
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/**< Prevent circular inclusions by using protection macros */
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#define XHDCP1X_PORT_DP_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#if defined(XHDCP1X_PORT_HDMI_H)
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#error "cannot include both xhdcp1x_port_dp.h and xhdcp1x_port_hdmi.h"
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#endif
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/************************** Constant Definitions *****************************/
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/**
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* These constants specify the offsets for the various fields and/or
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* attributes within the hdcp port
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*/
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#define XHDCP1X_PORT_OFFSET_BKSV (0x00u) /**< Bksv Offset */
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#define XHDCP1X_PORT_OFFSET_RO (0x05u) /**< R0' Offset */
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#define XHDCP1X_PORT_OFFSET_AKSV (0x07u) /**< Aksv Offset */
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#define XHDCP1X_PORT_OFFSET_AN (0x0Cu) /**< An Offset */
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#define XHDCP1X_PORT_OFFSET_VH0 (0x14u) /**< V'.H0 Offset */
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#define XHDCP1X_PORT_OFFSET_VH1 (0x18u) /**< V'.H1 Offset */
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#define XHDCP1X_PORT_OFFSET_VH2 (0x1Cu) /**< V'.H2 Offset */
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#define XHDCP1X_PORT_OFFSET_VH3 (0x20u) /**< V'.H3 Offset */
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#define XHDCP1X_PORT_OFFSET_VH4 (0x24u) /**< V'.H4 Offset */
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#define XHDCP1X_PORT_OFFSET_BCAPS (0x28u) /**< Bcaps Offset */
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#define XHDCP1X_PORT_OFFSET_BSTATUS (0x29u) /**< Bstatus Offset */
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#define XHDCP1X_PORT_OFFSET_BINFO (0x2Au) /**< Binfo Offset */
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#define XHDCP1X_PORT_OFFSET_KSVFIFO (0x2Cu) /**< KSV FIFO Offset */
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#define XHDCP1X_PORT_OFFSET_AINFO (0x3Bu) /**< Ainfo Offset */
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#define XHDCP1X_PORT_OFFSET_DBG (0xC0u) /**< Debug Space Offset */
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/**
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* These constants specify the sizes for the various fields and/or
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* attributes within the hdcp port
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*/
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#define XHDCP1X_PORT_SIZE_BKSV (0x05u) /**< Bksv Size */
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#define XHDCP1X_PORT_SIZE_RO (0x02u) /**< R0' Size */
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#define XHDCP1X_PORT_SIZE_AKSV (0x05u) /**< Aksv Size */
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#define XHDCP1X_PORT_SIZE_AN (0x08u) /**< An Size */
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#define XHDCP1X_PORT_SIZE_VH0 (0x04u) /**< V'.H0 Size */
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#define XHDCP1X_PORT_SIZE_VH1 (0x04u) /**< V'.H1 Size */
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#define XHDCP1X_PORT_SIZE_VH2 (0x04u) /**< V'.H2 Size */
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#define XHDCP1X_PORT_SIZE_VH3 (0x04u) /**< V'.H3 Size */
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#define XHDCP1X_PORT_SIZE_VH4 (0x04u) /**< V'.H4 Size */
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#define XHDCP1X_PORT_SIZE_BCAPS (0x01u) /**< Bcaps Size */
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#define XHDCP1X_PORT_SIZE_BSTATUS (0x01u) /**< Bstatus Size */
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#define XHDCP1X_PORT_SIZE_BINFO (0x02u) /**< Binfo Size */
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#define XHDCP1X_PORT_SIZE_KSVFIFO (0x0Fu) /**< KSV FIFO Size */
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#define XHDCP1X_PORT_SIZE_AINFO (0x01u) /**< Ainfo Offset */
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#define XHDCP1X_PORT_SIZE_DBG (0x40u) /**< Debug Space Size */
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/**
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* These constants specify the bit definitions within the various fields
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* and/or attributes within the hdcp port
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*/
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#define XHDCP1X_PORT_BIT_BSTATUS_READY (1u << 0)
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#define XHDCP1X_PORT_BIT_BSTATUS_RO_AVAILABLE (1u << 1)
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#define XHDCP1X_PORT_BIT_BSTATUS_LINK_FAILURE (1u << 2)
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#define XHDCP1X_PORT_BIT_BSTATUS_REAUTH_REQUEST (1u << 3)
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#define XHDCP1X_PORT_BIT_BCAPS_HDCP_CAPABLE (1u << 0)
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#define XHDCP1X_PORT_BIT_BCAPS_REPEATER (1u << 1)
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#define XHDCP1X_PORT_BIT_AINFO_REAUTH_ENABLE_IRQ (1u << 0)
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/**
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* This constant defines the base address of the hdcp port within the DPCD
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* address space
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*/
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#define XHDCP1X_PORT_DPCD_BASE (0x68000u) /**< Base Addr in DPCD */
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* XHDCP1X_PORT_DP_H */
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