07377abe62
Exception handler is modified to log the ESR and EAR registers into persistent global storage registers(0,1) and set FW error bit-0. If bit-0 of FWError group in ERROR_2 register set is configured to do a SRST,then post reset, SW can read the reason for exception from these persistent registers. Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com> |
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| .. | ||
| freertos_hello_world | ||
| lwip_echo_server | ||
| openamp_echo_test | ||
| openamp_matrix_multiply | ||
| openamp_rpc_demo | ||
| rsa_auth_app | ||
| xilkernel_thread_demo | ||
| zynq_fsbl | ||
| zynqmp_fsbl | ||
| zynqmp_pmufw | ||