184d01e738
provide correct condition for assert functions. Fix incorrect parameters in the driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
1202 lines
44 KiB
C
Executable file
1202 lines
44 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2013 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xtrafgen.h
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*
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* This file contains the implementation of the AXI Traffic Generator driver.
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* User documentation for the driver functions is contained in this file in the
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* form of comment blocks at the front of each function.
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*
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* The AXI Traffic Generator IP is designed to generate AXI4 traffic which can
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* be used to stress different modules/interconnect connected in the system.
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* Different configurable options allow the user to generate a wide variety of
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* traffic based on their requirements. The core is broadly separated into a
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* master and slave block, each of which contains the write block and read
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* block. Other support features are provided by the Control registers and
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* Internal RAMs.
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*
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* The commands to be issued by the AXI traffic generator are loaded in a
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* 128-bit wide, 512 deep command RAM through AXI Slave interface. After the
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* core is enabled, control logic issues the write/read commands based on the
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* command settings programmed. The core updates the Status registers and
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* asserts interrupts on the completion of issuing programmed commands.
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*
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* The Axi Traffic Genrator has five different modes:
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*
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* - Advanced Mode: Advanced Mode allows full control over the traffic genration
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* Control registers are provided to you to program the core to genrate
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* different AXI4 transactions.
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*
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* - Basic Mode: Basic Mode allows basic AXI4 traffic genration with less
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* resource overhead.
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*
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* - Static Mode: Static Mode allows you to genrate a simple AXI4 traffic with
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* very less resource and minimum processor intervention.In this Mode the core
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* continuously genrates fixed address and fixed length INCR type read and
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* write transfers.
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*
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* - System Init Mode: System Init Mode is a special Mode where core provides
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* only AXI4-Lite Master write interface.This mode can be used in a system
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* without a processor to initialize the system peripherals with preconfigured
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* values on system reset.
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*
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* - Streaming Mode: In Streaming Mode the core can be configured to generate
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* traffic based on the register configuration.
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*
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* <b>Initialization & Configuration</b>
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*
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* The XTrafGen_Config structure is used by the driver to configure itself.
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* This configuration structure is typically created by the tool-chain based
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* on HW build properties.
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*
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* To support multiple runtime loading and initialization strategies employed
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* by various operating systems, the driver instance can be initialized in the
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* following way:
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*
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* - XTrafGen_LookupConfig(DeviceId) - Use the devide identifier to find the
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* static configuration structure defined in xtrafgen_g.c. This is setup
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* by the tools. For some operating systems the config structure will be
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* initialized by the software and this call is not needed.
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*
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* - XTrafGen_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
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* configuration structure provided by the caller. If running in a system
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* with address translation, the provided virtual memory base address
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* replaces the physical address present in the configuration structure.
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*
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* <b>Command Handling</b>
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*
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* AXI Traffic Generator core operates based on the commands programmed into
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* Command and Parameter RAMs. The CMDRAM and PARAMRAM is divided into two
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* regions: write and read. Each region can hold 256 entries. Once the core
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* is enabled, the internal control logic issues write/read commands. To
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* handle command programming efficiently, we are maintaining a software
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* list of commands. Following APIs are provided to handle this mechanism:
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*
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* - XTrafGen_AddCommand(): This function prepares the Command Words and
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* Parameter Word from the Command structure passed from the user
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* application. It then adds to a software list of commands.
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*
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* - XTrafGen_WriteCmdsToHw(): This function writes the prepared list of
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* Command and Parameter Words prepared to CMDRAM and PARAMRAM.
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*
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* - XTrafGen_GetLastValidIndex(): This function gets last Valid Command
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* Index of Write/Read region. The last valid command index is used to
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* set 'my_depend' and 'other_depend' fields of the Command RAM.
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*
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* - XTrafGen_EraseAllCommands(): This function clears the list of commands
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* maintained in software and also updates the respective RAMs.
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*
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* - XTrafGen_PrintAllCmds(): This function displays the list of commands.
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*
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* <b>Master RAM Handling</b>
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*
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* AXI Traffic Generator uses MSTRAM to
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* - Take data from this RAM for write transactions
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* - Store data to this RAM for read transaction
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* User need to call this API to write/read to/from Master RAM,
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*
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* - XTrafGen_AccessMasterRam() - This function programs the Master RAM
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* with the data which is used in master logic. The amount of the data
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* is limited by the size of master RAM.
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*
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* <b>Interrupts</b>
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*
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* The driver defaults to no interrupts at initialization such that interrupts
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* must be enabled if desired. An interrupt is generated for one of the
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* following conditions:
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* - Master Logic Completion Interrupt
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* - Error Interrupt (For Master and Slave Errors)
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*
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* The application can control which interrupts are enabled using these
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* functions:
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* - XTrafGen_EnableMasterCmpInterrupt()
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* - XTrafGen_MasterErrIntrEnable()
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* - XTrafGen_SlaveErrIntrEnable()
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*
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* The interrupt system has to be set up and if the interrupts are enabled,
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* Traffic Generator notifies the software either about the completion or an
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* error in transfer through interrupts.
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*
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* <b> Examples </b>
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*
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* We provided two examples to show how to use the driver API:
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* - One for interrupt mode (xtrafgen_interrupt_example.c)
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* - One for polling mode (xtrafgen_polling_example.c)
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*
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* <b> Asserts </b>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining, at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development.
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*
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* <b>RTOS Independence</b>
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*
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* This driver is intended to be RTOS and processor independent. It works with
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* physical addresses only. Any needs for dynamic memory management, threads or
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* thread mutual exclusion, virtual memory, or cache control must be satisfied
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* by the layer above this driver.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a srt 01/24/13 First release
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* 1.01a adk 03/09/13 Updated Driver to Support Streaming and Static Mode
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* 2.00a adk 16/09/13 Fixed CR:737291
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* 2.01a adk 21/10/13 Fixed CR:740522 Updated the MasterRam offset as per latest
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* IP.This driver is valid only for IP(v2.0) onwards. The
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* XTG_MASTER_RAM_OFFSET has been changed from
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* 0x10000 to 0xc000.
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* 2.01a adk 15/11/13 Fixed CR:760808 added Macro's for the New bit fields added
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* in the latest tarfgen IP(v2.0).
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* 3.0 adk 12/10/13 Updated as per the New Tcl API's
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* 3.1 adk 28/04/14 Fixed CR:782131 Incorrect mask value for the
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* loopenable bit.
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* 3.2 adk 05/08/14 Fixed CR:798742 The last word of 8KB Master RAM in
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* axi traffic generator can't access and CR:799554
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* Some incorrect parameter in axi traffic generator driver.
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* </pre>
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******************************************************************************/
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#ifndef XTRAFGEN_H /* prevent circular inclusions */
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#define XTRAFGEN_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include <string.h>
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#include "xstatus.h"
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#include "xil_assert.h"
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#include "xtrafgen_hw.h"
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/************************** Constant Definitions *****************************/
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#define MAX_NUM_ENTRIES 256 /**< Number of command entries per region */
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#define NUM_BLOCKS 2 /**< Number of Read and write regions */
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/* Direction Flags */
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#define XTG_WRITE 1 /**< Write Direction Flag */
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#define XTG_READ 0 /**< Read Direction Flag */
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/* Operating Mode flags */
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#define XTG_MODE_FULL 0 /**< Full Mode */
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#define XTG_MODE_BASIC 1 /**< Basic Mode */
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#define XTG_MODE_STATIC 2 /**< Static Mode */
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#define XTG_MODE_STREAMING 3 /**< Streaming Mode */
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#define XTG_MODE_SYS_INIT 4 /**< System Init Mode */
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/* Master Width Flags */
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#define XTG_MWIDTH_32 0 /**< Master Width - 32 */
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#define XTG_MWIDTH_64 1 /**< Master Width - 64 */
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/* Slave Width Flags */
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#define XTG_SWIDTH_32 0 /**< Slave Width - 32 */
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#define XTG_SWIDTH_64 1 /**< Slave Width - 64 */
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/* Internal RAM Sizes */
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#define XTG_PRM_RAM_BLOCK_SIZE 0x400 /**< PARAM Block Size (1KB) */
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#define XTG_CMD_RAM_BLOCK_SIZE 0x1000 /**< Cmd RAM Block Size (4KB) */
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#define XTG_PARAM_RAM_SIZE 0x800 /**< Parameter RAM (2KB) */
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#define XTG_COMMAND_RAM_SIZE 0x2000 /**< Command RAM (8KB) */
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#define XTG_MASTER_RAM_SIZE 0x2000 /**< Master RAM (8KB) */
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/************************** Type Definitions *****************************/
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/**
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* Command Ram word fields
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*
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*/
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typedef struct XTrafGen_CRamCmd
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{
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u32 Address; /**< Address Driven to a*_addr line */
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u32 ValidCmd; /**< Valid Command */
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u32 LastAddress; /**< Last address */
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u32 Prot; /**< Driven to a*_prot line */
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u32 Id; /**< Driven to a*_id line */
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u32 Size; /**< Driven to a*_size line */
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u32 Burst; /**< Driven to a*_burst line */
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u32 Lock; /** Driven to a*_lock line */
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u32 Length; /**< Driven to a*_len line */
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u32 MyDepend; /**< My depend command no */
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u32 OtherDepend; /**< Other depend Command no */
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u32 MasterRamIndex; /**< Master Ram Index */
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u32 Qos; /**< Driven to a*_qos line */
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u32 User; /**< Driven to a*_user line */
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u32 Cache; /**< Driven to a*_cache line */
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u32 ExpectedResp; /**< Expected response */
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} XTrafGen_CRamCmd;
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/**
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* Parameter Ram word fields
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*
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*/
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typedef struct XTrafGen_PRamCmd
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{
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u32 OpCntl0; /**< Control field 0 */
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u32 OpCntl1; /**< Control field 1 */
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u32 OpCntl2; /**< Control field 2 */
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u32 AddrMode; /**< Address mode */
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u32 IntervalMode; /**< Interval mode */
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u32 IdMode; /**< Id mode */
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u32 Opcode; /**< Opcode */
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} XTrafGen_PRamCmd;
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/**
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* Command structure exposed to user
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*
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* This structure should be updated by user with required
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* configuration
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*/
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typedef struct XTrafGen_Cmd
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{
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XTrafGen_CRamCmd CRamCmd; /**< Command RAM struct */
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XTrafGen_PRamCmd PRamCmd; /**< Param RAM struct */
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u8 RdWrFlag; /**< Write/Read region? */
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} XTrafGen_Cmd;
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/**
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* Command Entry structure
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*
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* This structure denotes each entry of 256 commands.
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*/
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typedef struct XTrafGen_CmdEntry
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{
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u32 CmdWords[4]; /**< Command Ram words */
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u32 ParamWord; /**< Parameter Ram word */
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} XTrafGen_CmdEntry;
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/**
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* The configuration structure for Traffic Generator device
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*
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* This structure passes the hardware building information to the driver
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*/
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typedef struct XTrafGen_Config {
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u16 DeviceId; /**< Device Id */
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u32 BaseAddress; /**< Base Address */
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u32 BusType; /**< Atgmode */
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u32 Mode; /**< Atgmode_l2 */
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u32 ModeType; /**< Axismode */
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} XTrafGen_Config;
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/**
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* Command Information Structure
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*
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* This structure is maintained by the driver
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*/
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typedef struct XTrafGen_CmdInfo {
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u32 WrIndex; /**< Write Region Command Index */
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u32 RdIndex; /**< Read Region Command Index */
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u8 WrIndexEnd; /**< Write Index End */
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u8 RdIndexEnd; /**< Read Index End */
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int LastWrValidIndex; /**< Write Last Valid Command Index */
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int LastRdValidIndex; /**< Read Last Valid Command Index */
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XTrafGen_CmdEntry CmdEntry[2][MAX_NUM_ENTRIES];
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/**< Software array of Commands */
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} XTrafGen_CmdInfo;
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/**
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* The XTrafGen driver instance data. An instance must be allocated for
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* each Traffic Generator device in use.
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*/
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typedef struct XTrafGen {
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XTrafGen_Config Config; /**< Config Structure */
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u8 OperatingMode; /**< Operating mode */
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u8 MasterWidth; /**< Master Width */
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u8 SlaveWidth; /**< Slave Width */
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XTrafGen_CmdInfo CmdInfo; /**< Command Info structure */
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int IsReady; /* Device is initialized and ready */
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} XTrafGen;
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/***************** Macros (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/**
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*
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* XTrafGen_ReadCoreRevision reads revision of core.
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*
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* @param InstancePtr is a pointer to the Axi TrafGen instance to be
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* worked on.
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*
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* @return Core Revision Value
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*
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* @note C-style signature:
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* u8 XTrafGen_ReadCoreRevision(XTrafGen *InstancePtr)
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*
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*****************************************************************************/
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#define XTrafGen_ReadCoreRevision(InstancePtr) \
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((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET) & XTG_MCNTL_REV_MASK) >> \
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XTG_MCNTL_REV_SHIFT)
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/****************************************************************************/
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/**
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*
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* XTrafGen_ReadIdWidth reads M_ID_WIDTH.
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*
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* @param InstancePtr is a pointer to the Axi TrafGen instance to be
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* worked on.
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*
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* @return Value of M_ID_WIDTH
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*
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* @note C-style signature:
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* u8 XTrafGen_ReadIdWidth(XTrafGen *InstancePtr)
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*
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*****************************************************************************/
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#define XTrafGen_ReadIdWidth(InstancePtr) \
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((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET) & XTG_MCNTL_MSTID_MASK) >> \
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XTG_MCNTL_MSTID_SHIFT)
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/****************************************************************************/
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/**
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*
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* XTrafGen_StartMasterLogic starts traffic generator master logic.
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*
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* @param InstancePtr is a pointer to the Axi TrafGen instance to be
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* worked on.
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*
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* @return None
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*
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* @note C-style signature:
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* void XTrafGen_StartMasterLogic(XTrafGen *InstancePtr)
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*
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*****************************************************************************/
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#define XTrafGen_StartMasterLogic(InstancePtr) \
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XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET, \
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(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET) | XTG_MCNTL_MSTEN_MASK))
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/****************************************************************************/
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/**
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*
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* XTrafGen_IsMasterLogicDone checks for traffic generator master logic
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* completed bit.
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*
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* @param InstancePtr is a pointer to the Axi TrafGen instance to be
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* worked on.
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*
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* @return TRUE if master logic completed.
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* FALSE if master logic not completed.
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*
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* @note C-style signature:
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* u8 XTrafGen_IsMasterLogicDone(XTrafGen *InstancePtr)
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*
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*****************************************************************************/
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#define XTrafGen_IsMasterLogicDone(InstancePtr) \
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((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET) & XTG_MCNTL_MSTEN_MASK) ? \
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FALSE : TRUE)
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/****************************************************************************/
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/**
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*
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* XTrafGen_LoopEnable loops through the command set created using CMDRAM and
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* PARAMRAM indefinitely in Advanced mode/Basic mode of ATG.
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*
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* @param InstancePtr is a pointer to the Axi TrafGen instance to be
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* worked on.
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*
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* @return None
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*
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* @note C-style signature:
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* void XTrafGen_LoopEnable(XTrafGen *InstancePtr)
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*
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*****************************************************************************/
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#define XTrafGen_LoopEnable(InstancePtr) \
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XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET, \
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(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET) | XTG_MCNTL_LOOPEN_MASK))
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/****************************************************************************/
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/**
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*
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* XTrafGen_LoopDisable Disbales the loop bit in Master control regiset in
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* Advanced mode/Basic mode of ATG.
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*
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* @param InstancePtr is a pointer to the Axi TrafGen instance to be
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* worked on.
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*
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* @return None
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*
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* @note C-style signature:
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* void XTrafGen_LoopDisable(XTrafGen *InstancePtr)
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*
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*****************************************************************************/
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#define XTrafGen_LoopDisable(InstancePtr) \
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XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET, \
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(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
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XTG_MCNTL_OFFSET) & ~XTG_MCNTL_LOOPEN_MASK))
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/****************************************************************************/
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/**
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|
*
|
|
* XTrafGen_WriteSlaveControlReg enables control bits of Slave Control
|
|
* Register. This API will write the value passed from the user.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the Slave Control Register value to set
|
|
*
|
|
* @return None
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_WriteSlaveControlReg(XTrafGen *InstancePtr,
|
|
* u32 Value)
|
|
*****************************************************************************/
|
|
#define XTrafGen_WriteSlaveControlReg(InstancePtr, Value) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_SCNTL_OFFSET, Value)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_CheckforMasterComplete checks for master complete.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return TRUE if master complete bit is set.
|
|
* FALSE if master complete bit is not set.
|
|
*
|
|
* @note C-style signature:
|
|
* u8 XTrafGen_CheckforMasterComplete(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_CheckforMasterComplete(InstancePtr) \
|
|
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_STS_OFFSET) & XTG_ERR_MSTCMP_MASK) ? TRUE : FALSE)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_ReadErrors read master and slave errors.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Both Master and Slave error value.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XTrafGen_ReadErrors(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_ReadErrors(InstancePtr) \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_STS_OFFSET) & XTG_ERR_ALL_ERR_MASK)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_EnableMasterCmpInterrupt enables Master logic complete bit.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_EnableMasterCmpInterrupt(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_EnableMasterCmpInterrupt(InstancePtr) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_EN_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_EN_OFFSET) | \
|
|
XTG_ERR_MSTCMP_MASK))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_ClearMasterCmpInterrupt clear Master logic complete interrupt bit.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* u8 XTrafGen_ClearMasterCmpInterrupt(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_ClearMasterCmpInterrupt(InstancePtr) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_STS_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_STS_OFFSET) | \
|
|
XTG_ERR_MSTCMP_MASK))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_ClearErrors clear errors specified in <i>Mask</i>.
|
|
* The corresponding error for each bit set to 1 in <i>Mask</i>, will be
|
|
* enabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Mask contains a bit mask of the errors to clear. The mask
|
|
* can be formed using a set of bit wise or'd values from the
|
|
* definitions in xtrafgen_hw.h file.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_ClearErrors(XTrafGen *InstancePtr,
|
|
* u32 Mask)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_ClearErrors(InstancePtr, Mask) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_STS_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_STS_OFFSET) | Mask))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_EnableErrors enable errors specified in <i>Mask</i>. The
|
|
* corresponding error for each bit set to 1 in <i>Mask</i>, will be
|
|
* enabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Mask contains a bit mask of the errors to enable. The mask
|
|
* can be formed using a set of bit wise or'd values from the
|
|
* definitions in xtrafgen_hw.h file.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_EnableErrors(XTrafGen *InstancePtr,
|
|
* u32 Mask)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_EnableErrors(InstancePtr, Mask) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_EN_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_ERR_EN_OFFSET) | Mask))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_MasterErrIntrEnable enables Global Master error bit.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_MasterErrIntrEnable(XTrafGen *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XTrafGen_MasterErrIntrEnable(InstancePtr) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_MSTERR_INTR_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_MSTERR_INTR_OFFSET) | \
|
|
XTG_MSTERR_INTR_MINTREN_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_MasterErrIntrDisable disables Global Master error bit.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_MasterErrIntrDisable(XTrafGen *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XTrafGen_MasterErrIntrDisable(InstancePtr) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_MSTERR_INTR_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_MSTERR_INTR_OFFSET) & \
|
|
~XTG_MSTERR_INTR_MINTREN_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SlaveErrIntrEnable enables Global Slave error bit.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SlaveErrIntrEnable(XTrafGen *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XTrafGen_SlaveErrIntrEnable(InstancePtr) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_SCNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_SCNTL_OFFSET) | XTG_SCNTL_ERREN_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SlaveErrIntrDisable disables Global Slave error bit.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SlaveErrIntrDisable(XTrafGen *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XTrafGen_SlaveErrIntrDisable(InstancePtr) \
|
|
XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_SCNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_SCNTL_OFFSET) & \
|
|
~XTG_SCNTL_ERREN_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_ReadConfigStatus reads Config status register.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Config Status Register value
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XTrafGen_ReadConfigStatus(XTrafGen *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XTrafGen_ReadConfigStatus(InstancePtr) \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_CFG_STS_OFFSET))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_StaticEnable enable the traffic genration when the core is
|
|
* configured Static Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_StaticEnable(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_StaticEnable(InstancePtr) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET) | XTG_STATIC_CNTL_STEN_MASK)))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_StaticDisable disables the traffic genration on the Axi TrafGen
|
|
* when the core is configured in Static Mode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_StaticDisable(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_StaticDisable(InstancePtr) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_RESET_MASK)))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_StaticVersion returns the version value for the Axi TrafGen
|
|
* When configured in Static Mode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Static version value.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XTrafGen_StaticVersion(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_StaticVersion(InstancePtr) \
|
|
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_VER_MASK) >> \
|
|
XTG_STATIC_CNTL_VER_SHIFT )
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStaticBurstLen Configures the Burst Length for AxiTrafGen
|
|
* In Static Mode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the Burst length to set in the Static length register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStaticBurstLen(XTrafGen *InstancePtr,
|
|
* u32 Value)
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStaticBurstLen(InstancePtr,Value) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_LEN_OFFSET,Value))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_GetStaticBurstLen Gets the Burst Length for AxiTrafGen in StaticMode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Burst length value.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XTrafGen_GetStaticBurstLen(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_GetStaticBurstLen(InstancePtr) \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_LEN_OFFSET))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_GetStaticTransferDone gets the state of Transfer done bit
|
|
* in Control register When the TraficGen is configured in Static Mode.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Value of the Tranfer Done bit.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XTrafGen_GetStaticTransferDone(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_GetStaticTransferDone(InstancePtr) \
|
|
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET)) & XTG_STATIC_CNTL_TD_MASK)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStaticTransferDone sets the Transfer done bit in Control register
|
|
* When AxiTrafGen is Configured in Static Mode.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStaticTransferDone(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStaticTransferDone(InstancePtr) \
|
|
XTrafGen_WriteReg(InstancePtr->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET) | XTG_STATIC_CNTL_TD_MASK))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_IsStaticTransferDone checks for reset value When Static Traffic genration
|
|
* Completed by reading Control Register.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return TRUE if reset Success full
|
|
* FALSE if failed to reset
|
|
*
|
|
* @note C-style signature:
|
|
* u8 XTrafGen_IsStaticTransferDone(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_IsStaticTransferDone(InstancePtr) \
|
|
(((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STATIC_CNTL_OFFSET) & XTG_STATIC_CNTL_TD_MASK) == \
|
|
XTG_STATIC_CNTL_RESET_MASK) ? \
|
|
TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_StreamEnable enable the traffic genration on the Axi TrafGen
|
|
* When the core is configured in Streaming Mode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_StreamEnable(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_StreamEnable(InstancePtr) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET) | XTG_STREAM_CNTL_STEN_MASK)))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_StreamDisable Disable the traffic genration on the Axi TrafGen
|
|
* When core is configured in Streaming Mode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_StreamDisable(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_StreamDisable(InstancePtr) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_RESET_MASK)))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_StreamVersion returns the version value for the Axi TrafGen
|
|
* When configured in Streaming Mode
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Streaming Version Value.
|
|
*
|
|
* @note C-style signature:
|
|
* u8 XTrafGen_StreamVersion(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_StreamVersion(InstancePtr) \
|
|
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_VER_MASK) \
|
|
>> XTG_STREAM_CNTL_VER_SHIFT )
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStreamingTransLen Configures the length of transaction for
|
|
* AxiTrafGen in Streaming Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the transfer length to set in the transfer length
|
|
* Register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStreamingTransLen(XTrafGen *InstancePtr,
|
|
* u32 Value)
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStreamingTransLen(InstancePtr,Value) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET) | Value)))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_GetStreamingTransLen Gets the length of transaction for
|
|
* AxiTrafGen in Streaming Mode
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Transfer Length value.
|
|
*
|
|
* @note C-style signature:
|
|
* u16 XTrafGen_GetStreamingTransLen(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_GetStreamingTransLen(InstancePtr) \
|
|
(XTrafGen_ReadReg(InstancePtr->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET)& XTG_STREAM_TL_TLEN_MASK)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_GetStreamingTransCnt Gets the transfer count for AxiTrafGen in
|
|
* Streaming Mode
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Transfer Count value.
|
|
*
|
|
* @note C-style signature:
|
|
* u16 XTrafGen_GetStreamingTransCnt(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_GetStreamingTransCnt(InstancePtr) \
|
|
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET ) & XTG_STREAM_TL_TCNT_MASK) \
|
|
>> XTG_STREAM_TL_TCNT_SHIFT)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStreamingRandomLen Configures the random transaction length
|
|
* for AxiTrafGen in Streaming Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the random length that's need to be Configure in the
|
|
* Streaming Config register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStreamingRandomLen(XTrafGen *InstancePtr,
|
|
* u32 Value)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStreamingRandomLen(InstancePtr,Value) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET) | Value)))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_GetStreamingProgDelay Gets the Programmable Delay for AxiTrafGen in
|
|
* Streaming Mode.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return Propagation Delay Value
|
|
*
|
|
* @note C-style signature:
|
|
* u16 XTrafGen_GetProgDelay(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_GetStreamingProgDelay(InstancePtr) \
|
|
((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET ) \
|
|
& XTG_STREAM_CFG_PDLY_MASK) >> XTG_STREAM_CFG_PDLY_SHIFT)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStreamingTransCnt Configures the transfer count for
|
|
* AxiTrafGen in Streaming Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the transfer length that needs to be configured in
|
|
* Transfer length register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStreamingTransCnt(XTrafGen *InstancePtr,
|
|
* u32 Value)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStreamingTransCnt(InstancePtr, Value) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_TL_OFFSET) |((Value << XTG_STREAM_TL_TCNT_SHIFT) \
|
|
& XTG_STREAM_TL_TCNT_MASK))))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStreamingProgDelay Configures the Programmable Delay for
|
|
* AxiTrafGen in Streaming Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the value that's need to be configure in the Stream
|
|
* Config Register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStreamingProgDelay(XTrafGen *InstancePtr,
|
|
* u32 Value)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStreamingProgDelay(InstancePtr, Value) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET)|(Value << XTG_STREAM_CFG_PDLY_SHIFT)) \
|
|
& XTG_STREAM_CFG_PDLY_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetStreamingTdestPort Configures the Value to drive on TDEST port
|
|
* for Axi TrafGen in Streaming Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
* @param Value is the Port value that's need to be set.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStreamingTdestPort(XTrafGen *InstancePtr,
|
|
* u8 Value)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStreamingTdestPort(InstancePtr, Value) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET)|(Value << XTG_STREAM_CFG_TDEST_SHIFT)) \
|
|
& XTG_STREAM_CFG_TDEST_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_SetTransferDone sets the Transfer done bit in Control register
|
|
* When AxiTrafGen is Configured in Streaming Mode.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_SetStreamingTransferDone(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_SetStreamingTransferDone(InstancePtr) \
|
|
XTrafGen_WriteReg(InstancePtr->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET) | XTG_STREAM_CNTL_TD_MASK))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_IsStreamingTransferDone checks for reset value When Streaming Traffic
|
|
* genration is Completed by reading Stream Control Register.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return TRUE if reset Success full
|
|
* FALSE if failed to reset
|
|
*
|
|
* @note C-style signature:
|
|
* u8 XTrafGen_IsStreamingTransferDone(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_IsStreamingTransferDone(InstancePtr) \
|
|
(((XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CNTL_OFFSET) & XTG_STREAM_CNTL_TD_MASK) == \
|
|
XTG_STREAM_CNTL_RESET_MASK) ? \
|
|
TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XTrafGen_ResetStreamingRandomLen resets the random transaction length
|
|
* for AxiTrafGen in Streaming Mode.
|
|
* @param InstancePtr is a pointer to the Axi TrafGen instance to be
|
|
* worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XTrafGen_ResetStreamingRandomLen(XTrafGen *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XTrafGen_ResetStreamingRandomLen(InstancePtr) \
|
|
(XTrafGen_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET, \
|
|
(XTrafGen_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XTG_STREAM_CFG_OFFSET) & ~XTG_STREAM_CFG_RANDL_MASK)))
|
|
|
|
/************************** Function Prototypes ******************************/
|
|
|
|
/*
|
|
* Initialization and control functions in xtrafgen.c
|
|
*/
|
|
int XTrafGen_CfgInitialize(XTrafGen * InstancePtr,
|
|
XTrafGen_Config *Config, u32 EffectiveAddress);
|
|
XTrafGen_Config *XTrafGen_LookupConfig(u32 DeviceId);
|
|
int XTrafGen_AddCommand(XTrafGen *InstancePtr, XTrafGen_Cmd *CmdPtr);
|
|
int XTrafGen_GetLastValidIndex(XTrafGen *InstancePtr, u32 RdWrFlag);
|
|
int XTrafGen_WriteCmdsToHw(XTrafGen *InstancePtr);
|
|
void XTrafGen_AccessMasterRam(XTrafGen *InstancePtr, u32 Offset,
|
|
int Length, u8 Write, u32 *Data);
|
|
void XTrafGen_PrintCmds(XTrafGen *InstancePtr);
|
|
int XTrafGen_EraseAllCommands(XTrafGen *InstancePtr);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* end of protection macro */
|