8296dcd0f1
This patch modifies the code according to MISRA-C 2012 and added support for ZynqMP. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
692 lines
28 KiB
C
692 lines
28 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xspips.h
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*
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* This file contains the implementation of the XSpiPs driver. It works for
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* both the master and slave mode. User documentation for the driver functions
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* is contained in this file in the form of comment blocks at the front of each
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* function.
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*
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* An SPI device connects to an SPI bus through a 4-wire serial interface.
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* The SPI bus is a full-duplex, synchronous bus that facilitates communication
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* between one master and one slave. The device is always full-duplex,
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* which means that for every byte sent, one is received, and vice-versa.
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* The master controls the clock, so it can regulate when it wants to
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* send or receive data. The slave is under control of the master, it must
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* respond quickly since it has no control of the clock and must send/receive
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* data as fast or as slow as the master does.
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*
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* <b>Initialization & Configuration</b>
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*
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* The XSpiPs_Config structure is used by the driver to configure itself. This
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* configuration structure is typically created by the tool-chain based on HW
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* build properties.
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*
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* To support multiple runtime loading and initialization strategies employed by
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* various operating systems, the driver instance can be initialized in the
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* following way:
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* - XSpiPs_LookupConfig(DeviceId) - Use the devide identifier to find the
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* static configuration structure defined in xspips_g.c. This is setup by
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* the tools. For some operating systems the config structure will be
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* initialized by the software and this call is not needed.
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* - XSpiPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
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* configuration structure provided by the caller. If running in a system
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* with address translation, the provided virtual memory base address
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* replaces the physical address present in the configuration structure.
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*
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* <b>Multiple Masters</b>
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*
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* More than one master can exist, but arbitration is the responsibility of
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* the higher layer software. The device driver does not perform any type of
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* arbitration.
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*
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* <b>Multiple Slaves</b>
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*
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* Contention between multiple masters is detected by the hardware, in which
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* case a mode fault occurs on the device. The device is disabled immediately
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* by hardware, and the current word transfer is stopped. The Aborted word
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* transfer due to the mode fault is resumed once the devie is enabled again.
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*
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* <b>Modes of Operation</b>
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*
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* There are four modes to perform a data transfer and the selection of a mode
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* is based on Chip Select(CS) and Start. These two options individually, can
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* be controlled either by software(Manual) or hardware(Auto).
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* - Auto CS: Chip select is automatically asserted as soon as the first word
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* is written into the TXFIFO and deasserted when the TXFIFO becomes
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* empty
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* - Manual CS: Software must assert and deassert CS.
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* - Auto Start: Data transmission starts as soon as there is data in the
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* TXFIFO and stalls when the TXFIFO is empty
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* - Manual Start: Software must start data transmission at the beginning of
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* the transaction or whenever the TXFIFO has become empty
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*
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* The preferred combination is Manual CS and Auto Start.
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* In this combination, the software asserts CS before loading any data into
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* TXFIFO. In Auto Start mode, whenever data is in TXFIFO, controller sends it
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* out until TXFIFO becomes empty. The software reads the RXFIFO whenever the
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* data is available. If no further data, software disables CS.
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*
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* Risks/challenges of other combinations:
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* - Manual CS and Manual Start: Manual Start bit should be set after each
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* TXFIFO write otherwise there could be a race condition where the TXFIFO
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* becomes empty before the new word is written. In that case the
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* transmission stops.
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* - Auto CS with Manual or Auto Start: It is very difficult for software to
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* keep the TXFIFO filled. Whenever the TXFIFO runs empty, CS is deasserted.
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* This results in a single transaction to be split into multiple pieces each
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* with its own chip select. This will result in garbage data to be sent.
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*
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* <b>Interrupts</b>
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*
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* The user must connect the interrupt handler of the driver,
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* XSpiPs_InterruptHandler, to an interrupt system such that it will be
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* called when an interrupt occurs. This function does not save and restore
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* the processor context such that the user must provide this processing.
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*
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* The driver handles the following interrupts:
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* - Data Transmit Register/FIFO Underflow
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* - Data Receive Register/FIFO Full
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* - Data Receive Register/FIFO Not Empty
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* - Data Transmit Register/FIFO Full
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* - Data Transmit Register/FIFO Overwater
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* - Mode Fault Error
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* - Data Receive Register/FIFO Overrun
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*
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* The Data Transmit Register/FIFO Overwater interrupt -- indicates that the
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* SPI device has transmitted the data available to transmit, and now its data
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* register and FIFO is ready to accept more data. The driver uses this
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* interrupt to indicate progress while sending data. The driver may have
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* more data to send, in which case the data transmit register and FIFO is
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* filled for subsequent transmission. When this interrupt arrives and all
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* the data has been sent, the driver invokes the status callback with a
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* value of XST_SPI_TRANSFER_DONE to inform the upper layer software that
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* all data has been sent.
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*
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* The Data Transmit Register/FIFO Underflow interrupt -- indicates that,
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* as slave, the SPI device was required to transmit but there was no data
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* available to transmit in the transmit register (or FIFO). This may not
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* be an error if the master is not expecting data. But in the case where
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* the master is expecting data, this serves as a notification of such a
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* condition. The driver reports this condition to the upper layer
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* software through the status handler.
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*
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* The Data Receive Register/FIFO Overrun interrupt -- indicates that the SPI
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* device received data and subsequently dropped the data because the data
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* receive register and FIFO was full. The interrupt applies to both master
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* and slave operation. The driver reports this condition to the upper layer
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* software through the status handler. This likely indicates a problem with
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* the higher layer protocol, or a problem with the slave performance.
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*
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* The Mode Fault Error interrupt -- indicates that while configured as a
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* master, the device was selected as a slave by another master. This can be
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* used by the application for arbitration in a multimaster environment or to
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* indicate a problem with arbitration. When this interrupt occurs, the
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* driver invokes the status callback with a status value of
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* XST_SPI_MODE_FAULT. It is up to the application to resolve the conflict.
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* When configured as a slave, Mode Fault Error interrupt indicates that a slave
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* device was selected as a slave by a master, but the slave device was
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* disabled. When configured as a master, Mode Fault Error interrupt indicates
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* that another SPI device is acting as a master on the bus.
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*
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*
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* <b>Polled Operation</b>
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*
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* Transfer in polled mode is supported through a separate interface function
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* XSpiPs_PolledTransfer(). Unlike the transfer function in the interrupt mode,
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* this function blocks until all data has been sent/received.
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*
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* <b>Device Busy</b>
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*
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* Some operations are disallowed when the device is busy. The driver tracks
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* whether a device is busy. The device is considered busy when a data transfer
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* request is outstanding, and is considered not busy only when that transfer
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* completes (or is aborted with a mode fault error). This applies to both
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* master and slave devices.
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*
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* <b>Device Configuration</b>
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*
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* The device can be configured in various ways during the FPGA implementation
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* process. Configuration parameters are stored in the xspips_g.c file or
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* passed in via XSpiPs_CfgInitialize(). A table is defined where each entry
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* contains configuration information for an SPI device, including the base
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* address for the device.
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*
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* <b>RTOS Independence</b>
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*
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* This driver is intended to be RTOS and processor independent. It works with
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* physical addresses only. Any needs for dynamic memory management, threads or
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* thread mutual exclusion, virtual memory, or cache control must be satisfied
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* by the layer above this driver.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ------ -------- -----------------------------------------------
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* 1.00 drg/jz 01/25/10 First release
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* 1.00 sdm 10/25/11 Removed the Divide by 2 in the SPI Clock Prescaler
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* options as this is not supported in the device.
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* 1.01 sg 03/07/12 Updated the code to always clear the relevant bits
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* before writing to config register.
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* Always clear the slave select bits before write and
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* clear the bits to no slave at the end of transfer
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* Modified the Polled transfer transmit/receive logic.
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* Tx should wait on TXOW Interrupt and Rx on RXNEMTY.
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* 1.02 sg 05/31/12 Updated XSPIPS_FIFO_DEPTH to 128 from 32 to match HW
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* for CR 658289
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* 1.03 sg 09/21/12 Added memory barrier dmb in polled transfer and
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* interrupt handler to overcome the clock domain
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* crossing issue in the controller. For CR #679252.
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* 1.04a sg 01/30/13 Created XSPIPS_MANUAL_START_OPTION. Created macros
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* XSpiPs_IsMaster, XSpiPs_IsManualStart and
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* XSpiPs_IsManualChipSelect. Changed SPI
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* Enable/Disable macro argument from BaseAddress to
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* Instance Pointer. Added DelayNss argument to SetDelays
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* and GetDelays API's. Added macros to set/get the
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* RX Watermark value.Created macros XSpiPs_IsMaster,
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* XSpiPs_IsManualStart and XSpiPs_IsManualChipSelect.
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* Changed SPI transfer logic for polled and interrupt
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* modes to be based on filled tx fifo count and receive
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* based on it. RXNEMPTY interrupt is not used.
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* SetSlaveSelect API logic is modified to drive the bit
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* position low based on the slave select value
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* requested. GetSlaveSelect API will return the value
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* based on bit position that is low.
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* Created XSPIPS_CR_MODF_GEN_EN_MASK macro and added it
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* to XSPIPS_CR_RESET_STATE. Created
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* XSPIPS_IXR_WR_TO_CLR_MASK for interrupts which need
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* write-to-clear. Added shift and mask macros for d_nss
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* parameter. Added Rx Watermark mask.
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* 1.05a hk 26/04/13 Added disable and enable in XSpiPs_SetOptions when
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* CPOL/CPHA bits are set/reset. Fix for CR#707669.
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* 1.06a hk 08/22/13 Changed GetSlaveSelect function. CR# 727866.
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* Added masking ConfigReg before writing in SetSlaveSel
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* Added extended slave select support - CR#722569.
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* Added prototypes of reset API and related constant
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* definitions.
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* Added check for MODF in polled transfer function.
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* 3.0 vm 12/09/14 Modified driver source code for MISRA-C:2012 compliance.
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* Support for Zynq Ultrascale Mp added.
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*
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* </pre>
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*
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******************************************************************************/
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#ifndef XSPIPS_H /* prevent circular inclusions */
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#define XSPIPS_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xstatus.h"
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#include "xspips_hw.h"
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/************************** Constant Definitions *****************************/
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/** @name Configuration options
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*
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* The following options are supported to enable/disable certain features of
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* an SPI device. Each of the options is a bit mask, so more than one may be
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* specified.
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*
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* <b>The Master option</b> configures the SPI device as a master.
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* By default, the device is a slave.
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*
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* The <b>Active Low Clock option</b> configures the device's clock polarity.
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* Setting this option means the clock is active low and the SCK signal idles
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* high. By default, the clock is active high and SCK idles low.
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*
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* The <b>Clock Phase option</b> configures the SPI device for one of two
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* transfer formats. A clock phase of 0, the default, means data is valid on
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* the first SCK edge (rising or falling) after the slave select (SS) signal
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* has been asserted. A clock phase of 1 means data is valid on the second SCK
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* edge (rising or falling) after SS has been asserted.
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*
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* The <b>Slave Select Decode Enable option</b> selects how the SPI_SS_outN are
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* controlled by the SPI Slave Select Decode bits.
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* 0: Use this setting for the standard configuration of up to three slave
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* select outputs. Only one of the three slave select outputs will be low.
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* (Default)
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* 1: Use this setting for the optional configuration of an additional decoder
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* to support 8 slave select outputs. SPI_SS_outN reflects the value in the
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* register.
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*
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* The <b>SPI Force Slave Select option</b> is used to enable manual control of
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* the signals SPI_SS_outN.
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* 0: The SPI_SS_outN signals are controlled by the SPI controller during
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* transfers. (Default)
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* 1: The SPI_SS_outN signal indicated by the Slave Select Control bit is
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* forced active (driven low) regardless of any transfers in progress.
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*
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* NOTE: The driver will handle setting and clearing the Slave Select when
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* the user sets the "FORCE_SSELECT_OPTION". Using this option will allow the
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* SPI clock to be set to a faster speed. If the SPI clock is too fast, the
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* processor cannot empty and refill the FIFOs before the TX FIFO is empty
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* When the SPI hardware is controlling the Slave Select signals, this
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* will cause slave to be de-selected and terminate the transfer.
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*
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* The <b>Manual Start option</b> is used to enable manual control of
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* the Start command to perform data transfer.
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* 0: The Start command is controlled by the SPI controller during
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* transfers(Default). Data transmission starts as soon as there is data in
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* the TXFIFO and stalls when the TXFIFO is empty
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* 1: The Start command must be issued by software to perform data transfer.
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* Bit 15 of Configuration register is used to issue Start command. This bit
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* must be set whenever TXFIFO is filled with new data.
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*
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* NOTE: The driver will set the Manual Start Enable bit in Configuration
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* Register, if Manual Start option is selected. Software will issue
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* Manual Start command whenever TXFIFO is filled with data. When there is
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* no further data, driver will clear the Manual Start Enable bit.
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*
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* @{
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*/
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#define XSPIPS_MASTER_OPTION 0x00000001U /**< Master mode option */
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#define XSPIPS_CLK_ACTIVE_LOW_OPTION 0x00000002U /**< Active Low Clock option */
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#define XSPIPS_CLK_PHASE_1_OPTION 0x00000004U /**< Clock Phase one option */
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#define XSPIPS_DECODE_SSELECT_OPTION 0x00000008U /**< Select 16 slaves Option */
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#define XSPIPS_FORCE_SSELECT_OPTION 0x00000010U /**< Force Slave Select */
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#define XSPIPS_MANUAL_START_OPTION 0x00000020U /**< Manual Start mode option */
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/*@}*/
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/** @name SPI Clock Prescaler options
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* The SPI Clock Prescaler Configuration bits are used to program master mode
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* bit rate. The bit rate can be programmed in divide-by-two decrements from
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* pclk/4 to pclk/256.
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*
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* @{
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*/
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#define XSPIPS_CLK_PRESCALE_4 0x01U /**< PCLK/4 Prescaler */
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#define XSPIPS_CLK_PRESCALE_8 0x02U /**< PCLK/8 Prescaler */
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#define XSPIPS_CLK_PRESCALE_16 0x03U /**< PCLK/16 Prescaler */
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#define XSPIPS_CLK_PRESCALE_32 0x04U /**< PCLK/32 Prescaler */
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#define XSPIPS_CLK_PRESCALE_64 0x05U /**< PCLK/64 Prescaler */
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#define XSPIPS_CLK_PRESCALE_128 0x06U /**< PCLK/128 Prescaler */
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#define XSPIPS_CLK_PRESCALE_256 0x07U /**< PCLK/256 Prescaler */
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/*@}*/
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/** @name Callback events
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*
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* These constants specify the handler events that are passed to
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* a handler from the driver. These constants are not bit masks such that
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* only one will be passed at a time to the handler.
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*
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* @{
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*/
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#define XSPIPS_EVENT_MODE_FAULT 1U /**< Mode fault error */
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#define XSPIPS_EVENT_TRANSFER_DONE 2U /**< Transfer done */
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#define XSPIPS_EVENT_TRANSMIT_UNDERRUN 3U /**< TX FIFO empty */
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#define XSPIPS_EVENT_RECEIVE_OVERRUN 4U /**< Receive data loss because
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RX FIFO full */
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/*@}*/
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/**************************** Type Definitions *******************************/
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/**
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* The handler data type allows the user to define a callback function to
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* handle the asynchronous processing for the SPI device. The application
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* using this driver is expected to define a handler of this type to support
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* interrupt driven mode. The handler executes in an interrupt context, so
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* only minimal processing should be performed.
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*
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* @param CallBackRef is the callback reference passed in by the upper
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* layer when setting the callback functions, and passed back to
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* the upper layer when the callback is invoked. Its type is
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* not important to the driver, so it is a void pointer.
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* @param StatusEvent holds one or more status events that have occurred.
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* See the XSpiPs_SetStatusHandler() for details on the status
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* events that can be passed in the callback.
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* @param ByteCount indicates how many bytes of data were successfully
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* transferred. This may be less than the number of bytes
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* requested if the status event indicates an error.
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*/
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typedef void (*XSpiPs_StatusHandler) (void *CallBackRef, u32 StatusEvent,
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u32 ByteCount);
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/**
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* This typedef contains configuration information for the device.
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*/
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typedef struct {
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u16 DeviceId; /**< Unique ID of device */
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u32 BaseAddress; /**< Base address of the device */
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u32 InputClockHz; /**< Input clock frequency */
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} XSpiPs_Config;
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/**
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* The XSpiPs driver instance data. The user is required to allocate a
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* variable of this type for every SPI device in the system. A pointer
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* to a variable of this type is then passed to the driver API functions.
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*/
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typedef struct {
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XSpiPs_Config Config; /**< Configuration structure */
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u32 IsReady; /**< Device is initialized and ready */
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u8 *SendBufferPtr; /**< Buffer to send (state) */
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u8 *RecvBufferPtr; /**< Buffer to receive (state) */
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u32 RequestedBytes; /**< Number of bytes to transfer (state) */
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u32 RemainingBytes; /**< Number of bytes left to transfer(state) */
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u32 IsBusy; /**< A transfer is in progress (state) */
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u32 SlaveSelect; /**< The slave select value when
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XSPIPS_FORCE_SSELECT_OPTION is set */
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XSpiPs_StatusHandler StatusHandler;
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void *StatusRef; /**< Callback reference for status handler */
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} XSpiPs;
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/***************** Macros (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/*
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*
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* Check in OptionsTable if Manual Start Option is enabled or disabled.
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*
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* @param InstancePtr is a pointer to the XSpiPs instance.
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*
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* @return
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* - TRUE if option is set
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* - FALSE if option is not set
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*
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* @note C-Style signature:
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|
* u8 XSpiPs_IsManualStart(XSpiPs *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_IsManualStart(InstancePtr) \
|
|
(((XSpiPs_GetOptions(InstancePtr) & \
|
|
XSPIPS_MANUAL_START_OPTION) != (u32)0U) ? TRUE : FALSE)
|
|
|
|
/****************************************************************************/
|
|
/*
|
|
*
|
|
* Check in OptionsTable if Manual Chip Select Option is enabled or disabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return
|
|
* - TRUE if option is set
|
|
* - FALSE if option is not set
|
|
*
|
|
* @note C-Style signature:
|
|
* u8 XSpiPs_IsManualChipSelect(XSpiPs *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_IsManualChipSelect(InstancePtr) \
|
|
(((XSpiPs_GetOptions(InstancePtr) & \
|
|
XSPIPS_FORCE_SSELECT_OPTION) != (u32)0U) ? TRUE : FALSE)
|
|
|
|
/****************************************************************************/
|
|
/*
|
|
*
|
|
* Check in OptionsTable if Decode Slave Select option is enabled or disabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return
|
|
* - TRUE if option is set
|
|
* - FALSE if option is not set
|
|
*
|
|
* @note C-Style signature:
|
|
* u8 XSpiPs_IsDecodeSSelect(XSpiPs *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_IsDecodeSSelect(InstancePtr) \
|
|
(((XSpiPs_GetOptions(InstancePtr) & \
|
|
XSPIPS_DECODE_SSELECT_OPTION) != (u32)0U) ? TRUE : FALSE)
|
|
|
|
/****************************************************************************/
|
|
/*
|
|
*
|
|
* Check in OptionsTable if Master Option is enabled or disabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return
|
|
* - TRUE if option is set
|
|
* - FALSE if option is not set
|
|
*
|
|
* @note C-Style signature:
|
|
* u8 XSpiPs_IsMaster(XSpiPs *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_IsMaster(InstancePtr) \
|
|
(((XSpiPs_GetOptions(InstancePtr) & \
|
|
XSPIPS_MASTER_OPTION) != (u32)0U) ? TRUE : FALSE)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Set the contents of the slave idle count register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
* @param RegisterValue is the value to be writen, valid values are
|
|
* 0-255.
|
|
*
|
|
* @return None
|
|
*
|
|
* @note
|
|
* C-Style signature:
|
|
* void XSpiPs_SetSlaveIdle(XSpiPs *InstancePtr, u32 RegisterValue)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_SetSlaveIdle(InstancePtr, RegisterValue) \
|
|
XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + \
|
|
XSPIPS_SICR_OFFSET, (RegisterValue))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the slave idle count register. Use the XSPIPS_SICR_*
|
|
* constants defined in xspips_hw.h to interpret the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return 8-bit value representing the contents of the SIC register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpiPs_GetSlaveIdle(XSpiPs *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_GetSlaveIdle(InstancePtr) \
|
|
XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + \
|
|
XSPIPS_SICR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Set the contents of the transmit FIFO watermark register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
* @param RegisterValue is the value to be written, valid values
|
|
* are 1-128.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note
|
|
* C-Style signature:
|
|
* void XSpiPs_SetTXWatermark(XSpiPs *InstancePtr, u32 RegisterValue)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_SetTXWatermark(InstancePtr, RegisterValue) \
|
|
XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + \
|
|
XSPIPS_TXWR_OFFSET, (RegisterValue))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the transmit FIFO watermark register.
|
|
* Use the XSPIPS_TXWR_* constants defined xspips_hw.h to interpret
|
|
* the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return 8-bit value representing the contents of the TXWR register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpiPs_GetTXWatermark(u32 *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_GetTXWatermark(InstancePtr) \
|
|
XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + XSPIPS_TXWR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Set the contents of the receive FIFO watermark register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
* @param RegisterValue is the value to be written, valid values
|
|
* are 1-128.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note
|
|
* C-Style signature:
|
|
* void XSpiPs_SetRXWatermark(XSpiPs *InstancePtr, u32 RegisterValue)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_SetRXWatermark(InstancePtr, RegisterValue) \
|
|
XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + \
|
|
XSPIPS_RXWR_OFFSET, (RegisterValue))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the receive FIFO watermark register.
|
|
* Use the XSPIPS_RXWR_* constants defined xspips_hw.h to interpret
|
|
* the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return A 8-bit value representing the contents of the RXWR register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpiPs_GetRXWatermark(u32 *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_GetRXWatermark(InstancePtr) \
|
|
XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + XSPIPS_RXWR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Enable the device and uninhibit master transactions.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpiPs_Enable(u32 *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_Enable(InstancePtr) \
|
|
XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + XSPIPS_ER_OFFSET, \
|
|
XSPIPS_ER_ENABLE_MASK)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Disable the device.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpiPs instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpiPs_Disable(u32 *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpiPs_Disable(InstancePtr) \
|
|
XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + XSPIPS_ER_OFFSET, 0U)
|
|
|
|
/************************** Function Prototypes ******************************/
|
|
|
|
/*
|
|
* Initialization function, implemented in xspips_sinit.c
|
|
*/
|
|
XSpiPs_Config *XSpiPs_LookupConfig(u16 DeviceId);
|
|
|
|
/*
|
|
* Functions implemented in xspips.c
|
|
*/
|
|
s32 XSpiPs_CfgInitialize(XSpiPs *InstancePtr, XSpiPs_Config * ConfigPtr,
|
|
u32 EffectiveAddr);
|
|
|
|
void XSpiPs_Reset(XSpiPs *InstancePtr);
|
|
|
|
s32 XSpiPs_Transfer(XSpiPs *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr,
|
|
u32 ByteCount);
|
|
|
|
s32 XSpiPs_PolledTransfer(XSpiPs *InstancePtr, u8 *SendBufPtr,
|
|
u8 *RecvBufPtr, u32 ByteCount);
|
|
|
|
void XSpiPs_SetStatusHandler(XSpiPs *InstancePtr, void *CallBackRef,
|
|
XSpiPs_StatusHandler FunctionPtr);
|
|
void XSpiPs_InterruptHandler(XSpiPs *InstancePtr);
|
|
|
|
void XSpiPs_Abort(XSpiPs *InstancePtr);
|
|
|
|
s32 XSpiPs_SetSlaveSelect(XSpiPs *InstancePtr, u8 SlaveSel);
|
|
u8 XSpiPs_GetSlaveSelect(XSpiPs *InstancePtr);
|
|
|
|
/*
|
|
* Functions for selftest, in xspips_selftest.c
|
|
*/
|
|
s32 XSpiPs_SelfTest(XSpiPs *InstancePtr);
|
|
|
|
/*
|
|
* Functions for options, in xspips_options.c
|
|
*/
|
|
s32 XSpiPs_SetOptions(XSpiPs *InstancePtr, u32 Options);
|
|
u32 XSpiPs_GetOptions(XSpiPs *InstancePtr);
|
|
|
|
s32 XSpiPs_SetClkPrescaler(XSpiPs *InstancePtr, u8 Prescaler);
|
|
u8 XSpiPs_GetClkPrescaler(XSpiPs *InstancePtr);
|
|
|
|
s32 XSpiPs_SetDelays(XSpiPs *InstancePtr, u8 DelayNss, u8 DelayBtwn,
|
|
u8 DelayAfter, u8 DelayInit);
|
|
void XSpiPs_GetDelays(XSpiPs *InstancePtr, u8 *DelayNss, u8 *DelayBtwn,
|
|
u8 *DelayAfter, u8 *DelayInit);
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* end of protection macro */
|
|
|