3b3bd69fa5
This patch modifies wdtps for misrac rules. Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
189 lines
6.4 KiB
C
Executable file
189 lines
6.4 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xwdtps_hw.h
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*
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* This file contains the hardware interface to the System Watch Dog Timer (WDT).
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ------ -------- ---------------------------------------------
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* 1.00a ecm/jz 01/15/10 First release
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* 1.02a sg 07/15/12 Removed defines related to External Signal
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* Length functionality for CR 658287
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* </pre>
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*
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******************************************************************************/
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#ifndef XWDTPS_HW_H /* prevent circular inclusions */
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#define XWDTPS_HW_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xil_io.h"
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/************************** Constant Definitions *****************************/
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/** @name Register Map
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* Offsets of registers from the start of the device
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* @{
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*/
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#define XWDTPS_ZMR_OFFSET 0x00000000U /**< Zero Mode Register */
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#define XWDTPS_CCR_OFFSET 0x00000004U /**< Counter Control Register */
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#define XWDTPS_RESTART_OFFSET 0x00000008U /**< Restart Register */
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#define XWDTPS_SR_OFFSET 0x0000000CU /**< Status Register */
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/* @} */
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/** @name Zero Mode Register
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* This register controls how the time out is indicated and also contains
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* the access code (0xABC) to allow writes to the register
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* @{
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*/
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#define XWDTPS_ZMR_WDEN_MASK 0x00000001U /**< enable the WDT */
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#define XWDTPS_ZMR_RSTEN_MASK 0x00000002U /**< enable the reset output */
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#define XWDTPS_ZMR_IRQEN_MASK 0x00000004U /**< enable the IRQ output */
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#define XWDTPS_ZMR_RSTLN_MASK 0x00000070U /**< set length of reset pulse */
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#define XWDTPS_ZMR_RSTLN_SHIFT 4U /**< shift for reset pulse */
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#define XWDTPS_ZMR_IRQLN_MASK 0x00000180U /**< set length of interrupt pulse */
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#define XWDTPS_ZMR_IRQLN_SHIFT 7U /**< shift for interrupt pulse */
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#define XWDTPS_ZMR_ZKEY_MASK 0x00FFF000U /**< mask for writing access key */
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#define XWDTPS_ZMR_ZKEY_VAL 0x00ABC000U /**< access key, 0xABC << 12 */
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/* @} */
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/** @name Counter Control register
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* This register controls how fast the timer runs and the reset value
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* and also contains the access code (0x248) to allow writes to the
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* register
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* @{
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*/
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#define XWDTPS_CCR_CLKSEL_MASK 0x00000003U /**< counter clock prescale */
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#define XWDTPS_CCR_CRV_MASK 0x00003FFCU /**< counter reset value */
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#define XWDTPS_CCR_CRV_SHIFT 2U /**< shift for writing value */
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#define XWDTPS_CCR_CKEY_MASK 0x03FFC000U /**< mask for writing access key */
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#define XWDTPS_CCR_CKEY_VAL 0x00920000U /**< access key, 0x248 << 14 */
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/* Bit patterns for Clock prescale divider values */
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#define XWDTPS_CCR_PSCALE_0008 0x00000000U /**< divide clock by 8 */
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#define XWDTPS_CCR_PSCALE_0064 0x00000001U /**< divide clock by 64 */
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#define XWDTPS_CCR_PSCALE_0512 0x00000002U /**< divide clock by 512 */
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#define XWDTPS_CCR_PSCALE_4096 0x00000003U /**< divide clock by 4096 */
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/* @} */
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/** @name Restart register
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* This register resets the timer preventing a timeout. Value is specific
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* 0x1999
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* @{
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*/
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#define XWDTPS_RESTART_KEY_VAL 0x00001999U /**< valid key */
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/*@}*/
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/** @name Status register
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* This register indicates timer reached zero count.
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* @{
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*/
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#define XWDTPS_SR_WDZ_MASK 0x00000001U /**< time out occurred */
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/*@}*/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/**
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*
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* Read the given register.
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*
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* @param BaseAddress is the base address of the device
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* @param RegOffset is the register offset to be read
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*
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* @return The 32-bit value of the register
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*
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* @note C-style signature:
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* u32 XWdtPs_ReadReg(u32 BaseAddress, u32 RegOffset)
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*
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*****************************************************************************/
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#define XWdtPs_ReadReg(BaseAddress, RegOffset) \
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Xil_In32((BaseAddress) + (u32)(RegOffset))
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/****************************************************************************/
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/**
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*
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* Write the given register.
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*
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* @param BaseAddress is the base address of the device
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* @param RegOffset is the register offset to be written
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* @param Data is the 32-bit value to write to the register
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*
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* @return None.
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*
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* @note C-style signature:
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* void XWdtPs_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
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*
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*****************************************************************************/
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#define XWdtPs_WriteReg(BaseAddress, RegOffset, Data) \
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Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif
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