7f5da20b4f
This patch adds the support for Zynq Ultrascale Mp. Modified driver code for MISRA-C:2012 and cleaned up. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
566 lines
22 KiB
C
Executable file
566 lines
22 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xcanps.h
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*
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* The Xilinx CAN driver component. This component supports the Xilinx
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* CAN Controller.
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*
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* The CAN Controller supports the following features:
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* - Confirms to the ISO 11898-1, CAN 2.0A and CAN 2.0B standards.
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* - Supports both Standard (11 bit Identifier) and Extended (29 bit
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* Identifier) frames.
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* - Supports Bit Rates up to 1 Mbps.
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* - Transmit message object FIFO with a user configurable depth of
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* up to 64 message objects.
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* - Transmit prioritization through one TX High Priority Buffer.
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* - Receive message object FIFO with a user configurable depth of
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* up to 64 message objects.
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* - Watermark interrupts for Rx FIFO with configurable Watermark.
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* - Acceptance filtering with 4 acceptance filters.
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* - Sleep mode with automatic wake up.
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* - Loop Back mode for diagnostic applications.
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* - Snoop mode for diagnostic applications.
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* - Maskable Error and Status Interrupts.
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* - Readable Error Counters.
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* - External PHY chip required.
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* - Receive Timestamp.
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*
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* The device driver supports all the features listed above, if applicable.
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*
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* <b>Driver Description</b>
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*
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* The device driver enables higher layer software (e.g., an application) to
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* communicate to the CAN. The driver handles transmission and reception of
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* CAN frames, as well as configuration of the controller. The driver is simply a
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* pass-through mechanism between a protocol stack and the CAN. A single device
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* driver can support multiple CANs.
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*
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* Since the driver is a simple pass-through mechanism between a protocol stack
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* and the CAN, no assembly or disassembly of CAN frames is done at the
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* driver-level. This assumes that the protocol stack passes a correctly
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* formatted CAN frame to the driver for transmission, and that the driver
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* does not validate the contents of an incoming frame
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*
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* <b>Operation Modes</b>
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*
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* The CAN controller supports the following modes of operation:
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* - <b>Configuration Mode</b>: In this mode the CAN timing parameters and
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* Baud Rate Pre-scalar parameters can be changed. In this mode the CAN
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* controller loses synchronization with the CAN bus and drives a
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* constant recessive bit on the bus line. The Error Counter Register are
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* reset. The CAN controller does not receive or transmit any messages
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* even if there are pending transmit requests from the TX FIFO or the TX
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* High Priority Buffer. The Storage FIFOs and the CAN configuration
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* registers are still accessible.
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* - <b>Normal Mode</b>:In Normal Mode the CAN controller participates in bus
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* communication, by transmitting and receiving messages.
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* - <b>Sleep Mode</b>: In Sleep Mode the CAN Controller does not transmit any
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* messages. However, if any other node transmits a message, then the CAN
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* Controller receives the transmitted message and exits from Sleep Mode.
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* If there are new transmission requests from either the TX FIFO or the
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* TX High Priority Buffer when the CAN Controller is in Sleep Mode, these
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* requests are not serviced, and the CAN Controller continues to remain
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* in Sleep Mode. Interrupts are generated when the CAN controller enters
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* Sleep mode or Wakes up from Sleep mode.
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* - <b>Loop Back Mode</b>: In Loop Back mode, the CAN controller transmits a
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* recessive bit stream on to the CAN Bus. Any message that is transmitted
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* is looped back to the <20>Rx<52> line and acknowledged. The CAN controller
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* thus receives any message that it transmits. It does not participate in
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* normal bus communication and does not receive any messages that are
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* transmitted by other CAN nodes. This mode is used for diagnostic
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* purposes.
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* - <b>Snoop Mode</b>: In Snoop mode, the CAN controller transmits a
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* recessive bit stream on to the CAN Bus and does not participate
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* in normal bus communication but receives messages that are transmitted
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* by other CAN nodes. This mode is used for diagnostic purposes.
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*
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*
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* <b>Buffer Alignment</b>
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*
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* It is important to note that frame buffers passed to the driver must be
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* 32-bit aligned.
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*
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* <b>Receive Address Filtering</b>
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*
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* The device can be set to accept frames whose Identifiers match any of the
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* 4 filters set in the Acceptance Filter Mask/ID registers.
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*
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* The incoming Identifier is masked with the bits in the Acceptance Filter Mask
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* Register. This value is compared with the result of masking the bits in the
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* Acceptance Filter ID Register with the Acceptance Filter Mask Register. If
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* both these values are equal, the message will be stored in the RX FIFO.
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*
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* Acceptance Filtering is performed by each of the defined acceptance filters.
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* If the incoming identifier passes through any acceptance filter then the
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* frame is stored in the RX FIFO.
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*
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* If the Accpetance Filters are not set up then all the received messages are
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* stroed in the RX FIFO.
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*
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* <b>PHY Communication</b>
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*
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* This driver does not provide any mechanism for directly programming PHY.
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*
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* <b>Interrupts</b>
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*
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* The driver has no dependencies on the interrupt controller. The driver
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* provides an interrupt handler. User of this driver needs to provide
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* callback functions. An interrupt handler example is available with
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* the driver.
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*
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* <b>Threads</b>
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*
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* This driver is not thread safe. Any needs for threads or thread mutual
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* exclusion must be satisfied by the layer above this driver.
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*
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* <b>Device Reset</b>
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*
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* Bus Off interrupt that can occur in the device requires a device reset.
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* The user is responsible for resetting the device and re-configuring it
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* based on its needs (the driver does not save the current configuration).
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* When integrating into an RTOS, these reset and re-configure obligations are
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* taken care of by the OS adapter software if it exists for that RTOS.
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*
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* <b>Device Configuration</b>
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*
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* The device can be configured in various ways during the FPGA implementation
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* process. Configuration parameters are stored in the xcanps_g.c files.
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* A table is defined where each entry contains configuration information
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* for a CAN device. This information includes such things as the base address
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* of the memory-mapped device.
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*
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* <b>Asserts</b>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining, at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development.
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*
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* <b>Building the driver</b>
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*
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* The XCanPs driver is composed of several source files. This allows the user
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* to build and link only those parts of the driver that are necessary.
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* <br><br>
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ----- -------- -----------------------------------------------
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* 1.00a xd/sv 01/12/10 First release
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* 1.01a bss 12/27/11 Added the APIs XCanPs_SetTxIntrWatermark and
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* XCanPs_GetTxIntrWatermark.
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* Updated the Register/bit definitions
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* Changed XCANPS_RXFWIR_RXFLL_MASK to XCANPS_WIR_FW_MASK
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* Changed XCANPS_RXWIR_OFFSET to XCANPS_WIR_OFFSET
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* Added XCANPS_IXR_TXFEMP_MASK for Tx Fifo Empty
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* Changed XCANPS_IXR_RXFLL_MASK to
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* XCANPS_IXR_RXFWMFLL_MASK
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* Changed
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* XCANPS_TXBUF_ID_OFFSET to XCANPS_TXHPB_ID_OFFSET
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* XCANPS_TXBUF_DLC_OFFSET to XCANPS_TXHPB_DLC_OFFSET
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* XCANPS_TXBUF_DW1_OFFSET to XCANPS_TXHPB_DW1_OFFSET
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* XCANPS_TXBUF_DW2_OFFSET to XCANPS_TXHPB_DW2_OFFSET
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* 2.1 adk 23/08/14 Fixed CR:798792 Peripheral test for CANPS IP in
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* SDK claims a 40kbps baud rate but it's not.
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* 3.0 adk 09/12/14 Added support for Zynq Ultrascale Mp.
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* </pre>
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*
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******************************************************************************/
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#ifndef XCANPS_H /* prevent circular inclusions */
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#define XCANPS_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xstatus.h"
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#include "xcanps_hw.h"
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#include "xil_types.h"
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/************************** Constant Definitions *****************************/
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/** @name CAN operation modes
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* @{
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*/
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#define XCANPS_MODE_CONFIG 0x00000001U /**< Configuration mode */
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#define XCANPS_MODE_NORMAL 0x00000002U /**< Normal mode */
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#define XCANPS_MODE_LOOPBACK 0x00000004U /**< Loop Back mode */
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#define XCANPS_MODE_SLEEP 0x00000008U /**< Sleep mode */
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#define XCANPS_MODE_SNOOP 0x00000010U /**< Snoop mode */
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/* @} */
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/** @name Callback identifiers used as parameters to XCanPs_SetHandler()
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* @{
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*/
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#define XCANPS_HANDLER_SEND 1U /**< Handler type for frame sending interrupt */
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#define XCANPS_HANDLER_RECV 2U /**< Handler type for frame reception interrupt*/
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#define XCANPS_HANDLER_ERROR 3U /**< Handler type for error interrupt */
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#define XCANPS_HANDLER_EVENT 4U /**< Handler type for all other interrupts */
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/* @} */
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/**************************** Type Definitions *******************************/
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/**
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* This typedef contains configuration information for a device.
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*/
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typedef struct {
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u16 DeviceId; /**< Unique ID of device */
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u32 BaseAddr; /**< Register base address */
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} XCanPs_Config;
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/******************************************************************************/
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/**
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* Callback type for frame sending and reception interrupts.
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*
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* @param CallBackRef is a callback reference passed in by the upper layer
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* when setting the callback functions, and passed back to the
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* upper layer when the callback is invoked.
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*******************************************************************************/
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typedef void (*XCanPs_SendRecvHandler) (void *CallBackRef);
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/******************************************************************************/
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/**
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* Callback type for error interrupt.
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*
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* @param CallBackRef is a callback reference passed in by the upper layer
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* when setting the callback functions, and passed back to the
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* upper layer when the callback is invoked.
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* @param ErrorMask is a bit mask indicating the cause of the error. Its
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* value equals 'OR'ing one or more XCANPS_ESR_* values defined in
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* xcanps_hw.h
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*******************************************************************************/
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typedef void (*XCanPs_ErrorHandler) (void *CallBackRef, u32 ErrorMask);
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/******************************************************************************/
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/**
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* Callback type for all kinds of interrupts except sending frame interrupt,
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* receiving frame interrupt, and error interrupt.
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*
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* @param CallBackRef is a callback reference passed in by the upper layer
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* when setting the callback functions, and passed back to the
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* upper layer when the callback is invoked.
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* @param Mask is a bit mask indicating the pending interrupts. Its value
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* equals 'OR'ing one or more XCANPS_IXR_* defined in xcanps_hw.h
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*******************************************************************************/
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typedef void (*XCanPs_EventHandler) (void *CallBackRef, u32 Mask);
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/**
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* The XCanPs driver instance data. The user is required to allocate a
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* variable of this type for every CAN device in the system. A pointer
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* to a variable of this type is then passed to the driver API functions.
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*/
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typedef struct {
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XCanPs_Config CanConfig; /**< Device configuration */
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u32 IsReady; /**< Device is initialized and ready */
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/**
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* Callback and callback reference for TXOK interrupt.
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*/
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XCanPs_SendRecvHandler SendHandler;
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void *SendRef;
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/**
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* Callback and callback reference for RXOK/RXNEMP/RXFLL interrupts.
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*/
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XCanPs_SendRecvHandler RecvHandler;
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void *RecvRef;
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/**
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* Callback and callback reference for ERROR interrupt.
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*/
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XCanPs_ErrorHandler ErrorHandler;
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void *ErrorRef;
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/**
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* Callback and callback reference for RXOFLW/RXUFLW/TXBFLL/TXFLL/
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* Wakeup/Sleep/Bus off/ARBLST interrupts.
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*/
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XCanPs_EventHandler EventHandler;
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void *EventRef;
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} XCanPs;
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/***************** Macros (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/**
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*
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* This macro checks if the transmission is complete.
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*
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* @param InstancePtr is a pointer to the XCanPs instance.
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*
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* @return
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* - TRUE if the transmission is done.
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* - FALSE if the transmission is not done.
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*
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* @note C-Style signature:
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* int XCanPs_IsTxDone(XCanPs *InstancePtr)
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*
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*******************************************************************************/
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#define XCanPs_IsTxDone(InstancePtr) \
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(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
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XCANPS_ISR_OFFSET) & XCANPS_IXR_TXOK_MASK) != (u32)0) ? TRUE : FALSE)
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/****************************************************************************/
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/**
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*
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* This macro checks if the transmission FIFO is full.
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*
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* @param InstancePtr is a pointer to the XCanPs instance.
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*
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* @return
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* - TRUE if TX FIFO is full.
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* - FALSE if the TX FIFO is NOT full.
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*
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* @note C-Style signature:
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* int XCanPs_IsTxFifoFull(XCanPs *InstancePtr)
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*
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*****************************************************************************/
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#define XCanPs_IsTxFifoFull(InstancePtr) \
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(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
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XCANPS_SR_OFFSET) & XCANPS_SR_TXFLL_MASK) != (u32)0) ? TRUE : FALSE)
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/****************************************************************************/
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/**
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*
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* This macro checks if the Transmission High Priority Buffer is full.
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*
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* @param InstancePtr is a pointer to the XCanPs instance.
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*
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* @return
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* - TRUE if the TX High Priority Buffer is full.
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* - FALSE if the TX High Priority Buffer is NOT full.
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*
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* @note C-Style signature:
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* int XCanPs_IsHighPriorityBufFull(XCanPs *InstancePtr)
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*
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*****************************************************************************/
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#define XCanPs_IsHighPriorityBufFull(InstancePtr) \
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(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
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XCANPS_SR_OFFSET) & XCANPS_SR_TXBFLL_MASK) != (u32)0) ? TRUE : FALSE)
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/****************************************************************************/
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/**
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*
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* This macro checks if the receive FIFO is empty.
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*
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* @param InstancePtr is a pointer to the XCanPs instance.
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*
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* @return
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* - TRUE if RX FIFO is empty.
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* - FALSE if the RX FIFO is NOT empty.
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*
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* @note C-Style signature:
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* int XCanPs_IsRxEmpty(XCanPs *InstancePtr)
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*
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*****************************************************************************/
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#define XCanPs_IsRxEmpty(InstancePtr) \
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(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
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XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK) != (u32)0) ? FALSE : TRUE)
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/****************************************************************************/
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/**
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*
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* This macro checks if the CAN device is ready for the driver to change
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* Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask
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* Registers (AFMR).
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*
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* AFIR and AFMR for a filter are changeable only after the filter is disabled
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* and this routine returns FALSE. The filter can be disabled using the
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* XCanPs_AcceptFilterDisable function.
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*
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* Use the XCanPs_Accept_* functions for configuring the acceptance filters.
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*
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* @param InstancePtr is a pointer to the XCanPs instance.
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*
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* @return
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* - TRUE if the device is busy and NOT ready to accept writes to
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* AFIR and AFMR.
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* - FALSE if the device is ready to accept writes to AFIR and
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* AFMR.
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*
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* @note C-Style signature:
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* int XCanPs_IsAcceptFilterBusy(XCanPs *InstancePtr)
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*
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*****************************************************************************/
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#define XCanPs_IsAcceptFilterBusy(InstancePtr) \
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(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \
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XCANPS_SR_OFFSET) & XCANPS_SR_ACFBSY_MASK) != (u32)0) ? TRUE : FALSE)
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/****************************************************************************/
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/**
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*
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* This macro calculates CAN message identifier value given identifier field
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* values.
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*
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* @param StandardId contains Standard Message ID value.
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* @param SubRemoteTransReq contains Substitute Remote Transmission
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* Request value.
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* @param IdExtension contains Identifier Extension value.
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* @param ExtendedId contains Extended Message ID value.
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* @param RemoteTransReq contains Remote Transmission Request value.
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*
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* @return Message Identifier value.
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*
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* @note C-Style signature:
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* u32 XCanPs_CreateIdValue(u32 StandardId,
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* u32 SubRemoteTransReq,
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* u32 IdExtension, u32 ExtendedId,
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* u32 RemoteTransReq)
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*
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* Read the CAN specification for meaning of each parameter.
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*
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*****************************************************************************/
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#define XCanPs_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, \
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ExtendedId, RemoteTransReq) \
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((((StandardId) << XCANPS_IDR_ID1_SHIFT) & XCANPS_IDR_ID1_MASK) | \
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(((SubRemoteTransReq) << XCANPS_IDR_SRR_SHIFT) & XCANPS_IDR_SRR_MASK)|\
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(((IdExtension) << XCANPS_IDR_IDE_SHIFT) & XCANPS_IDR_IDE_MASK) | \
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(((ExtendedId) << XCANPS_IDR_ID2_SHIFT) & XCANPS_IDR_ID2_MASK) | \
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((RemoteTransReq) & XCANPS_IDR_RTR_MASK))
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/****************************************************************************/
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/**
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*
|
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* This macro calculates value for Data Length Code register given Data
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* Length Code value.
|
||
*
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* @param DataLengCode indicates Data Length Code value.
|
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*
|
||
* @return Value that can be assigned to Data Length Code register.
|
||
*
|
||
* @note C-Style signature:
|
||
* u32 XCanPs_CreateDlcValue(u32 DataLengCode)
|
||
*
|
||
* Read the CAN specification for meaning of Data Length Code.
|
||
*
|
||
*****************************************************************************/
|
||
#define XCanPs_CreateDlcValue(DataLengCode) \
|
||
(((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK)
|
||
|
||
|
||
/****************************************************************************/
|
||
/**
|
||
*
|
||
* This macro clears the timestamp in the Timestamp Control Register.
|
||
*
|
||
* @param InstancePtr is a pointer to the XCanPs instance.
|
||
*
|
||
* @return None.
|
||
*
|
||
* @note C-Style signature:
|
||
* void XCanPs_ClearTimestamp(XCanPs *InstancePtr)
|
||
*
|
||
*****************************************************************************/
|
||
#define XCanPs_ClearTimestamp(InstancePtr) \
|
||
XCanPs_WriteReg((InstancePtr)->CanConfig.BaseAddr, \
|
||
XCANPS_TCR_OFFSET, XCANPS_TCR_CTS_MASK)
|
||
|
||
/************************** Function Prototypes ******************************/
|
||
|
||
/*
|
||
* Functions in xcanps.c
|
||
*/
|
||
s32 XCanPs_CfgInitialize(XCanPs *InstancePtr, XCanPs_Config *ConfigPtr,
|
||
u32 EffectiveAddr);
|
||
|
||
void XCanPs_Reset(XCanPs *InstancePtr);
|
||
u8 XCanPs_GetMode(XCanPs *InstancePtr);
|
||
void XCanPs_EnterMode(XCanPs *InstancePtr, u8 OperationMode);
|
||
u32 XCanPs_GetStatus(XCanPs *InstancePtr);
|
||
void XCanPs_GetBusErrorCounter(XCanPs *InstancePtr, u8 *RxErrorCount,
|
||
u8 *TxErrorCount);
|
||
u32 XCanPs_GetBusErrorStatus(XCanPs *InstancePtr);
|
||
void XCanPs_ClearBusErrorStatus(XCanPs *InstancePtr, u32 Mask);
|
||
s32 XCanPs_Send(XCanPs *InstancePtr, u32 *FramePtr);
|
||
s32 XCanPs_Recv(XCanPs *InstancePtr, u32 *FramePtr);
|
||
s32 XCanPs_SendHighPriority(XCanPs *InstancePtr, u32 *FramePtr);
|
||
void XCanPs_AcceptFilterEnable(XCanPs *InstancePtr, u32 FilterIndexes);
|
||
void XCanPs_AcceptFilterDisable(XCanPs *InstancePtr, u32 FilterIndexes);
|
||
u32 XCanPs_AcceptFilterGetEnabled(XCanPs *InstancePtr);
|
||
s32 XCanPs_AcceptFilterSet(XCanPs *InstancePtr, u32 FilterIndex,
|
||
u32 MaskValue, u32 IdValue);
|
||
void XCanPs_AcceptFilterGet(XCanPs *InstancePtr, u32 FilterIndex,
|
||
u32 *MaskValue, u32 *IdValue);
|
||
|
||
s32 XCanPs_SetBaudRatePrescaler(XCanPs *InstancePtr, u8 Prescaler);
|
||
u8 XCanPs_GetBaudRatePrescaler(XCanPs *InstancePtr);
|
||
s32 XCanPs_SetBitTiming(XCanPs *InstancePtr, u8 SyncJumpWidth,
|
||
u8 TimeSegment2, u8 TimeSegment1);
|
||
void XCanPs_GetBitTiming(XCanPs *InstancePtr, u8 *SyncJumpWidth,
|
||
u8 *TimeSegment2, u8 *TimeSegment1);
|
||
|
||
s32 XCanPs_SetRxIntrWatermark(XCanPs *InstancePtr, u8 Threshold);
|
||
u8 XCanPs_GetRxIntrWatermark(XCanPs *InstancePtr);
|
||
s32 XCanPs_SetTxIntrWatermark(XCanPs *InstancePtr, u8 Threshold);
|
||
u8 XCanPs_GetTxIntrWatermark(XCanPs *InstancePtr);
|
||
|
||
/*
|
||
* Diagnostic functions in xcanps_selftest.c
|
||
*/
|
||
s32 XCanPs_SelfTest(XCanPs *InstancePtr);
|
||
|
||
/*
|
||
* Functions in xcanps_intr.c
|
||
*/
|
||
void XCanPs_IntrEnable(XCanPs *InstancePtr, u32 Mask);
|
||
void XCanPs_IntrDisable(XCanPs *InstancePtr, u32 Mask);
|
||
u32 XCanPs_IntrGetEnabled(XCanPs *InstancePtr);
|
||
u32 XCanPs_IntrGetStatus(XCanPs *InstancePtr);
|
||
void XCanPs_IntrClear(XCanPs *InstancePtr, u32 Mask);
|
||
void XCanPs_IntrHandler(void *InstancePtr);
|
||
s32 XCanPs_SetHandler(XCanPs *InstancePtr, u32 HandlerType,
|
||
void *CallBackFunc, void *CallBackRef);
|
||
|
||
/*
|
||
* Functions in xcanps_sinit.c
|
||
*/
|
||
XCanPs_Config *XCanPs_LookupConfig(u16 DeviceId);
|
||
|
||
#ifdef __cplusplus
|
||
}
|
||
#endif
|
||
|
||
#endif /* end of protection macro */
|