157 lines
6.4 KiB
C
157 lines
6.4 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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#ifndef XPFW_EVENTS_H_
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#define XPFW_EVENTS_H_
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#include "xpfw_default.h"
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#define XPFW_EV_MB_FAULT 1U
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#define XPFW_EV_APB_AIB_ERROR 2U
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#define XPFW_EV_AXI_AIB_ERROR 3U
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#define XPFW_EV_ERROR_2 4U
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#define XPFW_EV_ERROR_1 5U
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#define XPFW_EV_ACPU_3_DBG_PWRUP 6U
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#define XPFW_EV_ACPU_2_DBG_PWRUP 7U
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#define XPFW_EV_ACPU_1_DBG_PWRUP 8U
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#define XPFW_EV_ACPU_0_DBG_PWRUP 9U
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#define XPFW_EV_FPD_WAKE_GIC_PROXY 10U
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#define XPFW_EV_MIO_WAKE_5 11U
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#define XPFW_EV_MIO_WAKE_4 12U
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#define XPFW_EV_MIO_WAKE_3 13U
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#define XPFW_EV_MIO_WAKE_2 14U
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#define XPFW_EV_MIO_WAKE_1 15U
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#define XPFW_EV_MIO_WAKE_0 16U
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#define XPFW_EV_DAP_RPU_WAKE 17U
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#define XPFW_EV_DAP_FPD_WAKE 18U
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#define XPFW_EV_USB_1_WAKE 19U
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#define XPFW_EV_USB_0_WAKE 20U
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#define XPFW_EV_R5_1_WAKE 21U
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#define XPFW_EV_R5_0_WAKE 22U
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#define XPFW_EV_ACPU_3_WAKE 23U
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#define XPFW_EV_ACPU_2_WAKE 24U
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#define XPFW_EV_ACPU_1_WAKE 25U
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#define XPFW_EV_ACPU_0_WAKE 26U
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#define XPFW_EV_VCC_INT_FP_DISCONNECT 27U
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#define XPFW_EV_VCC_INT_DISCONNECT 28U
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#define XPFW_EV_VCC_AUX_DISCONNECT 29U
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#define XPFW_EV_DBG_ACPU3_RST_REQ 30U
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#define XPFW_EV_DBG_ACPU2_RST_REQ 31U
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#define XPFW_EV_DBG_ACPU1_RST_REQ 32U
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#define XPFW_EV_DBG_ACPU0_RST_REQ 33U
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#define XPFW_EV_CP_ACPU3_RST_REQ 34U
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#define XPFW_EV_CP_ACPU2_RST_REQ 35U
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#define XPFW_EV_CP_ACPU1_RST_REQ 36U
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#define XPFW_EV_CP_ACPU0_RST_REQ 37U
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#define XPFW_EV_DBG_RCPU1_RST_REQ 38U
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#define XPFW_EV_DBG_RCPU0_RST_REQ 39U
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#define XPFW_EV_R5_1_SLEEP 40U
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#define XPFW_EV_R5_0_SLEEP 41U
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#define XPFW_EV_ACPU_3_SLEEP 42U
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#define XPFW_EV_ACPU_2_SLEEP 43U
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#define XPFW_EV_ACPU_1_SLEEP 44U
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#define XPFW_EV_ACPU_0_SLEEP 45U
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#define XPFW_EV_PL_GPI_31 46U
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#define XPFW_EV_PL_GPI_30 47U
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#define XPFW_EV_PL_GPI_29 48U
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#define XPFW_EV_PL_GPI_28 49U
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#define XPFW_EV_PL_GPI_27 50U
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#define XPFW_EV_PL_GPI_26 51U
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#define XPFW_EV_PL_GPI_25 52U
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#define XPFW_EV_PL_GPI_24 53U
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#define XPFW_EV_PL_GPI_23 54U
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#define XPFW_EV_PL_GPI_22 55U
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#define XPFW_EV_PL_GPI_21 56U
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#define XPFW_EV_PL_GPI_20 57U
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#define XPFW_EV_PL_GPI_19 58U
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#define XPFW_EV_PL_GPI_18 59U
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#define XPFW_EV_PL_GPI_17 60U
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#define XPFW_EV_PL_GPI_16 61U
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#define XPFW_EV_PL_GPI_15 62U
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#define XPFW_EV_PL_GPI_14 63U
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#define XPFW_EV_PL_GPI_13 64U
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#define XPFW_EV_PL_GPI_12 65U
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#define XPFW_EV_PL_GPI_11 66U
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#define XPFW_EV_PL_GPI_10 67U
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#define XPFW_EV_PL_GPI_9 68U
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#define XPFW_EV_PL_GPI_8 69U
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#define XPFW_EV_PL_GPI_7 70U
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#define XPFW_EV_PL_GPI_6 71U
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#define XPFW_EV_PL_GPI_5 72U
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#define XPFW_EV_PL_GPI_4 73U
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#define XPFW_EV_PL_GPI_3 74U
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#define XPFW_EV_PL_GPI_2 75U
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#define XPFW_EV_PL_GPI_1 76U
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#define XPFW_EV_PL_GPI_0 77U
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#define XPFW_EV_RTC_SECONDS 78U
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#define XPFW_EV_RTC_ALARM 79U
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#define XPFW_EV_GROUP_GPI0
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#define XPFW_EV_GROUP_GPI1
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#define XPFW_EV_GROUP_GPI2
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#define XPFW_EV_GROUP_GPI3
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#define XPFW_EV_GROUP_WAKE
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#define XPFW_EV_GROUP_SLEEP
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#define XPFW_EV_GROUP_WARM_RST
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#define XPFW_EV_GROUP_DEBUG_PWRUP
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#define XPFW_EV_GROUP_PWR_DISCONNECT
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#define XPFW_EV_GROUP_SYS_ERROR
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#define XPFW_EV_MAX 80U
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#define XPFW_EV_TYPE_INVALID 0xffffffffU
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#define XPFW_EV_TYPE_GPI0 0U
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#define XPFW_EV_TYPE_GPI1 1U
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#define XPFW_EV_TYPE_GPI2 2U
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#define XPFW_EV_TYPE_GPI3 3U
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#define XPFW_EV_TYPE_RTC 4U
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struct XPfw_Event_t {
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const u8 Type;
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const u32 RegMask;
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u32 ModMask;
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};
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u32 XPfw_EventGetModMask(u32 EventId);
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u32 XPfw_EventGetRegMask(u32 EventId);
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XStatus XPfw_EventAddOwner(u8 ModId, u32 EventId);
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XStatus XPfw_EventRemoveOwner(u32 ModId, u32 EventId);
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u32 XPfw_EventGetId(u32 EventType, u32 Mask);
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u32 XPfw_EventGetType(u32 EventId);
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#endif /* XPFW_EVENTS_H_ */
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