2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
597 lines
19 KiB
C
Executable file
597 lines
19 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xgpiops.c
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*
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* The XGpioPs driver. Functions in this file are the minimum required functions
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* for this driver. See xgpiops.h for a detailed description of the driver.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a sv 01/15/10 First Release
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* 1.01a sv 04/15/12 Removed the APIs XGpioPs_SetMode, XGpioPs_SetModePin
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* XGpioPs_GetMode, XGpioPs_GetModePin as they are not
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* relevant to Zynq device. The interrupts are disabled
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* for output pins on all banks during initialization.
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* 2.1 hk 04/29/14 Use Input data register DATA_RO for read. CR# 771667.
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*
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xgpiops.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Variable Definitions *****************************/
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/*
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* This structure defines the mapping of the pin numbers to the banks when
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* the driver APIs are used for working on the individual pins.
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*/
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unsigned int XGpioPsPinTable[] = {
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31, /* 0 - 31, Bank 0 */
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53, /* 32 - 53, Bank 1 */
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85, /* 54 - 85, Bank 2 */
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117 /* 86 - 117 Bank 3 */
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};
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/************************** Function Prototypes ******************************/
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extern void StubHandler(void *CallBackRef, int Bank, u32 Status);
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/*****************************************************************************/
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/*
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*
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* This function initializes a XGpioPs instance/driver.
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* All members of the XGpioPs instance structure are initialized and
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* StubHandlers are assigned to the Bank Status Handlers.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param ConfigPtr points to the XGpioPs device configuration structure.
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* @param EffectiveAddr is the device base address in the virtual memory
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* address space. If the address translation is not used then the
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* physical address should be passed.
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* Unexpected errors may occur if the address mapping is changed
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* after this function is invoked.
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*
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* @return XST_SUCCESS always.
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*
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* @note None.
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*
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******************************************************************************/
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int XGpioPs_CfgInitialize(XGpioPs *InstancePtr, XGpioPs_Config *ConfigPtr,
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u32 EffectiveAddr)
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{
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(ConfigPtr != NULL);
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/*
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* Set some default values for instance data, don't indicate the device
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* is ready to use until everything has been initialized successfully.
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*/
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InstancePtr->IsReady = 0;
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InstancePtr->GpioConfig.BaseAddr = EffectiveAddr;
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InstancePtr->GpioConfig.DeviceId = ConfigPtr->DeviceId;
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InstancePtr->Handler = StubHandler;
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/*
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* By default, interrupts are not masked in GPIO. Disable
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* interrupts for all pins in all the 4 banks.
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*/
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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XGPIOPS_INTDIS_OFFSET, 0xFFFFFFFF);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((1) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTDIS_OFFSET, 0xFFFFFFFF);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((2) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTDIS_OFFSET, 0xFFFFFFFF);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((3) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTDIS_OFFSET, 0xFFFFFFFF);
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/*
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* Indicate the component is now ready to use.
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*/
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InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
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return XST_SUCCESS;
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}
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/****************************************************************************/
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/**
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*
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* Read the Data register of the specified GPIO bank.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Bank is the bank number of the GPIO to operate on.
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* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
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*
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* @return Current value of the Data register.
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*
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* @note This function is used for reading the state of all the GPIO pins
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* of specified bank.
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*
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*****************************************************************************/
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u32 XGpioPs_Read(XGpioPs *InstancePtr, u8 Bank)
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{
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(Bank < XGPIOPS_MAX_BANKS);
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return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_DATA_BANK_OFFSET) +
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XGPIOPS_DATA_RO_OFFSET);
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}
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/****************************************************************************/
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/**
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*
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* Read Data from the specified pin.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Pin is the pin number for which the data has to be read.
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* Valid values are 0 to XGPIOPS_DEVICE_MAX_PIN_NUM - 1.
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* See xgpiops.h for the mapping of the pin numbers in the banks.
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*
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* @return Current value of the Pin (0 or 1).
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*
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* @note This function is used for reading the state of the specified
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* GPIO pin.
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*
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*****************************************************************************/
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int XGpioPs_ReadPin(XGpioPs *InstancePtr, int Pin)
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{
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u8 Bank;
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u8 PinNumber;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(Pin < XGPIOPS_DEVICE_MAX_PIN_NUM);
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/*
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* Get the Bank number and Pin number within the bank.
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*/
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XGpioPs_GetBankPin(Pin, &Bank, &PinNumber);
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return (XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_DATA_BANK_OFFSET) +
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XGPIOPS_DATA_RO_OFFSET) >> PinNumber) & 1;
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}
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/****************************************************************************/
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/**
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*
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* Write to the Data register of the specified GPIO bank.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Bank is the bank number of the GPIO to operate on.
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* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
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* @param Data is the value to be written to the Data register.
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*
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* @return None.
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*
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* @note This function is used for writing to all the GPIO pins of
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* the bank. The previous state of the pins is not maintained.
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*
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*****************************************************************************/
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void XGpioPs_Write(XGpioPs *InstancePtr, u8 Bank, u32 Data)
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{
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(Bank < XGPIOPS_MAX_BANKS);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_DATA_BANK_OFFSET) +
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XGPIOPS_DATA_OFFSET, Data);
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}
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/****************************************************************************/
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/**
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*
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* Write data to the specified pin.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Pin is the pin number to which the Data is to be written.
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* Valid values are 0 to XGPIOPS_DEVICE_MAX_PIN_NUM - 1.
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* @param Data is the data to be written to the specified pin (0 or 1).
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*
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* @return None.
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*
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* @note This function does a masked write to the specified pin of
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* the specified GPIO bank. The previous state of other pins
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* is maintained.
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*
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*****************************************************************************/
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void XGpioPs_WritePin(XGpioPs *InstancePtr, int Pin, int Data)
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{
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u32 RegOffset;
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u32 Value;
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u8 Bank;
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u8 PinNumber;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(Pin < XGPIOPS_DEVICE_MAX_PIN_NUM);
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/*
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* Get the Bank number and Pin number within the bank.
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*/
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XGpioPs_GetBankPin(Pin, &Bank, &PinNumber);
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if (PinNumber > 15) {
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/*
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* There are only 16 data bits in bit maskable register.
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*/
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PinNumber -= 16;
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RegOffset = XGPIOPS_DATA_MSW_OFFSET;
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} else {
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RegOffset = XGPIOPS_DATA_LSW_OFFSET;
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}
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/*
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* Get the 32 bit value to be written to the Mask/Data register where
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* the upper 16 bits is the mask and lower 16 bits is the data.
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*/
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Data &= 0x01;
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Value = ~(1 << (PinNumber + 16)) & ((Data << PinNumber) | 0xFFFF0000);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_DATA_MASK_OFFSET) +
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RegOffset, Value);
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}
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/****************************************************************************/
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/**
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*
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* Set the Direction of the pins of the specified GPIO Bank.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Bank is the bank number of the GPIO to operate on.
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* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
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* @param Direction is the 32 bit mask of the Pin direction to be set for
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* all the pins in the Bank. Bits with 0 are set to Input mode,
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* bits with 1 are set to Output Mode.
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*
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* @return None.
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*
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* @note This function is used for setting the direction of all the pins
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* in the specified bank. The previous state of the pins is
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* not maintained.
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*
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*****************************************************************************/
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void XGpioPs_SetDirection(XGpioPs *InstancePtr, u8 Bank, u32 Direction)
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{
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(Bank < XGPIOPS_MAX_BANKS);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_DIRM_OFFSET, Direction);
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}
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/****************************************************************************/
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/**
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*
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* Set the Direction of the specified pin.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Pin is the pin number to which the Data is to be written.
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* Valid values are 0 to XGPIOPS_DEVICE_MAX_PIN_NUM - 1.
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* @param Direction is the direction to be set for the specified pin.
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* Valid values are 0 for Input Direction, 1 for Output Direction.
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*
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* @return None.
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*
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*****************************************************************************/
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void XGpioPs_SetDirectionPin(XGpioPs *InstancePtr, int Pin, int Direction)
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{
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u8 Bank;
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u8 PinNumber;
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u32 DirModeReg;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(Pin < XGPIOPS_DEVICE_MAX_PIN_NUM);
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Xil_AssertVoid((Direction == 0) || (Direction == 1));
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/*
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* Get the Bank number and Pin number within the bank.
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*/
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XGpioPs_GetBankPin(Pin, &Bank, &PinNumber);
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DirModeReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_DIRM_OFFSET);
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if (Direction) { /* Output Direction */
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DirModeReg |= (1 << PinNumber);
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} else { /* Input Direction */
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DirModeReg &= ~ (1 << PinNumber);
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}
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_DIRM_OFFSET, DirModeReg);
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}
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/****************************************************************************/
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/**
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*
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* Get the Direction of the pins of the specified GPIO Bank.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Bank is the bank number of the GPIO to operate on.
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* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
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*
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* return Returns a 32 bit mask of the Direction register. Bits with 0 are
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* in Input mode, bits with 1 are in Output Mode.
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*
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* @note None.
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*
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*****************************************************************************/
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u32 XGpioPs_GetDirection(XGpioPs *InstancePtr, u8 Bank)
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{
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(Bank < XGPIOPS_MAX_BANKS);
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return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_DIRM_OFFSET);
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}
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/****************************************************************************/
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/**
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*
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* Get the Direction of the specified pin.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Pin is the pin number for which the Direction is to be
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* retrieved.
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* Valid values are 0 to XGPIOPS_DEVICE_MAX_PIN_NUM - 1.
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*
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* @return Direction of the specified pin.
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* - 0 for Input Direction
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* - 1 for Output Direction
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*
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* @note None.
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*
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*****************************************************************************/
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int XGpioPs_GetDirectionPin(XGpioPs *InstancePtr, int Pin)
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{
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u8 Bank;
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u8 PinNumber;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(Pin < XGPIOPS_DEVICE_MAX_PIN_NUM);
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/*
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* Get the Bank number and Pin number within the bank.
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*/
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XGpioPs_GetBankPin(Pin, &Bank, &PinNumber);
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return (XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_DIRM_OFFSET) >> PinNumber) & 1;
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}
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/****************************************************************************/
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/**
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*
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* Set the Output Enable of the pins of the specified GPIO Bank.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Bank is the bank number of the GPIO to operate on.
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* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
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* @param OpEnable is the 32 bit mask of the Output Enables to be set for
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* all the pins in the Bank. The Output Enable of bits with 0 are
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* disabled, the Output Enable of bits with 1 are enabled.
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*
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* @return None.
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*
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* @note This function is used for setting the Output Enables of all the
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* pins in the specified bank. The previous state of the Output
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* Enables is not maintained.
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*
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*****************************************************************************/
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void XGpioPs_SetOutputEnable(XGpioPs *InstancePtr, u8 Bank, u32 OpEnable)
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{
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(Bank < XGPIOPS_MAX_BANKS);
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XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
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((Bank) * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_OUTEN_OFFSET, OpEnable);
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}
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/****************************************************************************/
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/**
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*
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* Set the Output Enable of the specified pin.
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*
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* @param InstancePtr is a pointer to the XGpioPs instance.
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* @param Pin is the pin number to which the Data is to be written.
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* Valid values are 0 to XGPIOPS_DEVICE_MAX_PIN_NUM - 1.
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* @param OpEnable specifies whether the Output Enable for the specified
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* pin should be enabled.
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* Valid values are 0 for Disabling Output Enable,
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* 1 for Enabling Output Enable.
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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void XGpioPs_SetOutputEnablePin(XGpioPs *InstancePtr, int Pin, int OpEnable)
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{
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u8 Bank;
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u8 PinNumber;
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u32 OpEnableReg;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(Pin < XGPIOPS_DEVICE_MAX_PIN_NUM);
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Xil_AssertVoid((OpEnable == 0) || (OpEnable == 1));
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/*
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* Get the Bank number and Pin number within the bank.
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*/
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XGpioPs_GetBankPin(Pin, &Bank, &PinNumber);
|
|
|
|
OpEnableReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
|
|
((Bank) * XGPIOPS_REG_MASK_OFFSET) +
|
|
XGPIOPS_OUTEN_OFFSET);
|
|
|
|
if (OpEnable) { /* Enable Output Enable */
|
|
OpEnableReg |= (1 << PinNumber);
|
|
} else { /* Disable Output Enable */
|
|
OpEnableReg &= ~ (1 << PinNumber);
|
|
}
|
|
|
|
XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
|
|
((Bank) * XGPIOPS_REG_MASK_OFFSET) +
|
|
XGPIOPS_OUTEN_OFFSET, OpEnableReg);
|
|
}
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the Output Enable status of the pins of the specified GPIO Bank.
|
|
*
|
|
* @param InstancePtr is a pointer to the XGpioPs instance.
|
|
* @param Bank is the bank number of the GPIO to operate on.
|
|
* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
|
|
*
|
|
* return Returns a a 32 bit mask of the Output Enable register.
|
|
* Bits with 0 are in Disabled state, bits with 1 are in
|
|
* Enabled State.
|
|
*
|
|
* @note None.
|
|
*
|
|
*****************************************************************************/
|
|
u32 XGpioPs_GetOutputEnable(XGpioPs *InstancePtr, u8 Bank)
|
|
{
|
|
Xil_AssertNonvoid(InstancePtr != NULL);
|
|
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
|
Xil_AssertNonvoid(Bank < XGPIOPS_MAX_BANKS);
|
|
|
|
return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
|
|
((Bank) * XGPIOPS_REG_MASK_OFFSET) +
|
|
XGPIOPS_OUTEN_OFFSET);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the Output Enable status of the specified pin.
|
|
*
|
|
* @param InstancePtr is a pointer to the XGpioPs instance.
|
|
* @param Pin is the pin number for which the Output Enable status is to
|
|
* be retrieved.
|
|
* Valid values are 0 to XGPIOPS_DEVICE_MAX_PIN_NUM - 1.
|
|
*
|
|
* @return Output Enable of the specified pin.
|
|
* - 0 if Output Enable is disabled for this pin
|
|
* - 1 if Output Enable is enabled for this pin
|
|
*
|
|
* @note None.
|
|
*
|
|
*****************************************************************************/
|
|
int XGpioPs_GetOutputEnablePin(XGpioPs *InstancePtr, int Pin)
|
|
{
|
|
u8 Bank;
|
|
u8 PinNumber;
|
|
|
|
Xil_AssertNonvoid(InstancePtr != NULL);
|
|
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
|
Xil_AssertNonvoid(Pin < XGPIOPS_DEVICE_MAX_PIN_NUM);
|
|
|
|
/*
|
|
* Get the Bank number and Pin number within the bank.
|
|
*/
|
|
XGpioPs_GetBankPin(Pin, &Bank, &PinNumber);
|
|
|
|
return (XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
|
|
((Bank) * XGPIOPS_REG_MASK_OFFSET) +
|
|
XGPIOPS_OUTEN_OFFSET) >> PinNumber) & 1;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
/*
|
|
*
|
|
* Get the Bank number and the Pin number in the Bank, for the given PinNumber
|
|
* in the GPIO device.
|
|
*
|
|
* @param PinNumber is the Pin number in the GPIO device.
|
|
* @param BankNumber returns the Bank in which this GPIO pin is present.
|
|
* Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
|
|
* @param PinNumberInBank returns the Pin Number within the Bank.
|
|
*
|
|
* return None;
|
|
*
|
|
* @note None.
|
|
*
|
|
*****************************************************************************/
|
|
void XGpioPs_GetBankPin(u8 PinNumber, u8 *BankNumber, u8 *PinNumberInBank)
|
|
{
|
|
for (*BankNumber = 0; *BankNumber < 4; (*BankNumber)++)
|
|
if (PinNumber <= XGpioPsPinTable[*BankNumber])
|
|
break;
|
|
|
|
if (*BankNumber == 0) {
|
|
*PinNumberInBank = PinNumber;
|
|
} else {
|
|
*PinNumberInBank = PinNumber %
|
|
(XGpioPsPinTable[*BankNumber - 1] + 1);
|
|
}
|
|
}
|