2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
318 lines
11 KiB
C
Executable file
318 lines
11 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xsysmon_intr.c
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*
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* This file contains interrupt handling API functions of the System Monitor/ADC
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* device.
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*
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* The device must be configured at hardware build time to support interrupt
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* for all the functions in this file to work.
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*
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* Refer to xsysmon.h header file and device specification for more information.
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*
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* @note
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*
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* Calling the interrupt functions without including the interrupt component will
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* result in asserts if asserts are enabled, and will result in a unpredictable
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* behavior if the asserts are not enabled.
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*
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* <pre>
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*
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ----- -------- -----------------------------------------------------
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* 1.00a xd/sv 05/22/07 First release
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* 4.00a ktn 10/22/09 Updated the file to use the HAL Processor APIs/macros.
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* The macros have been renamed to remove _m from the name
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* of the macro.
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*
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xsysmon.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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/*****************************************************************************/
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/**
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* This function enables the global interrupt in the Global Interrupt Enable
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* Register (GIER) so that the interrupt output from the System Monitor/ADC
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* device is enabled. Interrupts enabled using XSysMon_IntrEnable() will not
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* occur until the global interrupt enable bit is set by using this function.
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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*
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* @return None.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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******************************************************************************/
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void XSysMon_IntrGlobalEnable(XSysMon *InstancePtr)
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{
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/*
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* Assert the arguments.
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*/
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Enable the Global Interrupt.
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*/
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XSysMon_WriteReg(InstancePtr->Config.BaseAddress, XSM_GIER_OFFSET,
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XSM_GIER_GIE_MASK);
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}
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/****************************************************************************/
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/**
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* This function disables the global interrupt in the Global Interrupt Enable
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* Register (GIER) so that the interrupt output from the System Monitor/ADC
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* device is disabled.
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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*
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* @return None.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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*****************************************************************************/
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void XSysMon_IntrGlobalDisable(XSysMon *InstancePtr)
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{
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/*
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* Assert the arguments.
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*/
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Disable the Global Interrupt.
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*/
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XSysMon_WriteReg(InstancePtr->Config.BaseAddress, XSM_GIER_OFFSET, 0);
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}
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/****************************************************************************/
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/**
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*
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* This function enables the specified interrupts in the device.
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* Interrupts enabled using this function will not occur until the global
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* interrupt enable bit is set by using the XSysMon_IntrGlobalEnable()function.
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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* @param Mask is the bit-mask of the interrupts to be enabled.
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* Bit positions of 1 will be enabled. Bit positions of 0 will
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* keep the previous setting. This mask is formed by OR'ing
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* XSM_IPIXR_* bits defined in xsysmon_hw.h.
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*
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* @return None.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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*****************************************************************************/
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void XSysMon_IntrEnable(XSysMon *InstancePtr, u32 Mask)
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{
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u32 RegValue;
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/*
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* Assert the arguments.
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*/
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Enable the specified interrupts in the IPIER.
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*/
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RegValue = XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
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XSM_IPIER_OFFSET);
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RegValue |= (Mask & XSM_IPIXR_ALL_MASK);
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XSysMon_WriteReg(InstancePtr->Config.BaseAddress, XSM_IPIER_OFFSET,
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RegValue);
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}
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/****************************************************************************/
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/**
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*
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* This function disables the specified interrupts in the device.
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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* @param Mask is the bit-mask of the interrupts to be disabled.
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* Bit positions of 1 will be disabled. Bit positions of 0 will
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* keep the previous setting. This mask is formed by OR'ing
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* XSM_IPIXR_* bits defined in xsysmon_hw.h.
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*
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* @return None.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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*****************************************************************************/
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void XSysMon_IntrDisable(XSysMon *InstancePtr, u32 Mask)
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{
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u32 RegValue;
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/*
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* Assert the arguments.
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*/
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Disable the specified interrupts in the IPIER.
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*/
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RegValue = XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
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XSM_IPIER_OFFSET);
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RegValue &= ~(Mask & XSM_IPIXR_ALL_MASK);
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XSysMon_WriteReg(InstancePtr->Config.BaseAddress, XSM_IPIER_OFFSET,
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RegValue);
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}
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/****************************************************************************/
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/**
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*
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* This function returns the enabled interrupts read from the Interrupt Enable
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* Register (IPIER). Use the XSM_IPIXR_* constants defined in xsysmon_hw.h to
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* interpret the returned value.
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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*
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* @return A 32-bit value representing the contents of the IPIER.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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*****************************************************************************/
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u32 XSysMon_IntrGetEnabled(XSysMon *InstancePtr)
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{
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/*
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* Assert the arguments.
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*/
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Return the value read from the Interrupt Enable Register.
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*/
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return XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
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XSM_IPIER_OFFSET) & XSM_IPIXR_ALL_MASK;
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}
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/****************************************************************************/
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/**
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*
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* This function returns the interrupt status read from Interrupt Status
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* Register(IPISR). Use the XSM_IPIXR_* constants defined in xsysmon_hw.h
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* to interpret the returned value.
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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*
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* @return A 32-bit value representing the contents of the IPISR.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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*****************************************************************************/
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u32 XSysMon_IntrGetStatus(XSysMon *InstancePtr)
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{
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/*
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* Assert the arguments.
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*/
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Return the value read from the Interrupt Status register.
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*/
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return XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
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XSM_IPISR_OFFSET) & XSM_IPIXR_ALL_MASK;
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}
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/****************************************************************************/
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/**
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*
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* This function clears the specified interrupts in the Interrupt Status
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* Register (IPISR).
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*
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* @param InstancePtr is a pointer to the XSysMon instance.
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* @param Mask is the bit-mask of the interrupts to be cleared.
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* Bit positions of 1 will be cleared. Bit positions of 0 will not
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* change the previous interrupt status. This mask is formed by
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* OR'ing XSM_IPIXR_* bits which are defined in xsysmon_hw.h.
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*
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* @return None.
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*
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* @note The device must be configured at hardware build time to include
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* interrupt component for this function to work.
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*
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*****************************************************************************/
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void XSysMon_IntrClear(XSysMon *InstancePtr, u32 Mask)
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{
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u32 RegValue;
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/*
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* Assert the arguments.
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*/
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.IncludeInterrupt == TRUE);
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/*
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* Clear the specified interrupts in the Interrupt Status register.
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*/
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RegValue = XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
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XSM_IPISR_OFFSET);
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RegValue &= (Mask & XSM_IPIXR_ALL_MASK);
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XSysMon_WriteReg(InstancePtr->Config.BaseAddress, XSM_IPISR_OFFSET,
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RegValue);
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}
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