2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
380 lines
13 KiB
C
Executable file
380 lines
13 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file gamma.h
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*
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* This header file contains identifiers and register-level driver functions (or
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* macros) that can be used to access the Xilinx Gamma Correction (GAMMA) instance.
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*
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 5.01a jude 09/07/12 Updated for GAMMA V6.01.a-Added Masks for register bits
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* - Converted from xio.h to xil_io.h, translating basic
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* types, MB cache functions, exceptions and assertions to
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* xil_io format
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* 5.00a tb 02/27/12 Updated for GAMMA V5.00.a
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* 4.00a rc 09/11/11 Updated for GAMMA V4.0
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* 3.00a jo 07/20/10 Updated for GAMMA V3.0
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* 3.00a gs 07/27/10 Updated for gamma registers and functionality
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* 6.0 adk 19/12/13 Updated as per the New Tcl API's
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*
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******************************************************************************/
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#ifndef GAMMA_DRIVER_H /* prevent circular inclusions */
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#define GAMMA_DRIVER_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_io.h"
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/************************** Constant Definitions *****************************/
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/**
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* Register Offsets
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*/
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/* General Control Registers */
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#define GAMMA_CONTROL 0x000 /**< Control */
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#define GAMMA_STATUS 0x004 /**< Status */
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#define GAMMA_ERROR 0x008 /**< Error */
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#define GAMMA_IRQ_EN 0x00C /**< IRQ Enable */
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#define GAMMA_VERSION 0x010 /**< Version */
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#define GAMMA_SYSDEBUG0 0x014 /**< System Debug 0 */
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#define GAMMA_SYSDEBUG1 0x018 /**< System Debug 1 */
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#define GAMMA_SYSDEBUG2 0x01C /**< System Debug 2 */
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/* Timing Control Registers */
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#define GAMMA_ACTIVE_SIZE 0x020 /**< Active Size (V x H) */
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#define GAMMA_TIMING_STATUS 0x024 /**< Timing Measurement Status */
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/* Core Specific Registers */
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#define GAMMA_TABLE_UPDATE 0x100 /**< Swap to inactive LUT */
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#define GAMMA_ADDR_DATA 0x104 /**< Address and Data register */
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/*
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* Gamma Control Register bit definition
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*/
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#define GAMMA_CTL_EN_MASK 0x00000001 /**< Gamma Enable */
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#define GAMMA_CTL_RUE_MASK 0x00000002 /**< Gamma Register Update Enable */
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#define GAMMA_CTL_BPE_MASK 0x00000010 /**< Gamma ByPass Enable */
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#define GAMMA_CTL_TPE_MASK 0x00000020 /**< Gamma Test Pattern Enable */
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/*
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* Gamma Reset Register bit definition
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*/
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#define GAMMA_RST_RESET 0x80000000 /**< Software Reset - Instantaneous */
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#define GAMMA_RST_AUTORESET 0x40000000 /**< Software Reset - Auto-synchronize to SOF */
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/***************** Macros (Inline Functions) Definitions *********************/
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#define GAMMA_In32 Xil_In32
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#define GAMMA_Out32 Xil_Out32
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/*****************************************************************************/
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/**
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*
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* This macro enables a instance.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_Enable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_Enable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) | \
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GAMMA_CTL_EN_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro disables a Gamma instance.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_Disable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_Disable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) & \
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~GAMMA_CTL_EN_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro tells a Gamma instance to pick up all the register value changes
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* made so far by the software. The registers will be automatically updated
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* on the next rising-edge of the VBlank_in signal on the core.
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* It is up to the user to manually disable the register update after a sufficient
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* amount if time.
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*
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* This function only works when the Gamma core is enabled.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_RegUpdateEnable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_RegUpdateEnable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) | \
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GAMMA_CTL_RUE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro tells a Gamma instance not to update it's configuration registers made
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* so far by the software. When disabled, changes to other configuration registers
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* are stored, but do not effect the core's behavior.
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*
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* This function only works when the Gamma core is enabled.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_RegUpdateDisable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_RegUpdateDisable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) & \
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~GAMMA_CTL_RUE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro enables Bypass mode.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_BypassEnable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_BypassEnable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) | \
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GAMMA_CTL_BPE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro disables Bypass mode
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_BypassDisable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_BypassDisable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) & \
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~GAMMA_CTL_BPE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro enables Test Pattern Input.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_TestPatternEnable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_TestPatternEnable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) | \
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GAMMA_CTL_TPE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro disables Test Pattern Input
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_TestPatternDisable(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_TestPatternDisable(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, \
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GAMMA_ReadReg(BaseAddress, GAMMA_CONTROL) & \
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~GAMMA_CTL_TPE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro resets a Gamma instance. This reset effects the core immediately,
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* and may cause image tearing.
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*
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* This reset resets the Gamma's configuration registers, and holds the core's outputs
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* in their reset state until GAMMA_ClearReset() is called.
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*
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_Reset(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_Reset(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, GAMMA_RST_RESET) \
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/*****************************************************************************/
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/**
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*
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* This macro clears the Gamma's reset flag (which is set using GAMMA_Reset(), and
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* returns it to normal operation. This ClearReset effects the core immediately,
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* and may cause image tearing.
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*
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_ClearReset(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_ClearReset(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, 0) \
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/*****************************************************************************/
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/**
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*
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* This macro resets a Gamma instance, but differs from GAMMA_Reset() in that it
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* automatically synchronizes to the VBlank_in input of the core to prevent tearing.
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*
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* On the next rising-edge of VBlank_in following a call to GAMMA_AutoSyncReset(),
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* all of the core's configuration registers and outputs will be reset, then the
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* reset flag will be immediately released, allowing the core to immediately resume
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* default operation.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_Reset(u32 BaseAddress);
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*
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******************************************************************************/
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#define GAMMA_AutoSyncReset(BaseAddress) \
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GAMMA_WriteReg(BaseAddress, GAMMA_CONTROL, GAMMA_RST_AUTORESET) \
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/*****************************************************************************/
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/**
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*
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* Read the given register.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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* @param RegOffset is the register offset of the register (defined at top of this file)
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*
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* @return The 32-bit value of the register
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*
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* @note
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* C-style signature:
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* u32 GAMMA_ReadReg(u32 BaseAddress, u32 RegOffset)
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*
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******************************************************************************/
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#define GAMMA_ReadReg(BaseAddress, RegOffset) \
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GAMMA_In32((BaseAddress) + (RegOffset))
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/*****************************************************************************/
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/**
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*
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* Write the given register.
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*
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* @param BaseAddress is the Xilinx EDK base address of the Gamma core (from xparameters.h)
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* @param RegOffset is the register offset of the register (defined at top of this file)
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* @param Data is the 32-bit value to write to the register
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void GAMMA_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
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*
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******************************************************************************/
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#define GAMMA_WriteReg(BaseAddress, RegOffset, Data) \
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GAMMA_Out32((BaseAddress) + (RegOffset), (Data))
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/************************** Function Prototypes ******************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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