d8a32edad9
Removed support for families older than 7 series. Modified driver tcl not to generate family.h Removed IDCODE lookup logic. Removed xhwicap_ff.h and xhwicap_lut.h examples. Removed xhwicap_clb_ff.h, xhwicap_clb_lut.h and xhwicap_clb_srinv.h. Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com> Acked-by: Srikanth Vemula <svemula@xilinx.com>
262 lines
8.5 KiB
C
Executable file
262 lines
8.5 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2003 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xhwicap_srp.c
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*
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* This file contains the functions of the XHwIcap driver used to access the
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* configuration memory of the Xilinx FPGAs through the ICAP port.
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*
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* These APIs provide methods for reading and writing data, frames, and partial
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* bitstreams to the ICAP port. See xhwicap.h for a detailed description of the
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* driver.
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*
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* @note
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*
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* Only Virtex4, Virtex5, Virtex6, Spartan6 and kintex 7 devices are supported.
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*
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a bjb 11/17/03 First release
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* 1.01a sv 03/03/07 V4 Updates.
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* 2.00a ecm 10/20/07 V5 Support
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* 4.00a hvm 11/30/09 Added support for V6 and updated with HAL phase 1
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* modifications
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* 5.00a hvm 2/25/10 Added support for S6
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* 5.00a hvm 5/21/10 Modified XHwIcap_GetConfigReg function for V4/V5/V6/S6
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* command sequence. Added one extra NOP before the
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* Type 1 read config register command and removed an
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* extra NOP after the config register command.
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* 6.00a hvm 8/12/11 Added support for K7
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* 7.00a bss 03/14/12 ReadId API is added to desync after lock up during
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* configuration CR 637538
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*
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* 8.00a bss 06/20/12 Deleted ReadId API as per CR 656162
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* 10.0 bss 6/24/14 Removed support for families older than 7 series
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* </pre>
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*
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*****************************************************************************/
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/***************************** Include Files ********************************/
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#include <xil_types.h>
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#include <xil_assert.h>
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#include "xhwicap.h"
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/************************** Constant Definitions *****************************/
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#define DESYNC_COMMAND_SIZE 7 /* Number of words in the Desync command */
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#define CAPTURE_COMMAND_SIZE 7 /* Number of words in the Capture command */
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#define READ_CFG_REG_COMMAND_SIZE 7 /* Num of words in Read Config command */
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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/****************************************************************************/
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/**
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*
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* Sends a DESYNC command to the ICAP port.
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*
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* @param InstancePtr - a pointer to the XHwIcap instance to be worked on
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*
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* @return XST_SUCCESS else XST_FAILURE
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*
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* @note None.
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*
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******************************************************************************/
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int XHwIcap_CommandDesync(XHwIcap *InstancePtr)
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{
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int Status;
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u32 FrameBuffer[DESYNC_COMMAND_SIZE];
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u32 Index =0;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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/*
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* Create the data to be written to the ICAP.
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*/
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FrameBuffer[Index++] = (XHwIcap_Type1Write(XHI_CMD) | 1);
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FrameBuffer[Index++] = XHI_CMD_DESYNCH;
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FrameBuffer[Index++] = XHI_DUMMY_PACKET;
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FrameBuffer[Index++] = XHI_DUMMY_PACKET;
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/*
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* Write the data to the FIFO and intiate the transfer of data present
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* in the FIFO to the ICAP device.
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*/
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Status = XHwIcap_DeviceWrite(InstancePtr, &FrameBuffer[0], Index);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/****************************************************************************/
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/**
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*
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* Sends a CAPTURE command to the ICAP port. This command captures all
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* of the flip flop states so they will be available during readback.
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* One can use this command instead of enabling the CAPTURE block in the
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* design.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return XST_SUCCESS or XST_FAILURE
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*
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* @note None.
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*
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*****************************************************************************/
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int XHwIcap_CommandCapture(XHwIcap *InstancePtr)
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{
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int Status;
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u32 FrameBuffer[CAPTURE_COMMAND_SIZE];
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u32 Index =0;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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/*
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* Create the data to be written to the ICAP.
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*/
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FrameBuffer[Index++] = XHI_DUMMY_PACKET;
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FrameBuffer[Index++] = XHI_SYNC_PACKET;
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FrameBuffer[Index++] = XHI_NOOP_PACKET;
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FrameBuffer[Index++] = (XHwIcap_Type1Write(XHI_CMD) | 1);
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FrameBuffer[Index++] = XHI_CMD_GCAPTURE;
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FrameBuffer[Index++] = XHI_DUMMY_PACKET;
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FrameBuffer[Index++] = XHI_DUMMY_PACKET;
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/*
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* Write the data to the FIFO and intiate the transfer of data present
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* in the FIFO to the ICAP device.
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*/
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Status = XHwIcap_DeviceWrite(InstancePtr, &FrameBuffer[0], Index);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/****************************************************************************/
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/**
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*
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* This function returns the value of the specified configuration register.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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* @param ConfigReg is a constant which represents the configuration
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* register value to be returned. Constants specified in
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* xhwicap_i.h.
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* Examples: XHI_IDCODE, XHI_FLR.
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* @param RegData is the value of the specified configuration
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* register.
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*
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* @return XST_SUCCESS or XST_FAILURE
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*
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* @note This is a blocking call.
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*
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*****************************************************************************/
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u32 XHwIcap_GetConfigReg(XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData)
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{
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int Status;
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int EosRetries =0; /* Counter for checking EOS to become high */
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u32 FrameBuffer[READ_CFG_REG_COMMAND_SIZE];
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u32 Index =0;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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/*
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* Create the data to be written to the ICAP.
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*/
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FrameBuffer[Index++] = XHI_DUMMY_PACKET;
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FrameBuffer[Index++] = XHI_SYNC_PACKET;
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FrameBuffer[Index++] = XHI_NOOP_PACKET;
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FrameBuffer[Index++] = XHI_NOOP_PACKET;
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FrameBuffer[Index++] = XHwIcap_Type1Read(ConfigReg) | 0x1;
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FrameBuffer[Index++] = XHI_NOOP_PACKET;
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FrameBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Check for EOS bit of Status Register. EOS bit becomes high after
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* ICAP completes Start up sequence. Access to ICAP should start
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* only after EOS bit becomes high.
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*/
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while((!(XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
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XHI_SR_OFFSET)& XHI_SR_EOS_MASK))) {
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if(EosRetries < XHI_MAX_RETRIES) {
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EosRetries++;
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}
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else {
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return XST_FAILURE;
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}
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}
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/*
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* Write the data to the FIFO and intiate the transfer of data present
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* in the FIFO to the ICAP device.
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*/
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Status = XHwIcap_DeviceWrite(InstancePtr, &FrameBuffer[0], Index);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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while (XHwIcap_IsDeviceBusy(InstancePtr) != FALSE);
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while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
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XHI_CR_OFFSET)) & XHI_CR_WRITE_MASK);
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/*
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* Read the Config Register using DeviceRead since
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* DeviceRead reads depending on ICAP Width for V6
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* and 7 series devices
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*/
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XHwIcap_DeviceRead(InstancePtr, RegData, 1);
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return XST_SUCCESS;
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}
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