
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
110 lines
4.5 KiB
C
Executable file
110 lines
4.5 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xdevcfg_hw.c
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*
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* This file contains the implementation of the interface reset functionality
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- --- -------- ---------------------------------------------
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* 2.04a kpc 10/07/13 First release
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xdevcfg_hw.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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/*****************************************************************************/
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/**
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* This function perform the reset sequence to the given devcfg interface by
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* configuring the appropriate control bits in the devcfg specifc registers
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* the devcfg reset squence involves the following steps
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* Disable all the interuupts
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* Clear the status
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* Update relevant config registers with reset values
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* Disbale the looopback mode and pcap rate enable
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*
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* @param BaseAddress of the interface
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*
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* @return N/A
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*
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* @note
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* This function will not modify the slcr registers that are relavant for
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* devcfg controller
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******************************************************************************/
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void XDcfg_ResetHw(u32 BaseAddr)
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{
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u32 Regval = 0;
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/* Mask the interrupts */
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XDcfg_WriteReg(BaseAddr, XDCFG_INT_MASK_OFFSET,
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XDCFG_IXR_ALL_MASK);
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/* Clear the interuupt status */
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Regval = XDcfg_ReadReg(BaseAddr, XDCFG_INT_STS_OFFSET);
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XDcfg_WriteReg(BaseAddr, XDCFG_INT_STS_OFFSET, Regval);
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/* Clear the source address register */
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XDcfg_WriteReg(BaseAddr, XDCFG_DMA_SRC_ADDR_OFFSET, 0x0);
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/* Clear the destination address register */
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XDcfg_WriteReg(BaseAddr, XDCFG_DMA_DEST_ADDR_OFFSET, 0x0);
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/* Clear the source length register */
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XDcfg_WriteReg(BaseAddr, XDCFG_DMA_SRC_LEN_OFFSET, 0x0);
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/* Clear the destination length register */
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XDcfg_WriteReg(BaseAddr, XDCFG_DMA_DEST_LEN_OFFSET, 0x0);
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/* Clear the loopback enable bit */
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Regval = XDcfg_ReadReg(BaseAddr, XDCFG_MCTRL_OFFSET);
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Regval = Regval & ~XDCFG_MCTRL_PCAP_LPBK_MASK;
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XDcfg_WriteReg(BaseAddr, XDCFG_MCTRL_OFFSET, Regval);
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/*Reset the configuration register to reset value */
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XDcfg_WriteReg(BaseAddr, XDCFG_CFG_OFFSET,
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XDCFG_CONFIG_RESET_VALUE);
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/*Disable the PCAP rate enable bit */
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Regval = XDcfg_ReadReg(BaseAddr, XDCFG_CTRL_OFFSET);
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Regval = Regval & ~XDCFG_CTRL_PCAP_RATE_EN_MASK;
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XDcfg_WriteReg(BaseAddr, XDCFG_CTRL_OFFSET, Regval);
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}
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