e562b6a397
This patch adds support for exporting SGMII/1000BASE-X properties to xparameters.h file when the pcs/pma core is present in the h/w design. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
1477 lines
57 KiB
C
Executable file
1477 lines
57 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/**
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*
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* @file xaxiethernet.h
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*
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* The Xilinx AXI Ethernet MAC driver component. This driver supports hard
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* Ethernet core for Virtex-6(TM) devices and soft Ethernet core for
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* Spartan-6(TM) and other supported devices. The supported speed can be
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* 10/100/1000 Mbps and can reach upto 2000/2500 Mbps (1000Base-X versions).
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*
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* For a full description of AXI Ethernet features, please see the hardware
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* spec.
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* This driver supports the following features:
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* - Memory mapped access to host interface registers
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* - Virtual memory support
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* - Unicast, broadcast, and multicast receive address filtering
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* - Full duplex operation
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* - Automatic source address insertion or overwrite (programmable)
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* - Automatic PAD & FCS insertion and stripping (programmable)
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* - Flow control
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* - VLAN frame support
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* - Pause frame support
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* - Jumbo frame support
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* - Partial and full checksum offload
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* - Extended multicast addresses to 2**23.
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* - Extended VLAN translation, tagging and stripping supports.
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*
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* <h2>Driver Description</h2>
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*
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* The device driver enables higher layer software (e.g., an application) to
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* configure a Axi Ethernet device. It is intended that this driver be used in
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* cooperation with another driver (FIFO or DMA) for data communication. This
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* device driver can support multiple devices even when those devices have
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* significantly different configurations.
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*
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* <h2>Initialization & Configuration</h2>
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*
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* The XAxiEthernet_Config structure can be used by the driver to configure
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* itself. This configuration structure is typically created by the tool-chain
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* based on hardware build properties, although, other methods are allowed and
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* currently used in some systems.
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*
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* To support multiple runtime loading and initialization strategies employed
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* by various operating systems, the driver instance can be initialized using
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* the XAxiEthernet_CfgInitialze() routine.
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*
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* <h2>Interrupts and Asynchronous Callbacks</h2>
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*
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* The driver has no dependencies on the interrupt controller. It provides
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* no interrupt handlers. The application/OS software should set up its own
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* interrupt handlers if required.
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*
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* <h2>Device Reset</h2>
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*
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* When a Axi Ethernet device is connected up to a FIFO or DMA core in hardware,
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* errors may be reported on one of those cores (FIFO or DMA) such that it can
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* be determined that the Axi Ethernet device needs to be reset. If a reset is
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* performed, the calling code should also reconfigure and reapply the proper
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* settings in the Axi Ethernet device.
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*
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* When a Axi Ethernet device reset is required, XAxiEthernet_Reset() should
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* be utilized.
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*
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* <h2>Virtual Memory</h2>
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*
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* This driver may be used in systems with virtual memory support by passing
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* the appropriate value for the <i>EffectiveAddress</i> parameter to the
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* XAxiEthernet_CfgInitialize() routine.
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*
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* <h2>Transfering Data</h2>
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*
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* The Axi Ethernet core by itself is not capable of transmitting or receiving
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* data in any meaningful way. Instead the Axi Ethernet device need to be
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* connected to a FIFO or DMA core in hardware.
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*
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* This Axi Ethernet driver is modeled in a similar fashion where the
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* application code or O/S adapter driver needs to make use of a separate FIFO
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* or DMA driver in connection with this driver to establish meaningful
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* communication over Ethernet.
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*
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* <h2>Checksum Offloading</h2>
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*
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* If configured, the device can compute a 16-bit checksum from frame data. In
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* most circumstances this can lead to a substantial gain in throughput.
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*
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* The checksum offload settings for each frame sent or received are
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* transmitted through the AXI4-Stream interface in hardware. What this means
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* is that the checksum offload feature is indirectly controlled in the
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* Axi Ethernet device through the driver for DMA core connected
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* to the Axi Ethernet device.
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*
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* Refer to the documentation for DMA driver used for data
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* communication on how to set the values for the relevant AXI4-Stream control
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* words.
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*
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* Since this hardware implementation is general purpose in nature system
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* software must perform pre and post frame processing to obtain the desired
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* results for the types of packets being transferred. Most of the time this
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* will be TCP/IP traffic.
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*
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* TCP/IP and UDP/IP frames contain separate checksums for the IP header and
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* UDP/TCP header+data.
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* For partial checksum offloading (enabled while configuring the hardware),
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* the IP header checksum cannot be offloaded. Many stacks that support
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* offloading will compute the IP header if required and use hardware to compute
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* the UDP/TCP header+data checksum. There are other complications concerning
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* the IP pseudo header that must be taken into consideration. Readers should
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* consult a TCP/IP design reference for more details.
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*
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* For full checksum offloading (enabled while configuring the hardware), the
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* IPv4 checksum calculation and validation can also be offloaded at the
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* harwdare. Full checksum offload is supported only under certain conditions.
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* IP checksum offload will be supported on valid IP datagrams that meet the
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* following conditions.
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* - If present, the VLAN header is 4 bytes long
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* - Encapsulation into the Ethernet frame is either Ethernet II or Ethernet
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* SNAP format
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* - Only IPv4 is supported. IPv6 is not supported.
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* - IP header is a valid length
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* TCP/UDP checksum offloading will be supported on valid TCP/UDP segments that
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* meet the following conditions.
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* - Encapsulated in IPv4 (IPv6 is not supported)
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* - Good IP header checksum
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* - No fragmentation
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* - TCP or UDP segment
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* When full checksum offload is enabled, the hardware does the following:
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* - Calculates the IP header checksum and inserts it in the IP header.
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* - Calculates the TCP/UDP Pseudo header from IP header.
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* - Calculates TCP/UDP header from, TCP/UDP psedu header, TCP/UDP header
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* and TCP/UDP payload.
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* - On the receive path, it again calculates all the above and validates
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* for IP header checksum and TCP/UDP checksum.
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*
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* There are certain device options that will affect the checksum calculation
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* performed by hardware for Tx:
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*
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* - FCS insertion disabled (XAE_FCS_INSERT_OPTION): software is required to
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* calculate and insert the FCS value at the end of the frame, but the
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* checksum must be known ahead of time prior to calculating the FCS.
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* Therefore checksum offloading cannot be used in this situation.
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*
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* And for Rx:
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*
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* - FCS/PAD stripping disabled (XAE_FCS_STRIP_OPTION): The 4 byte FCS at the
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* end of frame will be included in the hardware calculated checksum.
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* software must subtract out this data.
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*
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* - FCS/PAD stripping disabled (XAE_FCS_STRIP_OPTION): For frames smaller
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* than 64 bytes, padding will be included in the hardware calculated
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* checksum.
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* software must subtract out this data. It may be better to allow the
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* TCP/IP stack verify checksums for this type of packet.
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*
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* - VLAN enabled (XAE_VLAN_OPTION): The 4 extra bytes in the Ethernet header
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* affect the hardware calculated checksum. software must subtract out the
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* 1st two 16-bit words starting at the 15th byte.
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*
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* <h3>Transmit Checksum Offloading</h3>
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*
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* For partial checksum offloading, for the TX path, the software can specify
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* where in the frame the checksum calculation is to start, where the result
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* should be inserted, and a seed value. The checksum is calculated from
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* the start point through the end of frame.
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*
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* For full checksum offloading, for the TX path, the software just need to
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* enable Full Checksum offload in the appropriate AXI4-Stream Control word on
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* a per packet basis.
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*
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* The checksum offloading settings are sent in the transmit AXI4 Stream control
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* words. The relevant control word fields are described in brief below.
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* Refer to the Axi Ethernet hardware specification for more details.
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*
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*<h4>AXI4-Stream Control Word 0:</h4>
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*<pre>
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* Bits 1-0 : Transmit Checksum Enable: 01 - Partial checsum offload,
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* 10 - Full checksum offload
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* 00 - No checksum offloading
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* 11 - Not used, reserved
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* Bits 27-2 : Reserved
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* Bits 31-28 : Used for AXI4-Stream Control Mode flag
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*</pre>
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*
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*<h4>AXI4-Stream Control Word 1:</h4>
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*<pre>
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* Bits 31-16 (MSB): Transmit Checksum Calculation Starting Point: Offset
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* in the frame where checksum calculation should begin.
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* Relevant only for partial checksum offloading.
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* Bits 15-0 (LSB): Transmit Checksum Insertion Point: Frame offset where
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* the computed checksum value is stored, which should be
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* in the TCP or UDP header.
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* Relevant only for partial checksum offloading.
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* </pre>
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*
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*<h4>AXI4-Stream Control Word 2:</h4>
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*<pre>
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* Bits 31-16 (MSB): Reserved
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* Bits 0-15 (LSB): Transmit Checksum Calculation Initial Value: Checksum
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* seed value.
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* Relevant only for partial checksum offloading.
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*</pre>
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*
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* <h3>Receive Checksum Offloading</h3>
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*
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* For partial checksum offload on the RX path, the 15th byte to end of frame
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* is check summed. This range of bytes is the entire Ethernet payload (for
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* non-VLAN frames).
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*
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* For full checksum offload on the RX path, both the IP and TCP checksums are
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* validated if the packet meets the specified conditions.
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*
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* The checksum offloading information is sent in the receive AXI4-Stream
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* status words. There are 4 relevant status words available. However
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* only the relevant status words are described in brief below.
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* Refer to the Axi Ethernet hardware specification for more details.
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*
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*<h4>AXI4-Stream Status Word 0:</h4>
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*<pre>
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* Bits 31-28 (MSB): Always 0x5 to represent receive status frame
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* Bits 27-16 : Undefined
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* Bits 15-0 (LSB): MCAST_ADR_U. Upper 16 bits of the multicast
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* destination address of the frame.
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*
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*<h4>AXI4-Stream Status Word 1:</h4>
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*</pre>
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* Bits 31-0 : MCAST_ADR_L. The lower 32 bits of the multicast
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* destination address.
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*
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*<h4>AXI4-Stream Status Word 2:</h4>
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*</pre>
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* Bits 5-3 : Specifies the receive full checksum status. This
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* is relevant only for full checksum offloading.
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* 000 -> Neither the IP header nor the TCP/UDP
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* checksums were checked.
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* 001 -> The IP header checksum was checked and was
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* correct. The TCP/UDP checksum was not checked.
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* 010 -> Both the IP header checksum and the TCP
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* checksum were checked and were correct.
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* 011 -> Both the IP header checksum and the UDP
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* checksum were checked and were correct.
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* 100 -> Reserved.
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* 101 -> The IP header checksum was checked and was
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* incorrect. The TCP/UDP checksum was not
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* checked.
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* 110 -> The IP header checksum was checked and is
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* correct but the TCP checksum was checked
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* and was incorrect.
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* 111 -> The IP header checksum was checked and is
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* correct but the UDP checksum was checked and
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* was incorrect.
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*
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*<h4>AXI4-Stream Status Word 3:</h4>
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* Bits 31-16 : T_L_TPID. This is the value of 13th and 14th byte
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* of the frame.
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* Bits 15-0 : Receive Raw Checksum: Computed checksum value
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*
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*<h4>AXI4-Stream Status Word 3:</h4>
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* Bits 31-16 : VLAN_TAG. Value of 15th and 16th byte of the
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* frame.
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* Bits 15-0 : RX_BYTECNT. Received frame length.
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*
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*
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* <h2>Extended multicast</h2>
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* (XAE_EXT_MULTICAST_OPTION): Allow and perform address filtering more than 4
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* multicast addresses. Hardware requires to enable promiscuous mode
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* (XAE_PROMISCUOUS_OPTION) and disable legacy multicast mode
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* (XAE_MULTICAST_OPTION) for this feature to work.
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*
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* <h2>Extended VLAN</h2>
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*
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* <h3>TX/RX VLAN stripping</h3>
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* (XAE_EXT_[T|R]XVLAN_STRP_OPTION) handles transmit/receive one VLAN tag
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* stripping in Ethernet frames. To enable this option, hardware requires to
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* build with this feature and enable (XAE_FCS_INSERT_OPTION),
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* (XAE_FCS_STRP_OPTION) and disable (XAE_VLAN_OPTION). Supports three modes,
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* -XAE_VSTRP_NONE : no stripping
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* -XAE_VSTRP_ALL : strip one tag from all frames
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* -XAE_VSTRP_SELECT : strip one tag from selected frames
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*
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* <h3>TX/RX VLAN translation</h3>
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* (XATE_EXT_[T|R]XVLAN_TRAN_OPTION) handles transmit/receive one VLAN tag
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* translation in Ethernet frames. To enable this option, hardware requires to
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* build with this feature and enable (XATE_FCS_INSERT_OPTION),
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* (XAE_FCS_STRP_OPTION), and disable (XAE_VLAN_OPTION).
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*
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* <h3>TX/RX VLAN tagging</h3>
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* (XAE_EXT_[T|R]XVLAN_TAG_OPTION) adds transmit/receive one VLAN tag in
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* Ethernet frames. To enable this option, hardware requires to build with this
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* feature and enable (XAE_FCS_INSERT_OPTION), (XAE_FCS_STRP_OPTION),
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* (XAE_JUMBO_OPTION) and disable (XAE_VLAN_OPTION). Support four modes,
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* -XAE_VTAG_NONE : no tagging
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* -XAE_VTAG_ALL : tag all frames
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* -XAE_VTAG_EXISTED : tag already tagged frames
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* -XAE_VTAG_SELECT : tag selected already tagged frames
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*
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* <h2>PHY Communication</h2>
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*
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* Prior to PHY access, the MDIO clock must be setup. This driver will set a
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* safe default that should work with AXI4-Lite bus speeds of up to 150 MHz
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* and keep the MDIO clock below 2.5 MHz. If the user wishes faster access to
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* the PHY then the clock divisor can be set to a different value (see
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* XAxiEthernet_PhySetMdioDivisor()).
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*
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* MII register access is performed through the functions XAxiEthernet_PhyRead()
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* and XAxiEthernet_PhyWrite().
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*
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* <h2>Link Sync</h2>
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*
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* When the device is used in a multi speed environment, the link speed must be
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* explicitly set using XAxiEthernet_SetOperatingSpeed() and must match the
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* speed PHY has negotiated. If the speeds are mismatched, then the MAC will not
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* pass traffic.
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*
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* The application/OS software may use the AutoNegotiation interrupt to be
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* notified when the PHY has completed auto-negotiation.
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*
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* <h2>Asserts</h2>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining, at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development. For deployment
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* use -DNDEBUG compiler switch to remove assert code.
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*
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* <h2>Driver Errata</h2>
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*
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* - A dropped receive frame indication may be reported by the driver after
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* calling XAxiEthernet_Stop() followed by XAxiEthernet_Start(). This can
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* occur if a frame is arriving when stop is called.
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* - On Rx with checksum offloading enabled and FCS/PAD stripping disabled,
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* FCS and PAD data will be included in the checksum result.
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* - On Tx with checksum offloading enabled and auto FCS insertion disabled,
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* the user calculated FCS will be included in the checksum result.
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*
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* @note
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*
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* Xilinx drivers are typically composed of two components, one is the driver
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* and the other is the adapter. The driver is independent of OS and processor
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* and is intended to be highly portable. The adapter is OS-specific and
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* facilitates communication between the driver and an OS.
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* <br><br>
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* This driver is intended to be RTOS and processor independent. Any needs for
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* dynamic memory management, threads or thread mutual exclusion, or cache
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* control must be satisfied by the layer above this driver.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- ---------------------------------------------------------
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* 1.00a asa 6/30/10 First release based on the ll temac driver
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* 1.01a asa 12/10/10 Added macros XAxiEthernet_IsRxFullCsum and
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* XAxiEthernet_IsTxFullCsum for supporting full checksum
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* offload. The full checksum offload is only supported in
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* newer versions of the core, please refer to the core
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* HW datasheet.
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* 1.02a asa 2/16/11 Inserted a delay in the driver function
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* XAxiEthernet_Reset in file xaxiethernet.c. This is done
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* because immediately after a core reset none of the
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* AxiEthernet registers are accessible for some duration.
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* Changed the value of XAE_LOOPS_TO_COME_OUT_OF_RST to
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* 10000 in file xaxiethernet_hw.h.
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*
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* 2.00a asa 8/29/11 A new major version of AxiEthernet driver is being
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* released to accomodate the change in avb software. The
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* AxiEthernet hardware v3_00_a has the latest avb
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* hardware which needs a corresponding change in avb
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* software (released in examples/avb folder). This change
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* in avb software is not backwards compatible (which
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* means this avb software will not work with older
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* axiethernet hardware).
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* Hence a new major version of axiethernet is being
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* released.
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* Added defines for Ability Reg, Identification Reg, Rx max
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* Frame and Tx Max Frame registers.
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* Changed define for TEMAC RGMII/SGMII Config (PHYC) Reg.
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*
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* 3.00a asa 4/10/12 A new major version of AxiEthernet is being released to
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* accomodate the change in AVB example. From AxiEthernet
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* core version 3.01a onwards the AVB implementation has
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* changed. The AVB module is now a part of AxiEthernet IP.
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* Because of this change, the AVB example works only
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* when promiscuous mode is not enabled (unlike earlier
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* implementation where promiscuous mode was required for
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* AVB example to work). Hence the file xavb_example.c is
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* changed so that the core is not put in promiscuous mode.
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|
* Also since AVB is a part of AxiEthernet some of the
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|
* register mappings in xavb_hw.h has changed.
|
|
* These changes are not backward compatible which means
|
|
* this changed example will not work for previous versions
|
|
* of cores.
|
|
* Hence a new major version of axiethernet is being
|
|
* released.
|
|
* 3.01a srt 02/03/13 - Added support for SGMII mode (CR 676793)
|
|
* - Added support for IPI designs (CR 698249)
|
|
* 02/14/13 - Added support for Zynq (CR 681136)
|
|
* 3.02a srt 04/13/13 - Removed Warnings (CR 704998).
|
|
* 04/24/13 - Modified parameter *_SGMII_PHYADDR to *_PHYADDR, the
|
|
* config parameter C_PHYADDR applies to SGMII/1000BaseX
|
|
* modes of operation
|
|
* 04/24/13 - Added support for 1000BaseX mode in examples (_util.c)
|
|
* (CR 704195)
|
|
* 04/24/13 - Added support for RGMII mode in examples (_util.c)
|
|
* 3.02a srt 08/06/13 - Fixed CR 727634:
|
|
* Modified FifoHandler() function logic of FIFO
|
|
* interrupt example to reflect the bit changes in
|
|
* the Interrupt Status Register as per the latest
|
|
* AXI FIFO stream IP.
|
|
* - Fixed CR 721141:
|
|
* Added support to handle multiple instances of
|
|
* AxiEthernet FIFO interface (CR 721141)
|
|
* - Fixed CR 717949:
|
|
* Configures external Marvel 88E1111 PHY based on the
|
|
* AXI Ethernet physical interface type and allows to
|
|
* operate in specific interface mode without changing
|
|
* jumpers on the Microblaze boards. This change is in
|
|
* example_util.c
|
|
* 3.02a adk 15/11/13 - Fixed CR 761035 removed dependency with fifo in MDD file
|
|
* 4.0 adk 19/12/13 - Updated as per the New Tcl API's
|
|
* asa 30/01/14 - Added defines for 1588 registers and bit masks
|
|
* Added config parameter for SGMII over LVDS
|
|
*
|
|
* 4.1 adk 21/04/14 - Fixed CR:780537 Changes are Made in the file
|
|
* axiethernet test-app tcl
|
|
* 4.2 adk 08/08/14 - Fixed CR:810643 SDK generated 'xparamters.h' erroneously
|
|
* generated with errors due to part of '#define' misplaced
|
|
* changes are made in the driver tcl file.
|
|
* 4.3 adk 29/10/14 - Added support for generating parameters for SGMII/1000BaseX
|
|
* modes When IP is configured with the PCS/PMA core.
|
|
* Changes are made in the driver tcl file (CR 828796).
|
|
* </pre>
|
|
*
|
|
******************************************************************************/
|
|
|
|
#ifndef XAXIETHERNET_H /* prevent circular inclusions */
|
|
#define XAXIETHERNET_H /* by using protection macros */
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/***************************** Include Files *********************************/
|
|
|
|
#include "xenv.h"
|
|
#include "xstatus.h"
|
|
#include "xil_assert.h"
|
|
#include "xaxiethernet_hw.h"
|
|
|
|
/************************** Constant Definitions *****************************/
|
|
|
|
/** @name Configuration options
|
|
*
|
|
* The following are device configuration options. See the
|
|
* <i>XAxiEthernet_SetOptions</i>, <i>XAxiEthernet_ClearOptions</i> and
|
|
* <i>XAxiEthernet_GetOptions</i> routines for information on how to use
|
|
* options.
|
|
*
|
|
* The default state of the options are also noted below.
|
|
*
|
|
* @{
|
|
*/
|
|
|
|
/**< XAE_PROMISC_OPTION specifies the Axi Ethernet device to accept all
|
|
* incoming packets.
|
|
* This driver sets this option to disabled (cleared) by default.
|
|
*/
|
|
#define XAE_PROMISC_OPTION 0x00000001
|
|
|
|
/**< XAE_JUMBO_OPTION specifies the Axi Ethernet device to accept jumbo
|
|
* frames for transmit and receive.
|
|
* This driver sets this option to disabled (cleared) by default.
|
|
*/
|
|
#define XAE_JUMBO_OPTION 0x00000002
|
|
|
|
/**< XAE_VLAN_OPTION specifies the Axi Ethernet device to enable VLAN support
|
|
* for transmit and receive.
|
|
* This driver sets this option to disabled (cleared) by default.
|
|
*/
|
|
#define XAE_VLAN_OPTION 0x00000004
|
|
|
|
/**< XAE_FLOW_CONTROL_OPTION specifies the Axi Ethernet device to recognize
|
|
* received flow control frames.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_FLOW_CONTROL_OPTION 0x00000008
|
|
|
|
/**< XAE_FCS_STRIP_OPTION specifies the Axi Ethernet device to strip FCS and
|
|
* PAD from received frames. Note that PAD from VLAN frames is not stripped.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_FCS_STRIP_OPTION 0x00000010
|
|
|
|
/**< XAE_FCS_INSERT_OPTION specifies the Axi Ethernet device to generate the
|
|
* FCS field and add PAD automatically for outgoing frames.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_FCS_INSERT_OPTION 0x00000020
|
|
|
|
/**< XAE_LENTYPE_ERR_OPTION specifies the Axi Ethernet device to enable
|
|
* Length/Type error checking (mismatched type/length field) for received
|
|
* frames.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_LENTYPE_ERR_OPTION 0x00000040
|
|
|
|
/**< XAE_TRANSMITTER_ENABLE_OPTION specifies the Axi Ethernet device
|
|
* transmitter to be enabled.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_TRANSMITTER_ENABLE_OPTION 0x00000080
|
|
|
|
/**< XAE_RECEIVER_ENABLE_OPTION specifies the Axi Ethernet device receiver to
|
|
* be enabled.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_RECEIVER_ENABLE_OPTION 0x00000100
|
|
|
|
/**< XAE_BROADCAST_OPTION specifies the Axi Ethernet device to receive frames
|
|
* sent to the broadcast Ethernet address.
|
|
* This driver sets this option to enabled (set) by default.
|
|
*/
|
|
#define XAE_BROADCAST_OPTION 0x00000200
|
|
|
|
/**< XAE_MULTICAST_OPTION specifies the Axi Ethernet device to receive frames
|
|
* sent to Ethernet addresses that are programmed into the Multicast Address
|
|
* Table (MAT).
|
|
* This driver sets this option to disabled (cleared) by default.
|
|
*/
|
|
#define XAE_MULTICAST_OPTION 0x00000400
|
|
|
|
/**< XAE_EXT_MULTICAST_OPTION specifies the Axi Ethernet device to receive
|
|
* frames sent to Ethernet addresses that are programmed into the Multicast
|
|
* Address Table.
|
|
* This driver sets this option to be dependent on HW configuration
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_MULTICAST_OPTION 0x00000800
|
|
|
|
/**< XAE_EXT_TXVLAN_TRAN_OPTION specifies the Axi Ethernet device to enable
|
|
* transmit VLAN translation.
|
|
* This driver sets this option to be dependent on HW configuration
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_TXVLAN_TRAN_OPTION 0x00001000
|
|
|
|
/**< XAE_EXT_RXVLAN_TRAN_OPTION specifies the Axi Ethernet device to enable
|
|
* receive VLAN translation.
|
|
* This driver sets this option to be dependent on HW configuration
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_RXVLAN_TRAN_OPTION 0x00002000
|
|
|
|
/**< XAE_EXT_TXVLAN_TAG_OPTION specifies the Axi Ethernet device to enable
|
|
* transmit VLAN tagging.
|
|
* This driver sets this option to be dependent during HW build time
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_TXVLAN_TAG_OPTION 0x00004000
|
|
|
|
/**< XAE_EXT_RXVLAN_TAG_OPTION specifies the Axi Ethernet device to enable
|
|
* receive VLAN tagging.
|
|
* This driver sets this option to be dependent during HW build time
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_RXVLAN_TAG_OPTION 0x00008000
|
|
|
|
/**< XAE_EXT_TXVLAN_STRP_OPTION specifies the Axi Ethernet device to enable
|
|
* transmit VLAN stripping.
|
|
* This driver sets this option to be dependent during HW build time
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_TXVLAN_STRP_OPTION 0x00010000
|
|
|
|
/**< XAE_EXT_RXVLAN_STRP_OPTION specifies the Axi Ethernet device to enable
|
|
* receive VLAN stripping.
|
|
* This driver sets this option to be dependent during HW build time
|
|
* by default.
|
|
*/
|
|
#define XAE_EXT_RXVLAN_STRP_OPTION 0x00020000
|
|
|
|
|
|
#define XAE_DEFAULT_OPTIONS \
|
|
(XAE_FLOW_CONTROL_OPTION | \
|
|
XAE_BROADCAST_OPTION | \
|
|
XAE_FCS_INSERT_OPTION | \
|
|
XAE_FCS_STRIP_OPTION | \
|
|
XAE_LENTYPE_ERR_OPTION | \
|
|
XAE_TRANSMITTER_ENABLE_OPTION | \
|
|
XAE_RECEIVER_ENABLE_OPTION)
|
|
/**< XAE_DEFAULT_OPTIONS specify the options set in XAxiEthernet_Reset() and
|
|
* XAxiEthernet_CfgInitialize()
|
|
*/
|
|
/*@}*/
|
|
|
|
|
|
#define XAE_MULTI_MAT_ENTRIES 4 /**< Number of storable addresses in
|
|
* the Multicast Address Table
|
|
*/
|
|
|
|
#define XAE_MDIO_DIV_DFT 29 /**< Default MDIO clock divisor */
|
|
|
|
/*
|
|
* The next few constants help upper layers determine the size of memory
|
|
* pools used for Ethernet buffers and descriptor lists.
|
|
*/
|
|
#define XAE_MAC_ADDR_SIZE 6 /* MAC addresses are 6 bytes */
|
|
#define XAE_MTU 1500 /* Max MTU size of an Ethernet
|
|
* frame
|
|
*/
|
|
#define XAE_JUMBO_MTU 8982 /* Max MTU size of a jumbo
|
|
* Ethernet frame
|
|
*/
|
|
#define XAE_HDR_SIZE 14 /* Size of an Ethernet header*/
|
|
#define XAE_HDR_VLAN_SIZE 18 /* Size of an Ethernet header
|
|
* with VLAN
|
|
*/
|
|
#define XAE_TRL_SIZE 4 /* Size of an Ethernet trailer
|
|
* (FCS)
|
|
*/
|
|
#define XAE_MAX_FRAME_SIZE (XAE_MTU + XAE_HDR_SIZE + XAE_TRL_SIZE)
|
|
#define XAE_MAX_VLAN_FRAME_SIZE (XAE_MTU + XAE_HDR_VLAN_SIZE + XAE_TRL_SIZE)
|
|
#define XAE_MAX_JUMBO_FRAME_SIZE (XAE_JUMBO_MTU + XAE_HDR_SIZE + XAE_TRL_SIZE)
|
|
|
|
/*
|
|
* Constant values returned by XAxiEthernet_GetPhysicalInterface(). Note that
|
|
* these values match design parameters from the Axi Ethernet spec.
|
|
*/
|
|
#define XAE_PHY_TYPE_MII 0
|
|
#define XAE_PHY_TYPE_GMII 1
|
|
#define XAE_PHY_TYPE_RGMII_1_3 2
|
|
#define XAE_PHY_TYPE_RGMII_2_0 3
|
|
#define XAE_PHY_TYPE_SGMII 4
|
|
#define XAE_PHY_TYPE_1000BASE_X 5
|
|
|
|
#define XAE_TPID_MAX_ENTRIES 4 /* Number of storable TPIDs in
|
|
* Table
|
|
*/
|
|
|
|
/*
|
|
* Constant values pass into XAxiEthernet_SetV[tag|Strp]Mode() and returned by
|
|
* XAxiEthernet_GetV[tag|Strp]Mode().
|
|
*/
|
|
#define XAE_VTAG_NONE 0 /* No tagging */
|
|
#define XAE_VTAG_ALL 1 /* Tag all frames */
|
|
#define XAE_VTAG_EXISTED 2 /* Tag already tagged frames */
|
|
#define XAE_VTAG_SELECT 3 /*
|
|
* Tag selected already tagged
|
|
* frames
|
|
*/
|
|
#define XAE_DEFAULT_TXVTAG_MODE XAE_VTAG_ALL
|
|
#define XAE_DEFAULT_RXVTAG_MODE XAE_VTAG_ALL
|
|
|
|
#define XAE_VSTRP_NONE 0 /* No stripping */
|
|
#define XAE_VSTRP_ALL 1 /* Strip one tag from all
|
|
* frames
|
|
*/
|
|
#define XAE_VSTRP_SELECT 3 /* Strip one tag from selected
|
|
* frames
|
|
*/
|
|
#define XAE_DEFAULT_TXVSTRP_MODE XAE_VSTRP_ALL
|
|
#define XAE_DEFAULT_RXVSTRP_MODE XAE_VSTRP_ALL
|
|
|
|
#define XAE_RX 1 /* Receive direction */
|
|
#define XAE_TX 2 /* Transmit direction */
|
|
|
|
#define XAE_SOFT_TEMAC_10_100_MBPS 0
|
|
#define XAE_SOFT_TEMAC_10_100_1000_MBPS 1
|
|
#define XAE_HARD_TEMC 2
|
|
|
|
/**************************** Type Definitions *******************************/
|
|
|
|
|
|
/**
|
|
* This typedef contains configuration information for a Axi Ethernet device.
|
|
*/
|
|
typedef struct XAxiEthernet_Config {
|
|
u16 DeviceId; /**< DeviceId is the unique ID of the device */
|
|
u32 BaseAddress;/**< BaseAddress is the physical base address of the
|
|
* device's registers
|
|
*/
|
|
u8 TemacType; /**< Temac Type can have 3 possible values. They are
|
|
* 0 for SoftTemac at 10/100 Mbps, 1 for SoftTemac
|
|
* at 10/100/1000 Mbps and 2 for Vitex6 Hard Temac
|
|
*/
|
|
u8 TxCsum; /**< TxCsum indicates that the device has checksum
|
|
* offload on the Tx channel or not.
|
|
*/
|
|
u8 RxCsum; /**< RxCsum indicates that the device has checksum
|
|
* offload on the Rx channel or not.
|
|
*/
|
|
u8 PhyType; /**< PhyType indicates which type of PHY interface is
|
|
* used (MII, GMII, RGMII, etc.
|
|
*/
|
|
u8 TxVlanTran; /**< TX VLAN Translation indication */
|
|
u8 RxVlanTran; /**< RX VLAN Translation indication */
|
|
u8 TxVlanTag; /**< TX VLAN tagging indication */
|
|
u8 RxVlanTag; /**< RX VLAN tagging indication */
|
|
u8 TxVlanStrp; /**< TX VLAN stripping indication */
|
|
u8 RxVlanStrp; /**< RX VLAN stripping indication */
|
|
u8 ExtMcast; /**< Extend multicast indication */
|
|
u8 Stats; /**< Statistics gathering option */
|
|
u8 Avb; /**< Avb option */
|
|
u8 EnableSgmiiOverLvds; /**< Enable LVDS option */
|
|
|
|
u8 TemacIntr; /**< Axi Ethernet interrupt ID */
|
|
|
|
int AxiDevType; /**< AxiDevType is the type of device attached to the
|
|
* Axi Ethernet's AXI4-Stream interface.
|
|
*/
|
|
u32 AxiDevBaseAddress; /**< AxiDevBaseAddress is the base address of
|
|
* the device attached to the Axi Ethernet's
|
|
* AXI4-Stream interface.
|
|
*/
|
|
u8 AxiFifoIntr; /**< AxiFifoIntr interrupt ID (unused if DMA) */
|
|
u8 AxiDmaRxIntr;/**< Axi DMA RX interrupt ID (unused if FIFO) */
|
|
u8 AxiDmaTxIntr;/**< Axi DMA TX interrupt ID (unused if FIFO) */
|
|
} XAxiEthernet_Config;
|
|
|
|
|
|
/**
|
|
* struct XAxiEthernet is the type for Axi Ethernet driver instance data.
|
|
* The calling code is required to use a unique instance of this structure
|
|
* for every Axi Ethernet device used in the system. A reference to a structure
|
|
* of this type is then passed to the driver API functions.
|
|
*/
|
|
typedef struct XAxiEthernet {
|
|
XAxiEthernet_Config Config; /**< Hardware configuration */
|
|
u32 IsStarted; /**< Device is currently started */
|
|
u32 IsReady; /**< Device is initialized and ready */
|
|
u32 Options; /**< Current options word */
|
|
u32 Flags; /**< Internal driver flags */
|
|
} XAxiEthernet;
|
|
|
|
|
|
/***************** Macros (Inline Functions) Definitions *********************/
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsStarted reports if the device is in the started or stopped
|
|
* state. To be in the started state, the calling code must have made a
|
|
* successful call to <i>XAxiEthernet_Start</i>. To be in the stopped state,
|
|
* <i>XAxiEthernet_Stop</i> or <i>XAxiEthernet_CfgInitialize</i> function must
|
|
* have been called.
|
|
*
|
|
* @param InstancePtr is a pointer to the of Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device has been started.
|
|
* - FALSE.if the device has not been started
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsStarted(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsStarted(InstancePtr) \
|
|
(((InstancePtr)->IsStarted == XIL_COMPONENT_IS_STARTED) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsDma reports if the device is currently connected to DMA.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
* @return
|
|
* - TRUE if the Axi Ethernet device is connected DMA.
|
|
* - FALSE.if the Axi Ethernet device is NOT connected to DMA
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsDma(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsDma(InstancePtr) \
|
|
(((InstancePtr)->Config.AxiDevType == XPAR_AXI_DMA) ? TRUE: FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsFifo reports if the device is currently connected to a fifo
|
|
* core.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the Axi Ethernet device is connected to a fifo
|
|
* - FALSE if the Axi Ethernet device is NOT connected to a fifo.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsFifo(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsFifo(InstancePtr) \
|
|
(((InstancePtr)->Config.AxiDevType == XPAR_AXI_FIFO) ? TRUE: FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_AxiDevBaseAddress reports the base address of the core connected
|
|
* to the Axi Ethernet's Axi4 Stream interface.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return The base address of the core connected to the Axi Ethernet's
|
|
* streaming interface.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_AxiDevBaseAddress(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_AxiDevBaseAddress(InstancePtr) \
|
|
((InstancePtr)->Config.AxiDevBaseAddress)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsRecvFrameDropped determines if the device thinks it has
|
|
* dropped a receive frame. The device interrupt status register is read to
|
|
* determine this.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if a frame has been dropped
|
|
* - FALSE if a frame has NOT been dropped.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsRecvFrameDropped(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsRecvFrameDropped(InstancePtr) \
|
|
((XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_IS_OFFSET) & XAE_INT_RXRJECT_MASK) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsRxPartialCsum determines if the device is configured with
|
|
* partial checksum offloading on the receive channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
* @return
|
|
* - TRUE if the device is configured with partial checksum
|
|
* offloading on the receive channel.
|
|
* - FALSE.if the device is not configured with partial checksum
|
|
* offloading on the receive side.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsRxPartialCsum(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsRxPartialCsum(InstancePtr) \
|
|
((((InstancePtr)->Config.RxCsum) == 0x01) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsTxPartialCsum determines if the device is configured with
|
|
* partial checksum offloading on the transmit channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with partial checksum
|
|
* offloading on the transmit side.
|
|
* - FALSE.if the device is not configured with partial checksum
|
|
* offloading on the transmit side.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsTxPartialCsum(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsTxPartialCsum(InstancePtr) \
|
|
((((InstancePtr)->Config.TxCsum) == 0x01) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsRxFullCsum determines if the device is configured with full
|
|
* checksum offloading on the receive channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
* @return
|
|
* - TRUE if the device is configured with full checksum
|
|
* offloading on the receive channel.
|
|
* - FALSE.if the device is not configured with full checksum
|
|
* offloading on the receive side.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsRxFullCsum(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsRxFullCsum(InstancePtr) \
|
|
((((InstancePtr)->Config.RxCsum) == 0x02) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsTxFullCsum determines if the device is configured with full
|
|
* checksum offloading on the transmit channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with full checksum
|
|
* offloading on the transmit side.
|
|
* - FALSE.if the device is not configured with full checksum
|
|
* offloading on the transmit side.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsTxFullCsum(XAxiEthernet *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_IsTxFullCsum(InstancePtr) \
|
|
((((InstancePtr)->Config.TxCsum) == 0x02) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_GetPhysicalInterface returns the type of PHY interface being
|
|
* used by the given instance, specified by <i>InstancePtr</i>.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return The Physical Interface type which is one of XAE_PHY_TYPE_x
|
|
* where x is MII, GMII, RGMII_1_3, RGMII_2_0, SGMII, or
|
|
* 1000BASE_X (defined in xaxiethernet.h).
|
|
*
|
|
* @note C-style signature:
|
|
* int XAxiEthernet_GetPhysicalInterface(XAxiEthernet
|
|
* *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XAxiEthernet_GetPhysicalInterface(InstancePtr) \
|
|
((InstancePtr)->Config.PhyType)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_GetIntStatus returns a bit mask of the interrupt status
|
|
* register (ISR). XAxiEthernet_GetIntStatus can be used to query the status
|
|
* without having to have interrupts enabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return Returns a bit mask of the interrupt status conditions. The
|
|
* mask will be a set of bit wise or'd values from the
|
|
* <code>XAE_INT_*_MASK</code> definitions in xaxitemac_hw.h file.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_GetIntStatus(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_GetIntStatus(InstancePtr) \
|
|
XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, XAE_IS_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IntEnable enables the interrupts specified in <i>Mask</i>. The
|
|
* corresponding interrupt for each bit set to 1 in <i>Mask</i>, will be
|
|
* enabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @param Mask contains a bit mask of the interrupts to enable. The mask
|
|
* can be formed using a set of bit wise or'd values from the
|
|
* <code>XAE_INT_*_MASK</code> definitions in xaxitemac_hw.h file.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XAxiEthernet_IntEnable(XAxiEthernet *InstancePtr,
|
|
* u32 Mask)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IntEnable(InstancePtr, Mask) \
|
|
XAxiEthernet_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_IE_OFFSET, \
|
|
XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_IE_OFFSET) | ((Mask) & XAE_INT_ALL_MASK));
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IntDisable disables the interrupts specified in <i>Mask</i>. The
|
|
* corresponding interrupt for each bit set to 1 in <i>Mask</i>, will be
|
|
* disabled. In other words, XAxiEthernet_IntDisable uses the "set a bit to
|
|
* clear it" scheme.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
* @param Mask contains a bit mask of the interrupts to disable. The mask
|
|
* can be formed using a set of bit wise or'd values from the
|
|
* <code>XAE_INT_*_MASK</code> definitions in xaxitemac_hw.h file
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XAxiEthernet_IntDisable(XAxiEthernet *InstancePtr,
|
|
* u32 Mask)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IntDisable(InstancePtr, Mask) \
|
|
XAxiEthernet_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_IE_OFFSET, \
|
|
XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_IE_OFFSET) & ~((Mask) & XAE_INT_ALL_MASK));
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IntPending returns a bit mask of the pending interrupts. Each
|
|
* bit set to 1 in the return value represents a pending interrupt.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return Returns a bit mask of the interrupts that are pending. The mask
|
|
* will be a set of bit wise or'd values from the
|
|
* <code>XAE_INT_*_MASK</code> definitions in xaxitemac_hw.h file.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IntPending(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IntPending(InstancePtr) \
|
|
XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, XAE_IP_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IntClear clears pending interrupts specified in <i>Mask</i>.
|
|
* The corresponding pending interrupt for each bit set to 1 in <i>Mask</i>,
|
|
* will be cleared. In other words, XAxiEthernet_IntClear uses the "set a bit to
|
|
* clear it" scheme.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
* @param Mask contains a bit mask of the pending interrupts to clear.
|
|
* The mask can be formed using a set of bit wise or'd values from
|
|
* the <code>XAE_INT_*_MASK</code> definitions in xaxitemac_hw.h
|
|
* file.
|
|
*
|
|
* @note C-style signature:
|
|
* void XAxiEthernet_IntClear(XAxiEthernet *InstancePtr,
|
|
* u32 Mask)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IntClear(InstancePtr, Mask) \
|
|
XAxiEthernet_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_IS_OFFSET, ((Mask) & XAE_INT_ALL_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsExtFuncCap determines if the device is capable of the
|
|
* new/extend VLAN and multicast features.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is capable and configured with extended
|
|
* Multicast and VLAN Tagging/Stripping and Translation.
|
|
* - TRUE if the device is NOT capable and NOT configured with
|
|
* extended Multicast and VLAN Tagging/Stripping and
|
|
* Translation.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsExtFuncCap(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsExtFuncCap(InstancePtr) \
|
|
((XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_RAF_OFFSET) & XAE_RAF_NEWFNCENBL_MASK) ? \
|
|
TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsExtMcastEnable determines if the extended multicast features
|
|
* is enabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the extended multicast features are enabled.
|
|
* - FALSE if the extended multicast features are NOT enabled
|
|
*
|
|
* @note : This function indicates when extended Multicast is enabled in
|
|
* HW, extended multicast mode in wrapper can be tested.
|
|
*
|
|
* C-style signature:
|
|
* u32 XAxiEthernet_IsExtMcastEnable(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsExtMcastEnable(InstancePtr) \
|
|
((XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XAE_RAF_OFFSET) & XAE_RAF_EMULTIFLTRENBL_MASK) ? \
|
|
TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsExtMcast determines if the device is built with new/extended
|
|
* multicast features.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is built with extended multicast features.
|
|
* - FALSE if the device is not built with the extended multicast
|
|
* features.
|
|
*
|
|
* @note This function indicates when hardware is built with extended
|
|
* Multicast feature.
|
|
*
|
|
* C-style signature:
|
|
* u32 XAxiEthernet_IsExtMcast(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsExtMcast(InstancePtr) \
|
|
(((InstancePtr)->Config.ExtMcast) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsTxVlanStrp determines if the device is configured with transmit
|
|
* VLAN stripping on the transmit channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* VLAN stripping on the Transmit channel.
|
|
* - FALSE if the device is NOT configured with
|
|
* VLAN stripping on the Transmit channel.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsTxVlanStrp(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsTxVlanStrp(InstancePtr) \
|
|
(((InstancePtr)->Config.TxVlanStrp) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsRxVlanStrp determines if the device is configured with receive
|
|
* VLAN stripping on the receive channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* VLAN stripping on the Receive channel.
|
|
* - FALSE if the device is NOT configured with
|
|
* VLAN stripping on the Receive channel.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsRxVlanTran(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsRxVlanStrp(InstancePtr) \
|
|
(((InstancePtr)->Config.RxVlanStrp) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsTxVlanTran determines if the device is configured with
|
|
* transmit VLAN translation on the transmit channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* VLAN translation on the Transmit channel.
|
|
* - FALSE if the device is NOT configured with
|
|
* VLAN translation on the Transmit channel.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsTxVlanTran(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsTxVlanTran(InstancePtr) \
|
|
(((InstancePtr)->Config.TxVlanTran) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsRxVlanTran determines if the device is configured with receive
|
|
* VLAN translation on the receive channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* VLAN translation on the Receive channel.
|
|
* - FALSE if the device is NOT configured with
|
|
* VLAN translation on the Receive channel.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsRxVlanTran(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsRxVlanTran(InstancePtr) \
|
|
(((InstancePtr)->Config.RxVlanTran) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsTxVlanTag determines if the device is configured with transmit
|
|
* VLAN tagging on the transmit channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* VLAN tagging on the Transmit channel.
|
|
* - FALSE if the device is NOT configured with
|
|
* VLAN tagging on the Transmit channel.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsTxVlanTag(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsTxVlanTag(InstancePtr) \
|
|
(((InstancePtr)->Config.TxVlanTag) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsRxVlanTag determines if the device is configured with receive
|
|
* VLAN tagging on the receive channel.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* VLAN tagging on the Receive channel.
|
|
* - FALSE if the device is NOT configured with
|
|
* VLAN tagging on the Receive channel.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsRxVlanTag(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsRxVlanTag(InstancePtr) \
|
|
(((InstancePtr)->Config.RxVlanTag) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_GetTemacType returns the Axi Ethernet type of the core.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - Returns the values of TemacType, which can be
|
|
* XAE_SOFT_TEMAC_10_100_MBPS (0) for Soft Temac Core with
|
|
* speed 10/100 Mbps.
|
|
* XAE_SOFT_TEMAC_10_100_1000_MBPS (1) for Soft Temac core with
|
|
* speed 10/100/1000 Mbps
|
|
* XAE_HARD_TEMC (2) for Hard Temac Core for Virtex-6
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_GetTemacType(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_GetTemacType(InstancePtr) \
|
|
((InstancePtr)->Config.TemacType)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsAvbConfigured returns determines if Ethernet AVB.is configured
|
|
* in the harwdare or not.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* Ethernet AVB.
|
|
* - FALSE if the device is NOT configured with
|
|
* Ethernet AVB.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsAvbConfigured(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsAvbConfigured(InstancePtr) \
|
|
(((InstancePtr)->Config.Avb) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsSgmiiOverLvdsEnabled determines if SGMII over LVDS is enabled
|
|
* in the harwdare or not.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if the device is configured with
|
|
* SGMII over LVDS.
|
|
* - FALSE if the device is NOT configured with
|
|
* SGMII over LVDS.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XAxiEthernet_IsSgmiiOverLvdsEnabled(XAxiEthernet *InstancePtr)
|
|
*
|
|
*****************************************************************************/
|
|
#define XAxiEthernet_IsSgmiiOverLvdsEnabled(InstancePtr) \
|
|
(((InstancePtr)->Config.EnableSgmiiOverLvds) ? TRUE : FALSE)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* XAxiEthernet_IsStatsConfigured returns determines if Statistics gathering.
|
|
* is configured in the harwdare or not.
|
|
*
|
|
* @param InstancePtr is a pointer to the Axi Ethernet instance to be
|
|
* worked on.
|
|
*
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* @return
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* - TRUE if the device is configured with
|
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* statistics gathering.
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* - FALSE if the device is NOT configured with
|
|
* statistics gathering.
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*
|
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* @note C-style signature:
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|
* u32 XAxiEthernet_IsStatsConfigured(XAxiEthernet *InstancePtr)
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*
|
|
*****************************************************************************/
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#define XAxiEthernet_IsStatsConfigured(InstancePtr) \
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(((InstancePtr)->Config.Stats) ? TRUE : FALSE)
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/************************** Function Prototypes ******************************/
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/*
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* Initialization functions in xaxiethernet.c
|
|
*/
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|
int XAxiEthernet_CfgInitialize(XAxiEthernet *InstancePtr,
|
|
XAxiEthernet_Config *CfgPtr,u32 VirtualAddress);
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|
void XAxiEthernet_Start(XAxiEthernet *InstancePtr);
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void XAxiEthernet_Stop(XAxiEthernet *InstancePtr);
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|
void XAxiEthernet_Reset(XAxiEthernet *InstancePtr);
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|
|
|
/*
|
|
* Initialization functions in xaxitemac_sinit.c
|
|
*/
|
|
XAxiEthernet_Config *XAxiEthernet_LookupConfig(u16 DeviceId);
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|
|
|
/*
|
|
* MAC configuration/control functions in xaxitemac_control.c
|
|
*/
|
|
int XAxiEthernet_SetOptions(XAxiEthernet *InstancePtr, u32 Options);
|
|
int XAxiEthernet_ClearOptions(XAxiEthernet *InstancePtr, u32 Options);
|
|
u32 XAxiEthernet_GetOptions(XAxiEthernet *InstancePtr);
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|
|
|
int XAxiEthernet_SetMacAddress(XAxiEthernet *InstancePtr, void *AddressPtr);
|
|
void XAxiEthernet_GetMacAddress(XAxiEthernet *InstancePtr, void *AddressPtr);
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|
|
|
int XAxiEthernet_SetMacPauseAddress(XAxiEthernet *InstancePtr,
|
|
void *AddressPtr);
|
|
void XAxiEthernet_GetMacPauseAddress(XAxiEthernet *InstancePtr,
|
|
void *AddressPtr);
|
|
int XAxiEthernet_SendPausePacket(XAxiEthernet *InstancePtr, u16 PauseValue);
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|
|
|
int XAxiEthernet_GetSgmiiStatus(XAxiEthernet *InstancePtr, u16 *SpeedPtr);
|
|
int XAxiEthernet_GetRgmiiStatus(XAxiEthernet *InstancePtr, u16 *SpeedPtr,
|
|
int *IsFullDuplexPtr, int *IsLinkUpPtr);
|
|
u16 XAxiEthernet_GetOperatingSpeed(XAxiEthernet *InstancePtr);
|
|
int XAxiEthernet_SetOperatingSpeed(XAxiEthernet *InstancePtr, u16 Speed);
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|
|
|
void XAxiEthernet_SetBadFrmRcvOption(XAxiEthernet *InstancePtr);
|
|
void XAxiEthernet_ClearBadFrmRcvOption(XAxiEthernet *InstancePtr);
|
|
|
|
void XAxiEthernet_DisableControlFrameLenCheck(XAxiEthernet *InstancePtr);
|
|
void XAxiEthernet_EnableControlFrameLenCheck(XAxiEthernet *InstancePtr);
|
|
|
|
void XAxiEthernet_PhySetMdioDivisor(XAxiEthernet *InstancePtr, u8 Divisor);
|
|
void XAxiEthernet_PhyRead(XAxiEthernet *InstancePtr, u32 PhyAddress,
|
|
u32 RegisterNum, u16 *PhyDataPtr);
|
|
void XAxiEthernet_PhyWrite(XAxiEthernet *InstancePtr, u32 PhyAddress,
|
|
u32 RegisterNum, u16 PhyData);
|
|
int XAxiEthernet_MulticastAdd(XAxiEthernet *InstancePtr, void *AddressPtr,
|
|
int Entry);
|
|
void XAxiEthernet_MulticastGet(XAxiEthernet *InstancePtr, void *AddressPtr,
|
|
int Entry);
|
|
int XAxiEthernet_MulticastClear(XAxiEthernet *InstancePtr, int Entry);
|
|
|
|
int XAxiEthernet_SetTpid(XAxiEthernet *InstancePtr, u16 Tpid, u8 Entry);
|
|
int XAxiEthernet_ClearTpid(XAxiEthernet *InstancePtr, u8 Entry);
|
|
void XAxiEthernet_GetTpid(XAxiEthernet *InstancePtr, u16 *TpidPtr, u8 Entry);
|
|
|
|
int XAxiEthernet_SetVTagMode(XAxiEthernet *InstancePtr, u32 Mode, int Dir);
|
|
void XAxiEthernet_GetVTagMode(XAxiEthernet *InstancePtr, u8 *ModePtr, int Dir);
|
|
|
|
int XAxiEthernet_SetVStripMode(XAxiEthernet *InstancePtr, u32 Mode, int Dir);
|
|
void XAxiEthernet_GetVStripMode(XAxiEthernet *InstancePtr, u8 *ModePtr,
|
|
int Dir);
|
|
|
|
int XAxiEthernet_SetVTagValue(XAxiEthernet *InstancePtr, u32 VTagValue,
|
|
int Dir);
|
|
void XAxiEthernet_GetVTagValue(XAxiEthernet *InstancePtr, u32 *VTagValuePtr,
|
|
int Dir);
|
|
|
|
int XAxiEthernet_SetVidTable(XAxiEthernet *InstancePtr, u32 Entry, u32 Vid,
|
|
u8 Strip, u8 Tag, int Dir);
|
|
void XAxiEthernet_GetVidTable(XAxiEthernet *InstancePtr, u32 Entry, u32 *VidPtr,
|
|
u8 *StripPtr, u8 *TagPtr, int Dir);
|
|
|
|
int XAxiEthernet_AddExtMulticastGroup(XAxiEthernet *InstancePtr,
|
|
void *AddressPtr);
|
|
int XAxiEthernet_ClearExtMulticastGroup(XAxiEthernet *InstancePtr,
|
|
void *AddressPtr);
|
|
int XAxiEthernet_GetExtMulticastGroup(XAxiEthernet *InstancePtr,
|
|
void *AddressPtr);
|
|
void XAxiEthernet_DumpExtMulticastGroup(XAxiEthernet *InstancePtr);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* end of protection macro */
|