eb0a7a4ae0
This patch updates the copy right to 2015. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
339 lines
11 KiB
C
Executable file
339 lines
11 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xaxidma_bd.c
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*
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* Buffer descriptor (BD) management API implementation.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a jz 05/18/10 First release
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* 2.00a jz 08/10/10 Second release, added in xaxidma_g.c, xaxidma_sinit.c,
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* updated tcl file, added xaxidma_porting_guide.h
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* 3.00a jz 11/22/10 Support IP core parameters change
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* 6.00a srt 01/24/12 Added support for Multi-Channel DMA.
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* - Changed APIs
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* * XAxiDma_BdSetLength(XAxiDma_Bd *BdPtr,
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* u32 LenBytes, u32 LengthMask)
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* * XAxiDma_BdGetActualLength(BdPtr, LengthMask)
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* * XAxiDma_BdGetLength(BdPtr, LengthMask)
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* 8.0 srt 01/29/14 Added support for Micro DMA Mode:
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* - New API
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* XAxiDma_BdSetBufAddrMicroMode(XAxiDma_Bd*, u32)
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*
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* </pre>
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*
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*****************************************************************************/
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#include "xaxidma_bd.h"
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/************************** Function Prototypes ******************************/
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/*****************************************************************************/
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/**
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* Set the length field for the given BD.
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*
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* Length has to be non-zero and less than LengthMask.
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*
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* For TX channels, the value passed in should be the number of bytes to
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* transmit from the TX buffer associated with the given BD.
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*
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* For RX channels, the value passed in should be the size of the RX buffer
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* associated with the given BD in bytes. This is to notify the RX channel
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* the capability of the RX buffer to avoid buffer overflow.
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*
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* The actual receive length can be equal or smaller than the specified length.
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* The actual transfer length will be updated by the hardware in the
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* XAXIDMA_BD_STS_OFFSET word in the BD.
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*
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* @param BdPtr is the BD to operate on.
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* @param LenBytes is the requested transfer length
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* @param LengthMask is the maximum transfer length
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*
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* @returns
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* - XST_SUCCESS for success
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* - XST_INVALID_PARAM for invalid BD length
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*
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* @note This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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int XAxiDma_BdSetLength(XAxiDma_Bd *BdPtr, u32 LenBytes, u32 LengthMask)
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{
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if (LenBytes <= 0 || (LenBytes > LengthMask)) {
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xdbg_printf(XDBG_DEBUG_ERROR, "invalid length %d\n",
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(int)LenBytes);
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return XST_INVALID_PARAM;
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}
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XAxiDma_BdWrite((BdPtr), XAXIDMA_BD_CTRL_LEN_OFFSET,
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((XAxiDma_BdRead((BdPtr), XAXIDMA_BD_CTRL_LEN_OFFSET) & \
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~LengthMask)) | LenBytes);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* Set the BD's buffer address.
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*
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* @param BdPtr is the BD to operate on
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* @param Addr is the address to set
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*
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* @return
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* - XST_SUCCESS if buffer address set successfully
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* - XST_INVALID_PARAM if hardware has no DRE and address is not
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* aligned
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*
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* @note This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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int XAxiDma_BdSetBufAddr(XAxiDma_Bd* BdPtr, u32 Addr)
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{
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u32 HasDRE;
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u8 WordLen;
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HasDRE = XAxiDma_BdRead(BdPtr, XAXIDMA_BD_HAS_DRE_OFFSET);
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WordLen = HasDRE & XAXIDMA_BD_WORDLEN_MASK;
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if (Addr & (WordLen - 1)) {
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if ((HasDRE & XAXIDMA_BD_HAS_DRE_MASK) == 0) {
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xil_printf("Error set buf addr %x with %x and %x,"
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" %x\r\n",Addr, HasDRE, (WordLen - 1),
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Addr & (WordLen - 1));
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return XST_INVALID_PARAM;
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}
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}
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XAxiDma_BdWrite(BdPtr, XAXIDMA_BD_BUFA_OFFSET, Addr);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* Set the BD's buffer address when configured for Micro Mode. The buffer
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* address should be 4K aligned.
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*
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* @param BdPtr is the BD to operate on
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* @param Addr is the address to set
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*
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* @return
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* - XST_SUCCESS if buffer address set successfully
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* - XST_INVALID_PARAM if hardware has no DRE and address is not
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* aligned
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*
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* @note This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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int XAxiDma_BdSetBufAddrMicroMode(XAxiDma_Bd* BdPtr, u32 Addr)
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{
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if (Addr & XAXIDMA_MICROMODE_MIN_BUF_ALIGN) {
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xil_printf("Error set buf addr %x and %x,"
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" %x\r\n", Addr, XAXIDMA_MICROMODE_MIN_BUF_ALIGN,
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Addr & XAXIDMA_MICROMODE_MIN_BUF_ALIGN);
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return XST_INVALID_PARAM;
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}
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XAxiDma_BdWrite(BdPtr, XAXIDMA_BD_BUFA_OFFSET, Addr);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* Set the APP word at the specified APP word offset for a BD.
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*
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* @param BdPtr is the BD to operate on.
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* @param Offset is the offset inside the APP word, it is valid from
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* 0 to 4
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* @param Word is the value to set
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*
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* @returns
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* - XST_SUCCESS for success
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* - XST_INVALID_PARAM under following error conditions:
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* 1) StsCntrlStrm is not built in hardware
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* 2) Offset is not in valid range
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*
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* @note
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* If the hardware build has C_SG_USE_STSAPP_LENGTH set to 1,
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* then the last APP word, XAXIDMA_LAST_APPWORD, must have
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* non-zero value when AND with 0x7FFFFF. Not doing so will cause
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* the hardware to stall.
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* This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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int XAxiDma_BdSetAppWord(XAxiDma_Bd* BdPtr, int Offset, u32 Word)
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{
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if (XAxiDma_BdRead(BdPtr, XAXIDMA_BD_HAS_STSCNTRL_OFFSET) == 0) {
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xdbg_printf(XDBG_DEBUG_ERROR, "BdRingSetAppWord: no sts cntrl"
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"stream in hardware build, cannot set app word\r\n");
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return XST_INVALID_PARAM;
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}
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if ((Offset < 0) || (Offset > XAXIDMA_LAST_APPWORD)) {
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xdbg_printf(XDBG_DEBUG_ERROR, "BdRingSetAppWord: invalid"
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"offset %d",Offset);
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return XST_INVALID_PARAM;
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}
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XAxiDma_BdWrite(BdPtr, XAXIDMA_BD_USR0_OFFSET + Offset * 4, Word);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* Get the APP word at the specified APP word offset for a BD.
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*
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* @param BdPtr is the BD to operate on.
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* @param Offset is the offset inside the APP word, it is valid from
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* 0 to 4
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* @param Valid is to tell the caller whether parameters are valid
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*
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* @returns
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* The APP word. Passed in parameter Valid holds 0 for failure,
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* and 1 for success.
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*
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* @note This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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u32 XAxiDma_BdGetAppWord(XAxiDma_Bd* BdPtr, int Offset, int *Valid)
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{
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*Valid = 0;
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if (XAxiDma_BdRead(BdPtr, XAXIDMA_BD_HAS_STSCNTRL_OFFSET) == 0) {
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xdbg_printf(XDBG_DEBUG_ERROR, "BdRingGetAppWord: no sts cntrl "
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"stream in hardware build, no app word available\r\n");
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return (u32)0;
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}
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if((Offset < 0) || (Offset > XAXIDMA_LAST_APPWORD)) {
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xdbg_printf(XDBG_DEBUG_ERROR, "BdRingGetAppWord: invalid"
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" offset %d", Offset);
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return (u32)0;
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}
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*Valid = 1;
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return XAxiDma_BdRead(BdPtr, XAXIDMA_BD_USR0_OFFSET + Offset * 4);
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}
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/*****************************************************************************/
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/**
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* Set the control bits for a BD.
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*
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* @param BdPtr is the BD to operate on.
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* @param Data is the bit value to set
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*
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* @return None
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*
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* @note This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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void XAxiDma_BdSetCtrl(XAxiDma_Bd* BdPtr, u32 Data)
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{
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u32 RegValue = XAxiDma_BdRead(BdPtr, XAXIDMA_BD_CTRL_LEN_OFFSET);
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RegValue &= ~XAXIDMA_BD_CTRL_ALL_MASK;
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RegValue |= (Data & XAXIDMA_BD_CTRL_ALL_MASK);
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XAxiDma_BdWrite((BdPtr), XAXIDMA_BD_CTRL_LEN_OFFSET, RegValue);
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return;
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}
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/*****************************************************************************/
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/**
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* Dump the fields of a BD.
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*
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* @param BdPtr is the BD to operate on.
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*
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* @return None
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*
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* @note This function can be used only when DMA is in SG mode
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*
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*****************************************************************************/
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void XAxiDma_DumpBd(XAxiDma_Bd* BdPtr)
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{
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xil_printf("Dump BD %x:\r\n", (unsigned int)BdPtr);
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xil_printf("\tNext Bd Ptr: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_NDESC_OFFSET));
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xil_printf("\tBuff addr: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_BUFA_OFFSET));
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xil_printf("\tMCDMA Fields: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_MCCTL_OFFSET));
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xil_printf("\tVSIZE_STRIDE: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr,
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XAXIDMA_BD_STRIDE_VSIZE_OFFSET));
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xil_printf("\tContrl len: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_CTRL_LEN_OFFSET));
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xil_printf("\tStatus: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_STS_OFFSET));
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xil_printf("\tAPP 0: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_USR0_OFFSET));
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xil_printf("\tAPP 1: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_USR1_OFFSET));
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xil_printf("\tAPP 2: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_USR2_OFFSET));
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xil_printf("\tAPP 3: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_USR3_OFFSET));
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xil_printf("\tAPP 4: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_USR4_OFFSET));
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xil_printf("\tSW ID: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_ID_OFFSET));
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xil_printf("\tStsCtrl: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr,
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XAXIDMA_BD_HAS_STSCNTRL_OFFSET));
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xil_printf("\tDRE: %x\r\n",
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(unsigned int)XAxiDma_BdRead(BdPtr, XAXIDMA_BD_HAS_DRE_OFFSET));
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xil_printf("\r\n");
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}
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