25f36a6485
fix incorrect documentation in xhwicap.h Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com>
724 lines
27 KiB
C
Executable file
724 lines
27 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xhwicap.h
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*
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* The Xilinx XHwIcap driver supports the Xilinx Hardware Internal Configuration
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* Access Port (HWICAP) device.
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*
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* The HWICAP device is used for reconfiguration of select FPGA resources
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* as well as loading partial bitstreams from the system memory through the
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* Internal Configuration Access Port (ICAP).
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*
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* The source code for the XHwIcap_SetClbBits and XHwIcap_GetClbBits
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* functions are not included. These functions are delivered as .o
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* files. These files have been compiled using gcc version 4.1.1.
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* Libgen uses the appropriate .o files for the target processor.
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*
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* <b> Initialization and Configuration </b>
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*
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* The device driver enables higher layer software (e.g., an application) to
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* communicate to the HWICAP device.
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*
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* XHwIcap_CfgInitialize() API is used to initialize the HWICAP device.
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* The user needs to first call the XHwIcap_LookupConfig() API which returns
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* the Configuration structure pointer which is passed as a parameter to the
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* XHwIcap_CfgInitialize() API.
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*
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* <b> Interrupts </b>
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*
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* The driver provides an interrupt handler XHwIcap_IntrHandler for handling
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* the interrupt from the HWICAP device. The users of this driver have to
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* register this handler with the interrupt system and provide the callback
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* functions. The callback functions are invoked by the interrupt handler based
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* on the interrupt source.
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*
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* The driver supports interrupt mode only for writing to the ICAP device and
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* is NOT supported for reading from the ICAP device.
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*
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* <b> Virtual Memory </b>
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*
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* This driver supports Virtual Memory. The RTOS is responsible for calculating
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* the correct device base address in Virtual Memory space.
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*
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* <b> Threads </b>
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*
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* This driver is not thread safe. Any needs for threads or thread mutual
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* exclusion must be satisfied by the layer above this driver.
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*
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* <b> Asserts </b>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining, at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development.
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*
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* <b> Building the driver </b>
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*
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* The XHwIcap driver is composed of several source files. This allows the user
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* to build and link only those parts of the driver that are necessary.
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*
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*
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* @note
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*
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* There are a few items to be aware of when using this driver:
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* 1) Only Virtex4, Virtex5, Virtex6, Spartan6, 7 series and Zynq devices are
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* supported.
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* 2) The ICAP port is disabled when the configuration mode, via the MODE pins,
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* is set to Boundary Scan/JTAG. The ICAP is enabled in all other configuration
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* modes and it is possible to configure the device via JTAG in all
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* configuration modes.
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* 3) Reading or writing to columns containing SRL16's or LUT RAM's can cause
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* corruption of data in those elements. Avoid reading or writing to columns
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* containing SRL16's or LUT RAM's.
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* 4) Only the LUT and SRL are accesible, all other features of the slice are
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* not available through this interface.
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* 5) The Spartan6 devices access is 16-bit access and is 32 bit for all
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* other devices.
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* 6) In a Zynq device the ICAP needs to be selected using the
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* XDcfg_SelectIcapInterface API of the DevCfg driver (clear the PCAP_PR bit
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* of Control register in the Device Config Interface) before it can be
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* accessed using the HwIcap.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a bjb 11/17/03 First release
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* 1.01a bjb 04/10/06 V4 Support
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* 2.00a sv 09/28/07 First release for the FIFO mode
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* 2.01a ecm 04/08/08 Updated data structures to include the V5FXT parts.
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* 3.00a sv 11/28/08 Added the API for initiating Abort while reading/writing
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* from the ICAP.
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* 3.01a sv 10/21/09 Corrected the IDCODE definitions for some of the
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* V5 FX parts in xhwicap_l.h. Corrected the V5 BOOTSTS and
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* CTL_1 Register definitions in xhwicap_i.h file as they
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* were wrongly defined.
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* 4.00a hvm 12/1/09 Added support for V6 and updated with HAL phase 1
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* modifications
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* 5.00a hvm 04/02/10 Added S6 device support
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* 5.01a hvm 07/06/10 In XHwIcap_DeviceRead function, a read bit mask
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* verification is added after all the data bytes are read
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* from READ FIFO.The Verification of the read bit mask
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* at the begining of reading of bytes is removed.
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* Removed the code that adds wrong data byte before the
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* CRC bytes in the XHwIcap_DeviceWriteFrame function for S6
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* (CR560534).
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* 5.02a hvm 10/06/10 Updated to support AXI HWICAP
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* 5.03a hvm 15/4/11 Updated with V6 CXT device definitions.
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*
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* 6.00a hvm 08/01/11 Added support for K7 devices.
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* 7.00a bss 03/14/12 Added support for 8/16/32 ICAP Data Widths - CR 620085
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* Added support for Lite Mode(no Write FIFO) - CR 601748
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* Added Virtex7,Artix7 and Zynq Idcodes-CR647140,CR643295
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* ReadId API is added to desync after lock up during
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* configuration CR 637538
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* 8.00a bss 06/20/12 Deleted ReadId API in xhwicap_srp.c and Hang mask
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* definition in xhwicap_l.h as per CR 656162
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* 8.01a bss 04/18/13 Updated xhwicap.c to fix compiler warnings. CR#704814
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* Added the define XHI_COR_1 for CR718042
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* 9.0 adk 19/12/13 Updated as per the New Tcl API's
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* 9.0 bss 02/20/14 Modified xhwicap.c, xhwicap_l.h, xhwicap_i.h and tcl
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* to support Kintex8, kintexu and virtex72000T family
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* devices.
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* 10.0 bss 6/24/14 Removed support for families older than 7 series.
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* Modified driver tcl not to generate family.h.
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* Removed IDCODE lookup logic in XHwIcap_CfgInitialize
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* in xhwicap.c.
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* Removed IDCODE macros from xhwicap_i.h.
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* 10.0 bss 7/10/14 Fix compilation failure for designs other than 32 bit
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* data width of HWICAP in xhwicap.c.
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*
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* </pre>
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*
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*****************************************************************************/
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#ifndef XHWICAP_H_ /* prevent circular inclusions */
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#define XHWICAP_H_ /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files ********************************/
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#include "xhwicap_i.h"
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#include "xhwicap_l.h"
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#include <xstatus.h>
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#include "xparameters.h"
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/************************** Constant Definitions ****************************/
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/************************** Type Definitions ********************************/
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/**************************** Type Definitions *******************************/
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/**
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* The handler data type allows the user to define a callback function to
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* handle the asynchronous processing of the HwIcap driver. The application
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* using this driver is expected to define a handler of this type to support
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* interrupt driven mode. The handler executes in an interrupt context such
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* that minimal processing should be performed.
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*
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* @param CallBackRef is a callback reference passed in by the
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* application layer when setting the callback functions, and
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* passed back to the upper layer when the callback is invoked.
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* Its type is unimportant to the driver component, so it is a
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* void pointer.
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* @param StatusEvent indicates one or more status events that occurred.
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* See the XHwIcap_SetInterruptHandler for details on the status
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* events that can be passed in the callback.
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* @param WordCount indicates how many words of data were successfully
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* transferred. This may be less than the number of words
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* requested if there was an error.
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*/
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typedef void (*XHwIcap_StatusHandler) (void *CallBackRef, u32 StatusEvent,
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u32 WordCount);
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/**
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* This typedef contains configuration information for the device.
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*/
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typedef struct {
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u16 DeviceId; /**< Device ID of device */
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u32 BaseAddress; /**< Register base address */
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int IcapWidth; /**< Width of ICAP */
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int IsLiteMode; /**< IsLiteMode, 0 not
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present, 1 present */
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} XHwIcap_Config;
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/**
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* The XHwIcap driver instance data. The user is required to allocate a
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* variable of this type for every HwIcap device in the system. A pointer
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* to a variable of this type is then passed to the driver API functions.
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*/
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typedef struct {
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XHwIcap_Config HwIcapConfig; /**< Instance of the config struct. */
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u32 IsReady; /**< Device is initialized and ready */
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int IsPolled; /**< Device is in polled mode */
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u32 DeviceIdCode; /**< IDCODE of targeted device */
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u32 BytesPerFrame; /**< Number of Bytes per minor Frame */
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u32 WordsPerFrame; /**< Number of Words per minor Frame */
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#if XPAR_HWICAP_0_ICAP_DWIDTH == 8
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u8 *SendBufferPtr;
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#elif XPAR_HWICAP_0_ICAP_DWIDTH == 16
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u16 *SendBufferPtr;
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#else
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u32 *SendBufferPtr;
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#endif
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u32 RequestedWords; /**< Number of Words to transfer */
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u32 RemainingWords; /**< Number of Words left to transfer */
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int IsTransferInProgress; /**< A transfer is in progress */
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XHwIcap_StatusHandler StatusHandler; /**< Interrupt handler callback */
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void *StatusRef; /**< Callback ref. for the interrupt
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* handler */
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} XHwIcap;
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/***************** Macro (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/**
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*
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* Write data to the Write FIFO.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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* @param Data is the 32-bit value to be written to the FIFO.
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*
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* @return None.
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*
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* @note C-style Signature:
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* void XHwIcap_FifoWrite(XHwIcap *InstancePtr, u32 Data);
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*
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*****************************************************************************/
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#define XHwIcap_FifoWrite(InstancePtr, Data) \
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(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress), \
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XHI_WF_OFFSET, (Data)))
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/****************************************************************************/
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/**
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*
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* Read data from the Read FIFO.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return The 32-bit Data read from the FIFO.
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*
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* @note C-style Signature:
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* u32 XHwIcap_FifoRead(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_FifoRead(InstancePtr) \
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(XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_RF_OFFSET))
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/****************************************************************************/
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/**
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*
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* Set the number of words to be read from the Icap in the Size register.
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*
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* The Size Register holds the number of 32 bit words to transfer from the
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* the Icap to the Read FIFO of the HwIcap device.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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* @param Data is the size in words.
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*
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* @return None.
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*
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* @note C-style Signature:
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* void XHwIcap_SetSizeReg(XHwIcap *InstancePtr, u32 Data);
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*
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*****************************************************************************/
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#define XHwIcap_SetSizeReg(InstancePtr, Data) \
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(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress), \
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XHI_SZ_OFFSET, (Data)))
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/****************************************************************************/
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/**
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*
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* Get the contents of the Control register.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return A 32-bit value representing the contents of the Control
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* register.
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*
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* @note u32 XHwIcap_GetControlReg(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_GetControlReg(InstancePtr) \
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(XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_CR_OFFSET))
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/****************************************************************************/
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/**
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*
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* Set the Control Register to initiate a configuration (write) to the device.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return None.
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*
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* @note C-style Signature:
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* void XHwIcap_StartConfig(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_StartConfig(InstancePtr) \
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(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_CR_OFFSET, \
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(XHwIcap_GetControlReg(InstancePtr) & \
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(~ XHI_CR_READ_MASK)) | XHI_CR_WRITE_MASK))
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/****************************************************************************/
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/**
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*
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* Set the Control Register to initiate a ReadBack from the device.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return None.
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*
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* @note C-style Signature:
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* void XHwIcap_StartReadBack(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_StartReadBack(InstancePtr) \
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(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress) , XHI_CR_OFFSET, \
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(XHwIcap_GetControlReg(InstancePtr) & \
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(~ XHI_CR_WRITE_MASK)) | XHI_CR_READ_MASK))
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/****************************************************************************/
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/**
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*
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* Get the contents of the status register.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return A 32-bit value representing the contents of the status register.
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*
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* @note u32 XHwIcap_GetStatusReg(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_GetStatusReg(InstancePtr) \
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(XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_SR_OFFSET))
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/****************************************************************************/
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/**
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*
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* This macro checks if the last Read/Write of the data to the Read/Write FIFO
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* of the HwIcap device is completed.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return
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* - TRUE if the Read/Write to the FIFO's is completed.
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* - FALSE if the Read/Write to the FIFO's is NOT completed..
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*
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* @note C-Style signature:
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* int XHwIcap_IsTransferDone(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_IsTransferDone(InstancePtr) \
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((InstancePtr->IsTransferInProgress) ? FALSE : TRUE)
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/****************************************************************************/
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/**
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*
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* This macro checks if the last Read/Write to the ICAP device in the FPGA
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* is completed.
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*
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* @param InstancePtr is a pointer to the XHwIcap instance.
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*
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* @return
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* - TRUE if the last Read/Write(Config) to the ICAP is NOT
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* completed.
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* - FALSE if the Read/Write(Config) to the ICAP is completed..
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*
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* @note C-Style signature:
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* int XHwIcap_IsDeviceBusy(XHwIcap *InstancePtr);
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*
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*****************************************************************************/
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#define XHwIcap_IsDeviceBusy(InstancePtr) \
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((XHwIcap_GetStatusReg(InstancePtr) & XHI_SR_DONE_MASK) ? \
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FALSE : TRUE)
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/*****************************************************************************/
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/**
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*
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* This macro enables the global interrupt in the Global Interrupt Enable
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* Register (GIER) so that the interrupt output from the HwIcap device is
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* enabled. Interrupts enabled using XHwIcap_IntrEnable() will not occur until
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* the global interrupt enable bit is set by using this macro.
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*
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* @param InstancePtr is a pointer to the HwIcap instance.
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XHwIcap_IntrGlobalEnable(InstancePtr)
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*
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******************************************************************************/
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#define XHwIcap_IntrGlobalEnable(InstancePtr) \
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XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
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XHI_GIER_OFFSET, XHI_GIER_GIE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro disables the global interrupt in the Global Interrupt Enable
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* Register (GIER) so that the interrupt output from the HwIcap device is
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* disabled.
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*
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* @param InstancePtr is a pointer to the HwIcap instance.
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XHwIcap_IntrGlobalDisable(InstancePtr)
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*
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******************************************************************************/
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#define XHwIcap_IntrGlobalDisable(InstancePtr) \
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XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
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XHI_GIER_OFFSET, 0x0)
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/*****************************************************************************/
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/**
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*
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* This macro returns the interrupt status read from Interrupt Status
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* Register(IPISR). Use the XHI_IPIXR_* constants defined in xhwicap_l.h
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* to interpret the returned value.
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*
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* @param InstancePtr is a pointer to the HwIcap instance.
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*
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* @return The contents read from the Interrupt Status Register.
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*
|
|
* @note C-Style signature:
|
|
* u32 XHwIcap_IntrGetStatus(InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_IntrGetStatus(InstancePtr) \
|
|
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPISR_OFFSET)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro disables the specified interrupts in the Interrupt Enable
|
|
* Register. It is non-destructive in that the register is read and only the
|
|
* interrupts specified is changed.
|
|
*
|
|
* @param InstancePtr is a pointer to the HwIcap instance.
|
|
* @param IntrMask is the bit-mask of the interrupts to be disabled.
|
|
* Bit positions of 1 will be disabled. Bit positions of 0 will
|
|
* keep the previous setting. This mask is formed by OR'ing
|
|
* XHI_IPIXR_*_MASK bits defined in xhwicap_l.h.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note Signature:
|
|
* void XHwIcap_IntrDisable(XHwIcap *InstancePtr, u32 IntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_IntrDisable(InstancePtr, IntrMask) \
|
|
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPIER_OFFSET, \
|
|
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPIER_OFFSET) & (~ (IntrMask & XHI_IPIXR_ALL_MASK)));\
|
|
(InstancePtr)->IsPolled = TRUE;
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro enables the specified interrupts in the Interrupt Enable
|
|
* Register. It is non-destructive in that the register is read and only the
|
|
* interrupts specified is changed.
|
|
*
|
|
* @param InstancePtr is a pointer to the HwIcap instance.
|
|
* @param IntrMask is the bit-mask of the interrupts to be enabled.
|
|
* Bit positions of 1 will be enabled. Bit positions of 0 will
|
|
* keep the previous setting. This mask is formed by OR'ing
|
|
* XHI_IPIXR_*_MASK bits defined in xhwicap_l.h.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note Signature:
|
|
* void XHwIcap_IntrEnable(XHwIcap *InstancePtr, u32 IntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_IntrEnable(InstancePtr, IntrMask) \
|
|
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPIER_OFFSET, \
|
|
(XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPIER_OFFSET) | ((IntrMask) & XHI_IPIXR_ALL_MASK))); \
|
|
(InstancePtr)->IsPolled = FALSE;
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro returns the interrupt status read from Interrupt Enable
|
|
* Register(IIER). Use the XHI_IPIXR_* constants defined in xhwicap_l.h
|
|
* to interpret the returned value.
|
|
*
|
|
* @param InstancePtr is a pointer to the HwIcap instance.
|
|
*
|
|
* @return The contents read from the Interrupt Enable Register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XHwIcap_IntrGetEnabled(InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_IntrGetEnabled(InstancePtr) \
|
|
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPIER_OFFSET)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro clears the specified interrupts in the Interrupt Status
|
|
* Register (IPISR).
|
|
*
|
|
* @param InstancePtr is a pointer to the HwIcap instance.
|
|
* @param IntrMask contains the interrupts to be cleared.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note Signature:
|
|
* void XHwIcap_DisableIntr(XHwIcap *InstancePtr, u32 IntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_IntrClear(InstancePtr, IntrMask) \
|
|
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPISR_OFFSET, \
|
|
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
|
|
XHI_IPISR_OFFSET) | ((IntrMask) & XHI_IPIXR_ALL_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro returns the vacancy of the Write FIFO. This indicates the
|
|
* number of words that can be written to the Write FIFO before it becomes
|
|
* full.
|
|
*
|
|
* @param InstancePtr is a pointer to the HwIcap instance.
|
|
*
|
|
* @return The contents read from the Write FIFO Vacancy Register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XHwIcap_GetWrFifoVacancy(InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_GetWrFifoVacancy(InstancePtr) \
|
|
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_WFV_OFFSET)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro returns the occupancy of the Read FIFO.
|
|
*
|
|
* @param InstancePtr is a pointer to the HwIcap instance.
|
|
*
|
|
* @return The contents read from the Read FIFO Occupancy Register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XHwIcap_GetRdFifoOccupancy(InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XHwIcap_GetRdFifoOccupancy(InstancePtr) \
|
|
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_RFO_OFFSET)
|
|
|
|
/************************** Function Prototypes *****************************/
|
|
|
|
/*
|
|
* Functions in the xhwicap.c
|
|
*/
|
|
int XHwIcap_CfgInitialize(XHwIcap *InstancePtr, XHwIcap_Config *ConfigPtr,
|
|
u32 EffectiveAddr);
|
|
int XHwIcap_DeviceWrite(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords);
|
|
int XHwIcap_DeviceRead(XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords);
|
|
void XHwIcap_Reset(XHwIcap *InstancePtr);
|
|
void XHwIcap_FlushFifo(XHwIcap *InstancePtr);
|
|
void XHwIcap_Abort(XHwIcap *InstancePtr);
|
|
|
|
/*
|
|
* Functions in xhwicap_sinit.c.
|
|
*/
|
|
XHwIcap_Config *XHwIcap_LookupConfig(u16 DeviceId);
|
|
|
|
/*
|
|
* Functions in the xhwicap_srp.c
|
|
*/
|
|
int XHwIcap_CommandDesync(XHwIcap *InstancePtr);
|
|
int XHwIcap_CommandCapture(XHwIcap *InstancePtr);
|
|
u32 XHwIcap_GetConfigReg(XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData);
|
|
|
|
/*
|
|
* Function in xhwicap_selftest.c
|
|
*/
|
|
int XHwIcap_SelfTest(XHwIcap *InstancePtr);
|
|
|
|
/*
|
|
* Function in xhwicap_intr.c
|
|
*/
|
|
void XHwIcap_IntrHandler(void *InstancePtr);
|
|
void XHwIcap_SetInterruptHandler(XHwIcap * InstancePtr, void *CallBackRef,
|
|
XHwIcap_StatusHandler FuncPtr);
|
|
|
|
/*
|
|
* Functions in the xhwicap_device_read_frame.c
|
|
*/
|
|
int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top,
|
|
long Block, long HClkRow,
|
|
long MajorFrame, long MinorFrame,
|
|
u32 *FrameBuffer);
|
|
|
|
/*
|
|
* Functions in the xhwicap_device_write_frame.c
|
|
*/
|
|
int XHwIcap_DeviceWriteFrame(XHwIcap *InstancePtr, long Top,
|
|
long Block, long HClkRow,
|
|
long MajorFrame, long MinorFrame,
|
|
u32 *FrameData);
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Sets bits contained in a Center tile specified by the CLB row and col
|
|
* coordinates. The coordinate system lables the upper left CLB as
|
|
* (1,1).
|
|
*
|
|
* @param InstancePtr is a pointer to XHwIcap instance to be worked on
|
|
* @param Row is the CLB row. (1,1) is the upper left CLB.
|
|
* @param Col is the CLB col. (1,1) is the upper left CLB.
|
|
* @param Resource is the Target bits (first dimension length will be
|
|
* the number of bits to set and must match the numBits parameter)
|
|
* (second dimension contains two value -- one for
|
|
* minor row and one for col information from within
|
|
* the Center tile targetted by the above row and
|
|
* col coords).
|
|
* @param Value is the values to set each of the targets bits to.
|
|
* The size of this array must be euqal to NumBits.
|
|
* @param NumBits is the number of Bits to change in this method.
|
|
*
|
|
* @return XST_SUCCESS, XST_BUFFER_TOO_SMALL or XST_INVALID_PARAM.
|
|
*
|
|
* @note The source code for this function is not included. This
|
|
* function is delivered as .o file. Libgen uses the appropriate
|
|
* .o file for the target processor.
|
|
*
|
|
*****************************************************************************/
|
|
int XHwIcap_SetClbBits(XHwIcap *InstancePtr, long Row, long Col,
|
|
const u8 Resource[][2], const u8 Value[], long NumBits);
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Gets bits contained in a Center tile specified by the CLB row and col
|
|
* coordinates. The coordinate system lables the upper left CLB as
|
|
* (1,1).
|
|
*
|
|
* @param InstancePtr is a pointer to the XHwIcap instance.
|
|
* @param Row is the CLB row. (1,1) is the upper left CLB.
|
|
* @param Col is the CLB col. (1,1) is the upper left CLB.
|
|
* @param Resource is the Target bits (first dimension length will be
|
|
* the number of bits to set and must match the numBits parameter)
|
|
* (second dimension contains two value -- one for
|
|
* minor row and one for col information from within
|
|
* the Center tile targetted by the above row and
|
|
* col coords).
|
|
* @param Value is the values to set each of the targets bits to.
|
|
* The size of this array must be euqal to NumBits.
|
|
* @param NumBits is the number of Bits to change in this method.
|
|
*
|
|
* @return XST_SUCCESS, XST_BUFFER_TOO_SMALL or XST_INVALID_PARAM.
|
|
*
|
|
* @note The source code for this function is not included. This
|
|
* function is delivered as .o file. Libgen uses the appropriate
|
|
* .o file for the target processor.
|
|
*
|
|
*****************************************************************************/
|
|
int XHwIcap_GetClbBits(XHwIcap *InstancePtr, long Row, long Col,
|
|
const u8 Resource[][2], u8 Value[], long NumBits);
|
|
|
|
|
|
/************************** Variable Declarations ***************************/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif
|
|
|