2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
354 lines
11 KiB
C
Executable file
354 lines
11 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2017 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xmbox_hw.h
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*
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* This header file contains identifiers and driver macros that can be used to
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* access the device. The user should refer to the hardware device specification
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* for more details of the device operation.
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* The driver functions/APIs are defined in xmbox.h.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a va First release
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* 1.00a ecm 06/01/07 Cleanup, new coding standard, check into XCS
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* 1.00a ecm 08/19/08 Fixed CRs 466320, 466322, 476535, 476242, 476243
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* new rev
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* 2.00a hm 04/09/09 Added support for mailbox v2.0, which has interrupts.
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* Fixed CR 502464, which removed extra
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* definitions that are not associated with
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* the interface.
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* Fixed the canonical definition so that each
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* interface is considered as a device instance.
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* 3.00a hbm 10/19/09 Migrated to HAL phase 1 to use xil_io.
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* Removed _m from the function names.
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* Renamed _mIsEmpty to _IsEmptyHw and _mIsFull
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* to _IsFullHw.
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* </pre>
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*
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******************************************************************************/
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#ifndef XMBOX_HW_H /* prevent circular inclusions */
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#define XMBOX_HW_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_io.h"
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#ifdef __MICROBLAZE__
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#include "fsl.h" /* MicroBlaze Specific */
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#endif
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/************************** Constant Definitions *****************************/
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/** @name Register Offset Definitions
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* Register offsets within a mbox.
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* @{
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*/
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#define XMB_WRITE_REG_OFFSET 0x00 /**< Mbox write register */
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#define XMB_READ_REG_OFFSET 0x08 /**< Mbox read register */
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#define XMB_STATUS_REG_OFFSET 0x10 /**< Mbox status reg */
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#define XMB_ERROR_REG_OFFSET 0x14 /**< Mbox Error reg */
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#define XMB_SIT_REG_OFFSET 0x18 /**< Mbox send interrupt threshold
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register */
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#define XMB_RIT_REG_OFFSET 0x1C /**< Mbox receive interrupt threshold
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register */
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#define XMB_IS_REG_OFFSET 0x20 /**< Mbox interrupt status register */
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#define XMB_IE_REG_OFFSET 0x24 /**< Mbox interrupt enable register */
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#define XMB_IP_REG_OFFSET 0x28 /**< Mbox interrupt pending register */
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/*@}*/
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/**
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* @name Status register bit definitions
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* These status bits are used to poll the FIFOs
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* @{
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*/
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#define XMB_STATUS_FIFO_EMPTY 0x00000001 /**< Receive FIFO is Empty */
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#define XMB_STATUS_FIFO_FULL 0x00000002 /**< Send FIFO is Full */
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#define XMB_STATUS_STA 0x00000004 /**< Send FIFO Threshold Status */
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#define XMB_STATUS_RTA 0x00000008 /**< Receive FIFO Threshold Status */
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/* @} */
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/**
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* @name Interrupt Registers(s) bits definitions.
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* The IS, IE, and IP registers all have the same bit definition.
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* @{
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*/
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#define XMB_IX_STA 0x01 /**< Send Threshold Active, when the
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number of Send FIFO entries is less
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than and equal to Send Interrupt
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Threshold */
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#define XMB_IX_RTA 0x02 /**< Receive Threshold Active, when the
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number of Receive FIFO entries is
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greater than Receive Interrupt
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Threshold */
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#define XMB_IX_ERR 0x04 /**< Mailbox Error, when read on empty or
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write on full */
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/* @} */
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/**
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* @name Error bits definition.
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* @{
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*/
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#define XMB_ERROR_FIFO_EMPTY 0x00000001 /**< Receive FIFO is Empty */
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#define XMB_ERROR_FIFO_FULL 0x00000002 /**< Send FIFO is Full */
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/* @} */
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/* The following macros are for the memory mapped access method */
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/*****************************************************************************/
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/**
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* Read one of the mbox registers.
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*
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* @param BaseAddress contains the base address of the mbox device.
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* @param RegOffset contains the offset from the 1st register of the mbox
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* to select the specific register of the mbox.
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*
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* @return The value read from the register, a 32 bit value.
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*
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* @note C-style signature:
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* u32 XMbox_ReadReg(u32 BaseAddress, unsigned RegOffset);
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*
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******************************************************************************/
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#define XMbox_ReadReg(BaseAddress, RegOffset) \
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Xil_In32((BaseAddress) + (RegOffset))
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/*****************************************************************************/
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/**
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* Write a specified value to a register of a mbox.
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*
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* @param BaseAddress is the base address of the mbox device.
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* @param RegOffset contain the offset from the 1st register of the
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* mbox to select the specific register of the mbox.
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* @param ValueToWrite is the 32 bit value to be written to the register.
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*
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* @return None
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*
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* @note C-style signature:
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* void XMbox_WriteReg(u32 BaseAddress, unsigned RegOffset, u32 ValueToWrite);
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*
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******************************************************************************/
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#define XMbox_WriteReg(BaseAddress, RegOffset, ValueToWrite) \
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Xil_Out32(((BaseAddress) + (RegOffset)), (ValueToWrite))
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/*****************************************************************************/
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/**
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* Write the mbox write register.
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*
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* @param BaseAddress contains the base address of the mbox device.
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* @param ValueToWrite contains the value to be written.
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*
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* @return None.
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*
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* @note C-style signature:
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* u32 XMbox_WriteMBox(u32 BaseAddress, u32 ValueToWrite);
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*
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******************************************************************************/
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#define XMbox_WriteMBox(BaseAddress, ValueToWrite) \
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XMbox_WriteReg (BaseAddress, XMB_WRITE_REG_OFFSET, ValueToWrite)
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/*****************************************************************************/
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/**
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* Read the mbox read FIFO.
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*
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* @param BaseAddress contains the base address of the mbox device.
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*
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* @return The value read from the register, a 32 bit value.
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*
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* @note C-style signature:
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* u32 XMbox_ReadMBox(u32 BaseAddress);
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*
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******************************************************************************/
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#define XMbox_ReadMBox(BaseAddress) \
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XMbox_ReadReg (BaseAddress, XMB_READ_REG_OFFSET)
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/*****************************************************************************/
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/**
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* Checks if the Read FIFO is Empty.
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*
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* @param BaseAddress contains the base address of the mbox device.
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*
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* @return
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* - TRUE if the FIFO is empty.
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* - FALSE if there is data to be read from the FIFO.
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*
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* @note C-style signature:
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* u32 XMbox_IsEmptyHw(u32 BaseAddress);
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*
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******************************************************************************/
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#define XMbox_IsEmptyHw(BaseAddress) \
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((XMbox_ReadReg (BaseAddress, XMB_STATUS_REG_OFFSET) & XMB_STATUS_FIFO_EMPTY))
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/*****************************************************************************/
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/**
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* Checks if there is room in the Write FIFO.
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*
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* @param BaseAddress contains the base address of the mbox device.
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*
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* @return
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* - FALSE if there is room in FIFO,
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* - TRUE if there is no room in the FIFO
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*
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* @note C-style signature:
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* u32 XMbox_IsFullHw(u32 BaseAddress);
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*
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******************************************************************************/
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#define XMbox_IsFullHw(BaseAddress) \
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((XMbox_ReadReg (BaseAddress, XMB_STATUS_REG_OFFSET) & XMB_STATUS_FIFO_FULL))
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/*
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* The following macros are for the MicroBlaze specific Fast Simplex Link (FSL)
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* access method
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*/
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#ifdef __MICROBLAZE__
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/*****************************************************************************/
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/**
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* Read the mbox FIFO using FSL
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*
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* @param ID contains the link to the mbox device.
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*
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* @return The value read from the FIFO, a 32 bit value.
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*
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* @note C-style signature:
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* u32 XMbox_FSLReadReg(u32 ID)
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*
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******************************************************************************/
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#define XMbox_FSLReadMBox(ID) \
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({ \
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u32 rVal; \
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getdfslx(rVal,(ID),FSL_DEFAULT); \
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rVal; \
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})
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/*****************************************************************************/
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/**
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* Write a specified value to mbox FIFO using FSL
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*
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* @param ID contains the link to the mbox device.
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* @param ValueToWrite is the 32 bit value to be written to the register.
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*
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* @return None
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*
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* @note C-style signature:
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* void XMbox_FSLWriteReg(u32 ID, u32 ValueToWrite);
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*
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******************************************************************************/
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#define XMbox_FSLWriteMBox(ID, ValueToWrite) \
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putdfslx((ValueToWrite),(ID), FSL_DEFAULT)
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/*****************************************************************************/
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/**
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* Checks if the Read FIFO is Empty.
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*
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* @param ID contains the link to the mbox device.
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*
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* @return
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* - TRUE if the Read FIFO is empty.
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* - FALSE if the Read FIFO is not empty and has data to be read.
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*
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* @note C-style signature:
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* u32 XMbox_FSLIsEmpty(u32 ID)
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*
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******************************************************************************/
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#define XMbox_FSLIsEmpty(ID) \
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({ \
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u32 temp, Empty; \
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tgetdfslx(temp,(ID), FSL_NONBLOCKING); \
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fsl_isinvalid(Empty); \
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Empty; \
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})
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/*****************************************************************************/
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/**
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* Checks if there is room in the Write FIFO.
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*
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* @param ID contains the link to the mbox device.
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*
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* @return
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* - TRUE if there is no room in the FIFO (It is Full)
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* - FALSE if there is room in FIFO
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*
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* @note C-style signature:
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* u32 XMbox_FSLIsFull(u32 ID)
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*
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******************************************************************************/
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#define XMbox_FSLIsFull(ID) \
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({ \
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u32 Full; \
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tputdfslx((ID), FSL_NONBLOCKING); \
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fsl_isinvalid(Full); \
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Full; \
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})
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#else
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/* these definitions allow the PPC version to compile, empty calls */
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#define XMbox_FSLReadMBox(ID) 0
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#define XMbox_FSLWriteMBox(ID, ValueToWrite)
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#define XMbox_FSLIsEmpty(ID) 0
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#define XMbox_FSLIsFull(ID) 0
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#endif /* __MICROBLAZE__ */
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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