Sarat Chand Savitala 58e0fb3ac2 sw_apps:zynqmp_fsbl: Updated reset release sequence for A53 ... Clock enable is now done before release of reset for A53. Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>		2015-07-01 11:57:44 +05:30
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bsp	Revert "bsp: a53: added support for 64bit print in xil_printf"	2015-07-01 11:41:06 +05:30
sw_apps	sw_apps:zynqmp_fsbl: Updated reset release sequence for A53	2015-07-01 11:57:44 +05:30
sw_services	xilisf: Removed compilation errors on DC1.	2015-06-26 16:56:17 +05:30