2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
162 lines
5.1 KiB
C
Executable file
162 lines
5.1 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2013 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xgpiops_hw.c
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*
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* This file contains low level GPIO functions.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.02a hk 08/22/13 First Release
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*
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xgpiops_hw.h"
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#include "xgpiops.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Variable Definitions *****************************/
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/************************** Function Prototypes ******************************/
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/*****************************************************************************/
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/*
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*
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* This function resets the GPIO module by writing reset values to
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* all registers
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*
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* @param Base address of GPIO module
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*
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* @return None
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*
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* @note None.
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*
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******************************************************************************/
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void XGpioPs_ResetHw(u32 BaseAddress)
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{
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u32 BankCount;
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/*
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* Write reset values to all mask data registers
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*/
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for(BankCount = 2; BankCount < XGPIOPS_MAX_BANKS; BankCount++) {
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_DATA_MASK_OFFSET) +
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XGPIOPS_DATA_LSW_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_DATA_MASK_OFFSET) +
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XGPIOPS_DATA_MSW_OFFSET), 0x0);
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}
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/*
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* Write reset values to all output data registers
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*/
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for(BankCount = 2; BankCount < XGPIOPS_MAX_BANKS; BankCount++) {
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_DATA_BANK_OFFSET) +
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XGPIOPS_DATA_OFFSET), 0x0);
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}
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/*
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* Reset all registers of all 4 banks
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*/
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for(BankCount = 0; BankCount < XGPIOPS_MAX_BANKS; BankCount++) {
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_DIRM_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_OUTEN_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTMASK_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTEN_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTDIS_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTSTS_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTPOL_OFFSET), 0x0);
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XGpioPs_WriteReg(BaseAddress,
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((BankCount * XGPIOPS_REG_MASK_OFFSET) +
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XGPIOPS_INTANY_OFFSET), 0x0);
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}
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/*
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* Bank 0 Int type
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*/
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XGpioPs_WriteReg(BaseAddress, XGPIOPS_INTTYPE_OFFSET,
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XGPIOPS_INTTYPE_BANK0_RESET);
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/*
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* Bank 1 Int type
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*/
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XGpioPs_WriteReg(BaseAddress,
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(XGPIOPS_REG_MASK_OFFSET + XGPIOPS_INTTYPE_OFFSET),
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XGPIOPS_INTTYPE_BANK1_RESET);
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/*
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* Bank 2 Int type
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*/
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XGpioPs_WriteReg(BaseAddress,
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((2*XGPIOPS_REG_MASK_OFFSET) + XGPIOPS_INTTYPE_OFFSET),
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XGPIOPS_INTTYPE_BANK2_RESET);
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/*
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* Bank 3 Int type
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*/
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XGpioPs_WriteReg(BaseAddress,
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((3*XGPIOPS_REG_MASK_OFFSET) + XGPIOPS_INTTYPE_OFFSET),
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XGPIOPS_INTTYPE_BANK3_RESET);
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}
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